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PRESENTATION DE COMPUTER
ARCHITECTURE

Topic: Register Organization & Instruction Cycle
MUHAMMAD AMEER MOHAVIA
      BS(ELECTRONICS ENGINEERING)




 BALOCHISTAN UNIVERSITY OF INFORAMTION
TECHNOLOGY ENGINEERING AND MANAGEMENT
       SCIENCE’S QUETTA PAKISATN.
REGISTER ORGANIZATON
   A register is a very small amount of very fast memory that is
    built into the CPU (central processing unit) in order to speed
    up its operations by providing quick access to commonly used
    values.
   Registers are normally measured by the number of bits they
    can hold, for example, an 8-bit register or a 32-bit register.
TYPES OF REGISTERS:
 User-accessible registers
 Control/Status Register

 User-visible Registers

 General purpose Register

 Address register

 Status register

 Memory buffer register

 Memory data register

 Memory address register
INSTRUCTION CYCLE:
   An instruction cycle' (also called fetch-and-execute cycle,
    fetch-decode-execute cycle, and FDX) is the time period
    during which a computer processes a machine language
    instruction from its memory or the sequence of actions that the
    central processing unit (CPU) performs to execute each
    machine code instruction in a program.
   The name fetch-and-execute cycle is commonly used. The
    instruction must be fetched from main memory, and then
    executed by the CPU. This is fundamentally how a computer
    operates, with its CPU reading and executing a series of
    instructions written in its machine language. From this arise all
    functions of a computer familiar from the user's end.
   There are typically four stages of an instruction cycle that the CPU
    carries out:
   1) Fetching the Instruction.
   2) Decode the Instruction.
   3) “Read the effective address”.
   4) Execute the Instruction.
   The Cycle is Then repeated Again




    The MAR (Memory Address Register) holds the address of the location to or
    from which data are to be transferred. As can be seen from the figure above,
    the connection of the MAR to the main memory is one-way or unidirectional.
   The MDR (Memory Data Register) contains the data to be written or read
    out of the addressed location.
OPERATING STEPS:
OPERATING STEPS:
    1) PC is set to point to the first instruction of the program (the operating system
    loads the memory address of the first instruction).
    2) The contents of the PC are transferred to the MAR (which is automatically transmitted
    to the MM) and a Read signal is sent to the MM (Main Memory).
   3) The addressed word is read out of MM and loaded into the MDR.
   4) The contents of MDR are transferred to the IR. The instruction is ready to be decoded
    and executed.
   5) During execution, the contents of the PC are incremented or updated to point to the
    next instruction.
    Example:
            Enumerate the different steps needed to execute the machine instruction
THE END

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Register Organization and Instruction cycle

  • 1. PRESENTATION DE COMPUTER ARCHITECTURE Topic: Register Organization & Instruction Cycle
  • 2. MUHAMMAD AMEER MOHAVIA BS(ELECTRONICS ENGINEERING) BALOCHISTAN UNIVERSITY OF INFORAMTION TECHNOLOGY ENGINEERING AND MANAGEMENT SCIENCE’S QUETTA PAKISATN.
  • 3. REGISTER ORGANIZATON  A register is a very small amount of very fast memory that is built into the CPU (central processing unit) in order to speed up its operations by providing quick access to commonly used values.  Registers are normally measured by the number of bits they can hold, for example, an 8-bit register or a 32-bit register.
  • 4. TYPES OF REGISTERS:  User-accessible registers  Control/Status Register  User-visible Registers  General purpose Register  Address register  Status register  Memory buffer register  Memory data register  Memory address register
  • 5. INSTRUCTION CYCLE:  An instruction cycle' (also called fetch-and-execute cycle, fetch-decode-execute cycle, and FDX) is the time period during which a computer processes a machine language instruction from its memory or the sequence of actions that the central processing unit (CPU) performs to execute each machine code instruction in a program.
  • 6. The name fetch-and-execute cycle is commonly used. The instruction must be fetched from main memory, and then executed by the CPU. This is fundamentally how a computer operates, with its CPU reading and executing a series of instructions written in its machine language. From this arise all functions of a computer familiar from the user's end.  There are typically four stages of an instruction cycle that the CPU carries out:  1) Fetching the Instruction.  2) Decode the Instruction.  3) “Read the effective address”.  4) Execute the Instruction.
  • 7. The Cycle is Then repeated Again  The MAR (Memory Address Register) holds the address of the location to or from which data are to be transferred. As can be seen from the figure above, the connection of the MAR to the main memory is one-way or unidirectional.  The MDR (Memory Data Register) contains the data to be written or read out of the addressed location.
  • 9. OPERATING STEPS:  1) PC is set to point to the first instruction of the program (the operating system loads the memory address of the first instruction).  2) The contents of the PC are transferred to the MAR (which is automatically transmitted to the MM) and a Read signal is sent to the MM (Main Memory).  3) The addressed word is read out of MM and loaded into the MDR.  4) The contents of MDR are transferred to the IR. The instruction is ready to be decoded and executed.  5) During execution, the contents of the PC are incremented or updated to point to the next instruction. Example: Enumerate the different steps needed to execute the machine instruction