SlideShare una empresa de Scribd logo
1 de 44
Mini Project  ROM-Based Sine Wave Generator   Introductory Lecture   BSc Hon. Multimedia Technology.  Mini Projects. ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],© University of Hertfordshire 2009 This work is licensed under a  Creative Commons Attribution 2.0 License .
Contents ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Outline ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Sequential Logic ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Sequential Logic ,[object Object],[object Object],[object Object],[object Object],[object Object]
D Flip-FLOP Timing diagram Truth table
D Flip-FLOP Detecting Rising Clock Edge: (CLK='1' and CLK 'event )  or  rising_edge (CLK) Detecting Falling Clock Edge?
D Flip-FLOP with Asynchronous RESET Timing diagram
D Flip-FLOP with Asynchronous RESET
D Flip-FLOP with Synchronous RESET Timing diagram Exercise 1
D Flip-FLOP with Synchronous RESET
2-bit Counter with Asynchronous RESET Timing diagram Exercise 2
2-bit Counter with Asynchronous RESET
Memories ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Array Types ,[object Object],[object Object],[object Object]
Writing to an array ,[object Object],[object Object]
SIGNED and UNSIGNED types ,[object Object],[object Object],[object Object],[object Object]
Array type conversion ,[object Object],[object Object],[object Object]
Conversion functions ,[object Object],[object Object],[object Object]
Numeric_std and std_logic_vector ,[object Object],[object Object]
Conversions- Summary
Resizing ,[object Object],[object Object]
Resizing - Example
Modelling memories - RAM
Modelling memories - RAM
Modelling memories - ROM
Modelling memories - ROM
[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],VHDL Test Benches
WAIT Statement  ,[object Object]
WAIT Statement  ,[object Object],[object Object],[object Object]
WAIT Statement - Example  ,[object Object]
Creating Signal Waveforms Using After Clause ,[object Object],Example Must appear in increasing order
Assertion Statement ,[object Object],Must evaluate to a Boolean value (true or false) If  false , it is said that an  assertion violation  occurred A message to be reported when assertion violation occurred Predefined severity names are:   NOTE:  used to pass information messages from simulator WARNING:  used in unusual situation in which the simulation can be continued ERROR:  used when assertion violation makes continuation of the simulation not feasible FAILURE:  used when the assertion violation is a fatal error and the simulation must be stopped
Assertion Statement Example ,[object Object]
VHDL Test Bench ,[object Object],[object Object],[object Object],[object Object],[object Object]
VHDL Test Bench ,[object Object],[object Object]
A Test Bench Template
A Test Bench Example Truth table VHDL code to describe the D FF
A Test Bench Example VHDL test bench to simulate the D FF
A Test Bench Example
A Test Bench Example FALSE
A Test Bench Exercise Write the process part of the test bench that generates the following inputs:
Solution
This resource was created by the University of Hertfordshire and released as an open educational resource through the Open Engineering Resources project of the HE Academy Engineering Subject Centre. The Open Engineering Resources project was funded by HEFCE and part of the JISC/HE Academy UKOER programme. Where screenshots are taken from Altium Designer 6, and appear courtesy of Premier EDA Solutions Ltd. © University of Hertfordshire 2009                  This work is licensed under a  Creative Commons Attribution 2.0 License .  The name of the University of Hertfordshire, UH and the UH logo are the name and registered marks of the University of Hertfordshire. To the fullest extent permitted by law the University of Hertfordshire reserves all its rights in its name and marks which may not be used except with its written permission.  The JISC logo is licensed under the terms of the Creative Commons Attribution-Non-Commercial-No Derivative Works 2.0 UK: England & Wales Licence.  All reproductions must comply with the terms of that licence. The HEA logo is owned by the Higher Education Academy Limited may be freely distributed and copied for educational purposes only, provided that appropriate acknowledgement is given to the Higher Education Academy as the copyright holder and original publisher.

Más contenido relacionado

Destacado

Desempenho de guias de onda sobre um material dieléctrico
Desempenho de guias de onda sobre um material dieléctricoDesempenho de guias de onda sobre um material dieléctrico
Desempenho de guias de onda sobre um material dieléctricoDaniel Ferreira
 
Automated Light Illumination Controller
Automated Light Illumination ControllerAutomated Light Illumination Controller
Automated Light Illumination ControllerBibhu Prasad Sahu
 
Chapter 3 signal-generator
Chapter 3 signal-generatorChapter 3 signal-generator
Chapter 3 signal-generatorFatin Salleh
 
Design of miniaturized ultra ppt
Design of miniaturized ultra pptDesign of miniaturized ultra ppt
Design of miniaturized ultra pptSharu Sparky
 
5 signs you need a leased line
5 signs you need a leased line5 signs you need a leased line
5 signs you need a leased lineEntanet
 
design of leased line network using vmux
 design of leased line network using vmux design of leased line network using vmux
design of leased line network using vmuxXhitesh Thakur
 
C programs
C programsC programs
C programsMinu S
 
Connecting Remotely to your Computer from an iPad or iPhone
Connecting  Remotely  to your Computer from an iPad or iPhoneConnecting  Remotely  to your Computer from an iPad or iPhone
Connecting Remotely to your Computer from an iPad or iPhoneStephen Mertens
 
Embedded c c++ programming fundamentals master
Embedded c c++ programming fundamentals masterEmbedded c c++ programming fundamentals master
Embedded c c++ programming fundamentals masterHossam Hassan
 
New final bsnl training report
New final bsnl training report New final bsnl training report
New final bsnl training report manish katara
 
Ch4 Boolean Algebra And Logic Simplication1
Ch4 Boolean Algebra And Logic Simplication1Ch4 Boolean Algebra And Logic Simplication1
Ch4 Boolean Algebra And Logic Simplication1Qundeel
 
Project on construction of 3 block house report
Project on construction of 3 block house reportProject on construction of 3 block house report
Project on construction of 3 block house reportHagi Sahib
 

Destacado (20)

Mini Project- ROM Based Sine Wave Generator
Mini Project- ROM Based Sine Wave GeneratorMini Project- ROM Based Sine Wave Generator
Mini Project- ROM Based Sine Wave Generator
 
Desempenho de guias de onda sobre um material dieléctrico
Desempenho de guias de onda sobre um material dieléctricoDesempenho de guias de onda sobre um material dieléctrico
Desempenho de guias de onda sobre um material dieléctrico
 
Automated Light Illumination Controller
Automated Light Illumination ControllerAutomated Light Illumination Controller
Automated Light Illumination Controller
 
Sg
SgSg
Sg
 
Chapter 3 signal-generator
Chapter 3 signal-generatorChapter 3 signal-generator
Chapter 3 signal-generator
 
Design of miniaturized ultra ppt
Design of miniaturized ultra pptDesign of miniaturized ultra ppt
Design of miniaturized ultra ppt
 
5 signs you need a leased line
5 signs you need a leased line5 signs you need a leased line
5 signs you need a leased line
 
design of leased line network using vmux
 design of leased line network using vmux design of leased line network using vmux
design of leased line network using vmux
 
Internet Leased lines
Internet Leased linesInternet Leased lines
Internet Leased lines
 
Embedded C - Lecture 3
Embedded C - Lecture 3Embedded C - Lecture 3
Embedded C - Lecture 3
 
C programs
C programsC programs
C programs
 
Function generator
Function generatorFunction generator
Function generator
 
Embedded C - Lecture 2
Embedded C - Lecture 2Embedded C - Lecture 2
Embedded C - Lecture 2
 
Connecting Remotely to your Computer from an iPad or iPhone
Connecting  Remotely  to your Computer from an iPad or iPhoneConnecting  Remotely  to your Computer from an iPad or iPhone
Connecting Remotely to your Computer from an iPad or iPhone
 
Embedded c c++ programming fundamentals master
Embedded c c++ programming fundamentals masterEmbedded c c++ programming fundamentals master
Embedded c c++ programming fundamentals master
 
Pocket pc
Pocket pcPocket pc
Pocket pc
 
New final bsnl training report
New final bsnl training report New final bsnl training report
New final bsnl training report
 
Ch4 Boolean Algebra And Logic Simplication1
Ch4 Boolean Algebra And Logic Simplication1Ch4 Boolean Algebra And Logic Simplication1
Ch4 Boolean Algebra And Logic Simplication1
 
Embedded System Presentation
Embedded System PresentationEmbedded System Presentation
Embedded System Presentation
 
Project on construction of 3 block house report
Project on construction of 3 block house reportProject on construction of 3 block house report
Project on construction of 3 block house report
 

Similar a Mini Project- ROM Based Sine Wave Generator

Floating point ALU using VHDL implemented on FPGA
Floating point ALU using VHDL implemented on FPGAFloating point ALU using VHDL implemented on FPGA
Floating point ALU using VHDL implemented on FPGAAzhar Syed
 
Hardware Description Language
Hardware Description Language Hardware Description Language
Hardware Description Language Prachi Pandey
 
Summer training vhdl
Summer training vhdlSummer training vhdl
Summer training vhdlArshit Rai
 
Prilimanary Concepts of VHDL by Dr.R.Prakash Rao
Prilimanary Concepts of VHDL by    Dr.R.Prakash RaoPrilimanary Concepts of VHDL by    Dr.R.Prakash Rao
Prilimanary Concepts of VHDL by Dr.R.Prakash Raorachurivlsi
 
Summer training vhdl
Summer training vhdlSummer training vhdl
Summer training vhdlArshit Rai
 
The Principle Of Ultrasound Imaging System
The Principle Of Ultrasound Imaging SystemThe Principle Of Ultrasound Imaging System
The Principle Of Ultrasound Imaging SystemMelissa Luster
 
Programming Without Coding Technology (PWCT) Features - Programming Paradigm
Programming Without Coding Technology (PWCT) Features - Programming ParadigmProgramming Without Coding Technology (PWCT) Features - Programming Paradigm
Programming Without Coding Technology (PWCT) Features - Programming ParadigmMahmoud Samir Fayed
 
Functional Verification of Large-integers Circuits using a Cosimulation-base...
Functional Verification of Large-integers Circuits using a  Cosimulation-base...Functional Verification of Large-integers Circuits using a  Cosimulation-base...
Functional Verification of Large-integers Circuits using a Cosimulation-base...IJECEIAES
 
DOUBLE PRECISION FLOATING POINT CORE IN VERILOG
DOUBLE PRECISION FLOATING POINT CORE IN VERILOGDOUBLE PRECISION FLOATING POINT CORE IN VERILOG
DOUBLE PRECISION FLOATING POINT CORE IN VERILOGIJCI JOURNAL
 
Software engineering
Software engineeringSoftware engineering
Software engineeringFahe Em
 

Similar a Mini Project- ROM Based Sine Wave Generator (20)

Verilog
VerilogVerilog
Verilog
 
I x scripting
I x scriptingI x scripting
I x scripting
 
Floating point ALU using VHDL implemented on FPGA
Floating point ALU using VHDL implemented on FPGAFloating point ALU using VHDL implemented on FPGA
Floating point ALU using VHDL implemented on FPGA
 
Hardware Description Language
Hardware Description Language Hardware Description Language
Hardware Description Language
 
Summer training vhdl
Summer training vhdlSummer training vhdl
Summer training vhdl
 
Prilimanary Concepts of VHDL by Dr.R.Prakash Rao
Prilimanary Concepts of VHDL by    Dr.R.Prakash RaoPrilimanary Concepts of VHDL by    Dr.R.Prakash Rao
Prilimanary Concepts of VHDL by Dr.R.Prakash Rao
 
DSD
DSDDSD
DSD
 
PRELIM-Lesson-2.pdf
PRELIM-Lesson-2.pdfPRELIM-Lesson-2.pdf
PRELIM-Lesson-2.pdf
 
Wi Fi documantation
Wi Fi documantationWi Fi documantation
Wi Fi documantation
 
Summer training vhdl
Summer training vhdlSummer training vhdl
Summer training vhdl
 
slide8.ppt
slide8.pptslide8.ppt
slide8.ppt
 
The Principle Of Ultrasound Imaging System
The Principle Of Ultrasound Imaging SystemThe Principle Of Ultrasound Imaging System
The Principle Of Ultrasound Imaging System
 
Digital_system_design_A (1).ppt
Digital_system_design_A (1).pptDigital_system_design_A (1).ppt
Digital_system_design_A (1).ppt
 
Programming Without Coding Technology (PWCT) Features - Programming Paradigm
Programming Without Coding Technology (PWCT) Features - Programming ParadigmProgramming Without Coding Technology (PWCT) Features - Programming Paradigm
Programming Without Coding Technology (PWCT) Features - Programming Paradigm
 
Functional Verification of Large-integers Circuits using a Cosimulation-base...
Functional Verification of Large-integers Circuits using a  Cosimulation-base...Functional Verification of Large-integers Circuits using a  Cosimulation-base...
Functional Verification of Large-integers Circuits using a Cosimulation-base...
 
DOUBLE PRECISION FLOATING POINT CORE IN VERILOG
DOUBLE PRECISION FLOATING POINT CORE IN VERILOGDOUBLE PRECISION FLOATING POINT CORE IN VERILOG
DOUBLE PRECISION FLOATING POINT CORE IN VERILOG
 
Vhdl introduction
Vhdl introductionVhdl introduction
Vhdl introduction
 
LLVM
LLVMLLVM
LLVM
 
Unit 1
Unit  1Unit  1
Unit 1
 
Software engineering
Software engineeringSoftware engineering
Software engineering
 

Más de University of Hertfordshire, School of Electronic Communications and Electrical Engineering

Más de University of Hertfordshire, School of Electronic Communications and Electrical Engineering (20)

Mini Project- Home Automation
Mini Project- Home AutomationMini Project- Home Automation
Mini Project- Home Automation
 
Mini Project- Automated Selection Machine
Mini Project- Automated Selection MachineMini Project- Automated Selection Machine
Mini Project- Automated Selection Machine
 
Mini Project- Soundscape for Games Consoles
Mini Project-  Soundscape for Games ConsolesMini Project-  Soundscape for Games Consoles
Mini Project- Soundscape for Games Consoles
 
Mini Project- Face Recognition
Mini Project- Face RecognitionMini Project- Face Recognition
Mini Project- Face Recognition
 
Mini Project- Games Development For The Desktop Pc And Dedicated Gaming Machine
Mini Project- Games Development For The Desktop Pc And Dedicated Gaming MachineMini Project- Games Development For The Desktop Pc And Dedicated Gaming Machine
Mini Project- Games Development For The Desktop Pc And Dedicated Gaming Machine
 
Mini Project- Audio Enhancement
Mini Project- Audio EnhancementMini Project- Audio Enhancement
Mini Project- Audio Enhancement
 
Mini Project- Multimedia Montage
Mini Project- Multimedia MontageMini Project- Multimedia Montage
Mini Project- Multimedia Montage
 
Mini Project- Audio Enhancement
Mini Project-  Audio EnhancementMini Project-  Audio Enhancement
Mini Project- Audio Enhancement
 
Mini Project- Multimedia Montage
Mini Project-  Multimedia MontageMini Project-  Multimedia Montage
Mini Project- Multimedia Montage
 
Mini Project- Internet Security Mechanisms
Mini Project- Internet Security MechanismsMini Project- Internet Security Mechanisms
Mini Project- Internet Security Mechanisms
 
Mini Project Internet Security Mechanisms
Mini Project  Internet Security MechanismsMini Project  Internet Security Mechanisms
Mini Project Internet Security Mechanisms
 
Mini Project- Personal Multimedia Portfolio
Mini Project- Personal Multimedia PortfolioMini Project- Personal Multimedia Portfolio
Mini Project- Personal Multimedia Portfolio
 
Mini Projects- Personal Multimedia Portfolio
Mini Projects- Personal Multimedia PortfolioMini Projects- Personal Multimedia Portfolio
Mini Projects- Personal Multimedia Portfolio
 
Mini Project- Credit The Edit
Mini Project- Credit The EditMini Project- Credit The Edit
Mini Project- Credit The Edit
 
Mini Project- Credit The Edit
Mini Project- Credit The EditMini Project- Credit The Edit
Mini Project- Credit The Edit
 
Mini Project- Digital Video Editing
Mini Project- Digital Video EditingMini Project- Digital Video Editing
Mini Project- Digital Video Editing
 
Mini Project- Digital Video Editing
Mini Project- Digital Video EditingMini Project- Digital Video Editing
Mini Project- Digital Video Editing
 
Mini Project- Digital Audio Editing
Mini Project- Digital Audio EditingMini Project- Digital Audio Editing
Mini Project- Digital Audio Editing
 
Mini Project- Shopping Cart Development
Mini Project- Shopping Cart DevelopmentMini Project- Shopping Cart Development
Mini Project- Shopping Cart Development
 
Mini Project- Shopping Cart Development
Mini Project- Shopping Cart DevelopmentMini Project- Shopping Cart Development
Mini Project- Shopping Cart Development
 

Último

Application orientated numerical on hev.ppt
Application orientated numerical on hev.pptApplication orientated numerical on hev.ppt
Application orientated numerical on hev.pptRamjanShidvankar
 
COMMUNICATING NEGATIVE NEWS - APPROACHES .pptx
COMMUNICATING NEGATIVE NEWS - APPROACHES .pptxCOMMUNICATING NEGATIVE NEWS - APPROACHES .pptx
COMMUNICATING NEGATIVE NEWS - APPROACHES .pptxannathomasp01
 
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...Pooja Bhuva
 
The basics of sentences session 3pptx.pptx
The basics of sentences session 3pptx.pptxThe basics of sentences session 3pptx.pptx
The basics of sentences session 3pptx.pptxheathfieldcps1
 
Interdisciplinary_Insights_Data_Collection_Methods.pptx
Interdisciplinary_Insights_Data_Collection_Methods.pptxInterdisciplinary_Insights_Data_Collection_Methods.pptx
Interdisciplinary_Insights_Data_Collection_Methods.pptxPooja Bhuva
 
Accessible Digital Futures project (20/03/2024)
Accessible Digital Futures project (20/03/2024)Accessible Digital Futures project (20/03/2024)
Accessible Digital Futures project (20/03/2024)Jisc
 
Fostering Friendships - Enhancing Social Bonds in the Classroom
Fostering Friendships - Enhancing Social Bonds  in the ClassroomFostering Friendships - Enhancing Social Bonds  in the Classroom
Fostering Friendships - Enhancing Social Bonds in the ClassroomPooky Knightsmith
 
HMCS Max Bernays Pre-Deployment Brief (May 2024).pptx
HMCS Max Bernays Pre-Deployment Brief (May 2024).pptxHMCS Max Bernays Pre-Deployment Brief (May 2024).pptx
HMCS Max Bernays Pre-Deployment Brief (May 2024).pptxEsquimalt MFRC
 
Holdier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfHoldier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfagholdier
 
Exploring_the_Narrative_Style_of_Amitav_Ghoshs_Gun_Island.pptx
Exploring_the_Narrative_Style_of_Amitav_Ghoshs_Gun_Island.pptxExploring_the_Narrative_Style_of_Amitav_Ghoshs_Gun_Island.pptx
Exploring_the_Narrative_Style_of_Amitav_Ghoshs_Gun_Island.pptxPooja Bhuva
 
Python Notes for mca i year students osmania university.docx
Python Notes for mca i year students osmania university.docxPython Notes for mca i year students osmania university.docx
Python Notes for mca i year students osmania university.docxRamakrishna Reddy Bijjam
 
Graduate Outcomes Presentation Slides - English
Graduate Outcomes Presentation Slides - EnglishGraduate Outcomes Presentation Slides - English
Graduate Outcomes Presentation Slides - Englishneillewis46
 
Key note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdfKey note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdfAdmir Softic
 
REMIFENTANIL: An Ultra short acting opioid.pptx
REMIFENTANIL: An Ultra short acting opioid.pptxREMIFENTANIL: An Ultra short acting opioid.pptx
REMIFENTANIL: An Ultra short acting opioid.pptxDr. Ravikiran H M Gowda
 
Understanding Accommodations and Modifications
Understanding  Accommodations and ModificationsUnderstanding  Accommodations and Modifications
Understanding Accommodations and ModificationsMJDuyan
 
This PowerPoint helps students to consider the concept of infinity.
This PowerPoint helps students to consider the concept of infinity.This PowerPoint helps students to consider the concept of infinity.
This PowerPoint helps students to consider the concept of infinity.christianmathematics
 
Basic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptxBasic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptxDenish Jangid
 
Kodo Millet PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...
Kodo Millet  PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...Kodo Millet  PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...
Kodo Millet PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...pradhanghanshyam7136
 
How to Create and Manage Wizard in Odoo 17
How to Create and Manage Wizard in Odoo 17How to Create and Manage Wizard in Odoo 17
How to Create and Manage Wizard in Odoo 17Celine George
 

Último (20)

Application orientated numerical on hev.ppt
Application orientated numerical on hev.pptApplication orientated numerical on hev.ppt
Application orientated numerical on hev.ppt
 
COMMUNICATING NEGATIVE NEWS - APPROACHES .pptx
COMMUNICATING NEGATIVE NEWS - APPROACHES .pptxCOMMUNICATING NEGATIVE NEWS - APPROACHES .pptx
COMMUNICATING NEGATIVE NEWS - APPROACHES .pptx
 
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
Beyond_Borders_Understanding_Anime_and_Manga_Fandom_A_Comprehensive_Audience_...
 
The basics of sentences session 3pptx.pptx
The basics of sentences session 3pptx.pptxThe basics of sentences session 3pptx.pptx
The basics of sentences session 3pptx.pptx
 
Interdisciplinary_Insights_Data_Collection_Methods.pptx
Interdisciplinary_Insights_Data_Collection_Methods.pptxInterdisciplinary_Insights_Data_Collection_Methods.pptx
Interdisciplinary_Insights_Data_Collection_Methods.pptx
 
Accessible Digital Futures project (20/03/2024)
Accessible Digital Futures project (20/03/2024)Accessible Digital Futures project (20/03/2024)
Accessible Digital Futures project (20/03/2024)
 
Fostering Friendships - Enhancing Social Bonds in the Classroom
Fostering Friendships - Enhancing Social Bonds  in the ClassroomFostering Friendships - Enhancing Social Bonds  in the Classroom
Fostering Friendships - Enhancing Social Bonds in the Classroom
 
HMCS Max Bernays Pre-Deployment Brief (May 2024).pptx
HMCS Max Bernays Pre-Deployment Brief (May 2024).pptxHMCS Max Bernays Pre-Deployment Brief (May 2024).pptx
HMCS Max Bernays Pre-Deployment Brief (May 2024).pptx
 
Holdier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdfHoldier Curriculum Vitae (April 2024).pdf
Holdier Curriculum Vitae (April 2024).pdf
 
Mehran University Newsletter Vol-X, Issue-I, 2024
Mehran University Newsletter Vol-X, Issue-I, 2024Mehran University Newsletter Vol-X, Issue-I, 2024
Mehran University Newsletter Vol-X, Issue-I, 2024
 
Exploring_the_Narrative_Style_of_Amitav_Ghoshs_Gun_Island.pptx
Exploring_the_Narrative_Style_of_Amitav_Ghoshs_Gun_Island.pptxExploring_the_Narrative_Style_of_Amitav_Ghoshs_Gun_Island.pptx
Exploring_the_Narrative_Style_of_Amitav_Ghoshs_Gun_Island.pptx
 
Python Notes for mca i year students osmania university.docx
Python Notes for mca i year students osmania university.docxPython Notes for mca i year students osmania university.docx
Python Notes for mca i year students osmania university.docx
 
Graduate Outcomes Presentation Slides - English
Graduate Outcomes Presentation Slides - EnglishGraduate Outcomes Presentation Slides - English
Graduate Outcomes Presentation Slides - English
 
Key note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdfKey note speaker Neum_Admir Softic_ENG.pdf
Key note speaker Neum_Admir Softic_ENG.pdf
 
REMIFENTANIL: An Ultra short acting opioid.pptx
REMIFENTANIL: An Ultra short acting opioid.pptxREMIFENTANIL: An Ultra short acting opioid.pptx
REMIFENTANIL: An Ultra short acting opioid.pptx
 
Understanding Accommodations and Modifications
Understanding  Accommodations and ModificationsUnderstanding  Accommodations and Modifications
Understanding Accommodations and Modifications
 
This PowerPoint helps students to consider the concept of infinity.
This PowerPoint helps students to consider the concept of infinity.This PowerPoint helps students to consider the concept of infinity.
This PowerPoint helps students to consider the concept of infinity.
 
Basic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptxBasic Civil Engineering first year Notes- Chapter 4 Building.pptx
Basic Civil Engineering first year Notes- Chapter 4 Building.pptx
 
Kodo Millet PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...
Kodo Millet  PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...Kodo Millet  PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...
Kodo Millet PPT made by Ghanshyam bairwa college of Agriculture kumher bhara...
 
How to Create and Manage Wizard in Odoo 17
How to Create and Manage Wizard in Odoo 17How to Create and Manage Wizard in Odoo 17
How to Create and Manage Wizard in Odoo 17
 

Mini Project- ROM Based Sine Wave Generator

  • 1.
  • 2.
  • 3.
  • 4.
  • 5.
  • 6. D Flip-FLOP Timing diagram Truth table
  • 7. D Flip-FLOP Detecting Rising Clock Edge: (CLK='1' and CLK 'event ) or rising_edge (CLK) Detecting Falling Clock Edge?
  • 8. D Flip-FLOP with Asynchronous RESET Timing diagram
  • 9. D Flip-FLOP with Asynchronous RESET
  • 10. D Flip-FLOP with Synchronous RESET Timing diagram Exercise 1
  • 11. D Flip-FLOP with Synchronous RESET
  • 12. 2-bit Counter with Asynchronous RESET Timing diagram Exercise 2
  • 13. 2-bit Counter with Asynchronous RESET
  • 14.
  • 15.
  • 16.
  • 17.
  • 18.
  • 19.
  • 20.
  • 22.
  • 28.
  • 29.
  • 30.
  • 31.
  • 32.
  • 33.
  • 34.
  • 35.
  • 36.
  • 37. A Test Bench Template
  • 38. A Test Bench Example Truth table VHDL code to describe the D FF
  • 39. A Test Bench Example VHDL test bench to simulate the D FF
  • 40. A Test Bench Example
  • 41. A Test Bench Example FALSE
  • 42. A Test Bench Exercise Write the process part of the test bench that generates the following inputs:
  • 44. This resource was created by the University of Hertfordshire and released as an open educational resource through the Open Engineering Resources project of the HE Academy Engineering Subject Centre. The Open Engineering Resources project was funded by HEFCE and part of the JISC/HE Academy UKOER programme. Where screenshots are taken from Altium Designer 6, and appear courtesy of Premier EDA Solutions Ltd. © University of Hertfordshire 2009                  This work is licensed under a Creative Commons Attribution 2.0 License . The name of the University of Hertfordshire, UH and the UH logo are the name and registered marks of the University of Hertfordshire. To the fullest extent permitted by law the University of Hertfordshire reserves all its rights in its name and marks which may not be used except with its written permission. The JISC logo is licensed under the terms of the Creative Commons Attribution-Non-Commercial-No Derivative Works 2.0 UK: England & Wales Licence.  All reproductions must comply with the terms of that licence. The HEA logo is owned by the Higher Education Academy Limited may be freely distributed and copied for educational purposes only, provided that appropriate acknowledgement is given to the Higher Education Academy as the copyright holder and original publisher.

Notas del editor

  1. In other words, sequential logic has storage ( memory )
  2. Std_logic_vector an unconstrained array
  3. Std_logic_vector an unconstrained array
  4. Use Ieee.numeric_std.all
  5. C <= std_logic_vector (B)
  6. Integer -2**31 to +2**31 - 1
  7. Integer -2**31 to +2**31 - 1
  8. Integer -2**31 to +2**31 - 1
  9. suspends process/subprogram execution until a signal changes, a condition becomes true, or a defined time period has elapsed. Combinations of these can also be used.
  10. See page 77 book
  11. See page 77 book
  12. All the SAS that we have seen so far, we have always assigned a single value to a signal Any arbitrary waveform can be easily created using a SAS The delay must appear in increasing order
  13. When an assertion violation occurs, the report is issued and displayed on the screen. The severity level defines the degree to which the violation of the assertion affects operation of the process Note: provides information about the progress of the simulation
  14. The message is displayed when the condition is NOT met
  15. A test bench is a specification in VHDL that plays the role of a complete simulation environment for the analysed system (Unit Under Test, UUT). The test bench contains both the UUT as well as stimuli for the simulation. The UUT is instantiated as a component of the test bench and the architecture of the test bench specifies stimuli for the UUT’s ports.
  16. Most simulators provide commands to apply stimulus to the input ports of a design entity. By tracing and viewing the resulting values of the signals on the output ports, we can determine whether the model is operating correctly. In VHDL, the model (test bench) generates sequences of inputs and reads the outputs of the module being tested.
  17. -- Declare any libraries that will be needed -- Declare the packages that will be use in these libraries