SlideShare una empresa de Scribd logo
1 de 90
Descargar para leer sin conexión
Lab 8: Interrupts and Device Drivers
Advanced Operating Systems

Zubair Nabi
zubair.nabi@itu.edu.pk

March 28, 2013
Recap of Lab 5: Extraordinary events

Events that break normal processor flow, to return control to the
kernel:
1

A device signals that it needs attention (e.g. Timer): Interrupt

2

A user program does something illegal (e.g. divide by zero):
Exception

3

A user program asks the kernel for a service: System call
Recap of Lab 5: Extraordinary events

Events that break normal processor flow, to return control to the
kernel:
1

A device signals that it needs attention (e.g. Timer): Interrupt

2

A user program does something illegal (e.g. divide by zero):
Exception

3

A user program asks the kernel for a service: System call
Recap of Lab 5: Extraordinary events

Events that break normal processor flow, to return control to the
kernel:
1

A device signals that it needs attention (e.g. Timer): Interrupt

2

A user program does something illegal (e.g. divide by zero):
Exception

3

A user program asks the kernel for a service: System call
Recap of Lab 5: Extraordinary events

Events that break normal processor flow, to return control to the
kernel:
1

A device signals that it needs attention (e.g. Timer): Interrupt

2

A user program does something illegal (e.g. divide by zero):
Exception

3

A user program asks the kernel for a service: System call
Recap of Lab 5: Handling extraordinary events

The operating system must:
1

Save the processor’s registers for future resumption

2

Set up system for execution in the kernel

3

Choose a place for the kernel to start execution

4

Retrieve information about the event and call corresponding

interrupt handler
5

All the while, maintain isolation between user processes and the
kernel
Recap of Lab 5: Handling extraordinary events

The operating system must:
1

Save the processor’s registers for future resumption

2

Set up system for execution in the kernel

3

Choose a place for the kernel to start execution

4

Retrieve information about the event and call corresponding

interrupt handler
5

All the while, maintain isolation between user processes and the
kernel
Recap of Lab 5: Handling extraordinary events

The operating system must:
1

Save the processor’s registers for future resumption

2

Set up system for execution in the kernel

3

Choose a place for the kernel to start execution

4

Retrieve information about the event and call corresponding

interrupt handler
5

All the while, maintain isolation between user processes and the
kernel
Recap of Lab 5: Handling extraordinary events

The operating system must:
1

Save the processor’s registers for future resumption

2

Set up system for execution in the kernel

3

Choose a place for the kernel to start execution

4

Retrieve information about the event and call corresponding

interrupt handler
5

All the while, maintain isolation between user processes and the
kernel
Recap of Lab 5: Handling extraordinary events

The operating system must:
1

Save the processor’s registers for future resumption

2

Set up system for execution in the kernel

3

Choose a place for the kernel to start execution

4

Retrieve information about the event and call corresponding

interrupt handler
5

All the while, maintain isolation between user processes and the
kernel
Recap of Lab 5: Handling extraordinary events

The operating system must:
1

Save the processor’s registers for future resumption

2

Set up system for execution in the kernel

3

Choose a place for the kernel to start execution

4

Retrieve information about the event and call corresponding

interrupt handler
5

All the while, maintain isolation between user processes and the
kernel
Recap of Lab 5: Handling extraordinary events (2)

• Need hardware support
• On the x86, system calls generate an interrupt via the int
instruction
• The same mechanism for handling interrupts is used for handling
system calls and exceptions
• Traps are caused by the current running process
• Interrupts are caused by devices
• Can happen concurrently
Recap of Lab 5: Handling extraordinary events (2)

• Need hardware support
• On the x86, system calls generate an interrupt via the int
instruction
• The same mechanism for handling interrupts is used for handling
system calls and exceptions
• Traps are caused by the current running process
• Interrupts are caused by devices
• Can happen concurrently
Recap of Lab 5: Handling extraordinary events (2)

• Need hardware support
• On the x86, system calls generate an interrupt via the int
instruction
• The same mechanism for handling interrupts is used for handling
system calls and exceptions
• Traps are caused by the current running process
• Interrupts are caused by devices
• Can happen concurrently
Recap of Lab 5: Handling extraordinary events (2)

• Need hardware support
• On the x86, system calls generate an interrupt via the int
instruction
• The same mechanism for handling interrupts is used for handling
system calls and exceptions
• Traps are caused by the current running process
• Interrupts are caused by devices
• Can happen concurrently
Recap of Lab 5: Handling extraordinary events (2)

• Need hardware support
• On the x86, system calls generate an interrupt via the int
instruction
• The same mechanism for handling interrupts is used for handling
system calls and exceptions
• Traps are caused by the current running process
• Interrupts are caused by devices
• Can happen concurrently
Recap of Lab 5: Handling extraordinary events (2)

• Need hardware support
• On the x86, system calls generate an interrupt via the int
instruction
• The same mechanism for handling interrupts is used for handling
system calls and exceptions
• Traps are caused by the current running process
• Interrupts are caused by devices
• Can happen concurrently
Recap of Lab 5: trap

• Gets passed struct trapframe *tf
• Checks tf->trapno to decide if it was called for a system call
(T_SYSCALL) or a hardware interrupt or an exception
• In case of:
1 System call, it invokes syscall
2
3

Hardware interrupt, it calls the hardware interrupt controller
Exception, it prints the details and kills the user process
Recap of Lab 5: trap

• Gets passed struct trapframe *tf
• Checks tf->trapno to decide if it was called for a system call
(T_SYSCALL) or a hardware interrupt or an exception
• In case of:
1 System call, it invokes syscall
2
3

Hardware interrupt, it calls the hardware interrupt controller
Exception, it prints the details and kills the user process
Recap of Lab 5: trap

• Gets passed struct trapframe *tf
• Checks tf->trapno to decide if it was called for a system call
(T_SYSCALL) or a hardware interrupt or an exception
• In case of:
1 System call, it invokes syscall
2
3

Hardware interrupt, it calls the hardware interrupt controller
Exception, it prints the details and kills the user process
Recap of Lab 5: trap

• Gets passed struct trapframe *tf
• Checks tf->trapno to decide if it was called for a system call
(T_SYSCALL) or a hardware interrupt or an exception
• In case of:
1 System call, it invokes syscall
2
3

Hardware interrupt, it calls the hardware interrupt controller
Exception, it prints the details and kills the user process
Recap of Lab 5: trap

• Gets passed struct trapframe *tf
• Checks tf->trapno to decide if it was called for a system call
(T_SYSCALL) or a hardware interrupt or an exception
• In case of:
1 System call, it invokes syscall
2
3

Hardware interrupt, it calls the hardware interrupt controller
Exception, it prints the details and kills the user process
Interrupts

• Examples of interrupts: Pressing a key on the keyboard, storing
data on disk etc.
• Hardware on the motherboard signals the CPU whenever a
device needs attention
• Devices need to be programmed to generate interrupts
• Interrupts must be assigned to a CPU for handling
Interrupts

• Examples of interrupts: Pressing a key on the keyboard, storing
data on disk etc.
• Hardware on the motherboard signals the CPU whenever a
device needs attention
• Devices need to be programmed to generate interrupts
• Interrupts must be assigned to a CPU for handling
Interrupts

• Examples of interrupts: Pressing a key on the keyboard, storing
data on disk etc.
• Hardware on the motherboard signals the CPU whenever a
device needs attention
• Devices need to be programmed to generate interrupts
• Interrupts must be assigned to a CPU for handling
Interrupts

• Examples of interrupts: Pressing a key on the keyboard, storing
data on disk etc.
• Hardware on the motherboard signals the CPU whenever a
device needs attention
• Devices need to be programmed to generate interrupts
• Interrupts must be assigned to a CPU for handling
Handing interrupts on multi-processors

Two parts of handling interrupts on multi-processors
1

A method to route interrupts to processors (I/O APIC – Advanced
Programmable Interrupt Controller, ioapic.c)

2

A per CPU interrupt controller to handle interrupts (Local APIC,
lapic.c)

The OS needs to program both the IOAPIC and the LAPIC
Handing interrupts on multi-processors

Two parts of handling interrupts on multi-processors
1

A method to route interrupts to processors (I/O APIC – Advanced
Programmable Interrupt Controller, ioapic.c)

2

A per CPU interrupt controller to handle interrupts (Local APIC,
lapic.c)

The OS needs to program both the IOAPIC and the LAPIC
Handing interrupts on multi-processors

Two parts of handling interrupts on multi-processors
1

A method to route interrupts to processors (I/O APIC – Advanced
Programmable Interrupt Controller, ioapic.c)

2

A per CPU interrupt controller to handle interrupts (Local APIC,
lapic.c)

The OS needs to program both the IOAPIC and the LAPIC
IOAPIC

• Interrupts are generated by the APIC labelled from IRQ0 to
IRQ16 or IRQ24
• A device enables particular interrupts within the IOAPIC table and
specifies which processor they should be routed to
• For instance, the keyboard interrupt is routed to CPU0 while disk
interrupts are routed to CPU(n − 1), where n is the number of
CPUs
• Every CPU decides whether it wants to receive interrupts. For
instance, scheduler() disables all interrupts
IOAPIC

• Interrupts are generated by the APIC labelled from IRQ0 to
IRQ16 or IRQ24
• A device enables particular interrupts within the IOAPIC table and
specifies which processor they should be routed to
• For instance, the keyboard interrupt is routed to CPU0 while disk
interrupts are routed to CPU(n − 1), where n is the number of
CPUs
• Every CPU decides whether it wants to receive interrupts. For
instance, scheduler() disables all interrupts
IOAPIC

• Interrupts are generated by the APIC labelled from IRQ0 to
IRQ16 or IRQ24
• A device enables particular interrupts within the IOAPIC table and
specifies which processor they should be routed to
• For instance, the keyboard interrupt is routed to CPU0 while disk
interrupts are routed to CPU(n − 1), where n is the number of
CPUs
• Every CPU decides whether it wants to receive interrupts. For
instance, scheduler() disables all interrupts
IOAPIC

• Interrupts are generated by the APIC labelled from IRQ0 to
IRQ16 or IRQ24
• A device enables particular interrupts within the IOAPIC table and
specifies which processor they should be routed to
• For instance, the keyboard interrupt is routed to CPU0 while disk
interrupts are routed to CPU(n − 1), where n is the number of
CPUs
• Every CPU decides whether it wants to receive interrupts. For
instance, scheduler() disables all interrupts
LAPIC

• Each CPU has its own LAPIC
• xv6 programs the LAPIC using lapicinit()
LAPIC

• Each CPU has its own LAPIC
• xv6 programs the LAPIC using lapicinit()
Example: Timer interrupt

• The kernel uses timer interrupts to get a notion of time and to
make scheduling decisions
• A value of 100 timer ticks is used by default which is high enough
to allow interactivity and low enough not to lead to a live lock
• This value is set in lapicinit() and IRQ_TIMER is mapped
to IRQ0
• IRQ_TIMER corresponds to interrupt number 32
• In trap(), for interrupt number 32, the timer tick is incremented
and processes sleeping on it are woken up
Example: Timer interrupt

• The kernel uses timer interrupts to get a notion of time and to
make scheduling decisions
• A value of 100 timer ticks is used by default which is high enough
to allow interactivity and low enough not to lead to a live lock
• This value is set in lapicinit() and IRQ_TIMER is mapped
to IRQ0
• IRQ_TIMER corresponds to interrupt number 32
• In trap(), for interrupt number 32, the timer tick is incremented
and processes sleeping on it are woken up
Example: Timer interrupt

• The kernel uses timer interrupts to get a notion of time and to
make scheduling decisions
• A value of 100 timer ticks is used by default which is high enough
to allow interactivity and low enough not to lead to a live lock
• This value is set in lapicinit() and IRQ_TIMER is mapped
to IRQ0
• IRQ_TIMER corresponds to interrupt number 32
• In trap(), for interrupt number 32, the timer tick is incremented
and processes sleeping on it are woken up
Example: Timer interrupt

• The kernel uses timer interrupts to get a notion of time and to
make scheduling decisions
• A value of 100 timer ticks is used by default which is high enough
to allow interactivity and low enough not to lead to a live lock
• This value is set in lapicinit() and IRQ_TIMER is mapped
to IRQ0
• IRQ_TIMER corresponds to interrupt number 32
• In trap(), for interrupt number 32, the timer tick is incremented
and processes sleeping on it are woken up
Example: Timer interrupt

• The kernel uses timer interrupts to get a notion of time and to
make scheduling decisions
• A value of 100 timer ticks is used by default which is high enough
to allow interactivity and low enough not to lead to a live lock
• This value is set in lapicinit() and IRQ_TIMER is mapped
to IRQ0
• IRQ_TIMER corresponds to interrupt number 32
• In trap(), for interrupt number 32, the timer tick is incremented
and processes sleeping on it are woken up
Device Driver

• A piece of code in the OS that manages a particular device
• Provides interrupt handlers for a device
• Causes a device to perform operations
• Causes a device to generate interrupts

• Non-trivial to write as a driver executes concurrently with the
device that it manages
• Driver also needs to understand the hardware interface of the
device
Device Driver

• A piece of code in the OS that manages a particular device
• Provides interrupt handlers for a device
• Causes a device to perform operations
• Causes a device to generate interrupts

• Non-trivial to write as a driver executes concurrently with the
device that it manages
• Driver also needs to understand the hardware interface of the
device
Device Driver

• A piece of code in the OS that manages a particular device
• Provides interrupt handlers for a device
• Causes a device to perform operations
• Causes a device to generate interrupts

• Non-trivial to write as a driver executes concurrently with the
device that it manages
• Driver also needs to understand the hardware interface of the
device
Device Driver

• A piece of code in the OS that manages a particular device
• Provides interrupt handlers for a device
• Causes a device to perform operations
• Causes a device to generate interrupts

• Non-trivial to write as a driver executes concurrently with the
device that it manages
• Driver also needs to understand the hardware interface of the
device
Device Driver

• A piece of code in the OS that manages a particular device
• Provides interrupt handlers for a device
• Causes a device to perform operations
• Causes a device to generate interrupts

• Non-trivial to write as a driver executes concurrently with the
device that it manages
• Driver also needs to understand the hardware interface of the
device
Device Driver

• A piece of code in the OS that manages a particular device
• Provides interrupt handlers for a device
• Causes a device to perform operations
• Causes a device to generate interrupts

• Non-trivial to write as a driver executes concurrently with the
device that it manages
• Driver also needs to understand the hardware interface of the
device
Example: Disk driver

• In charge of copying data back and forth from the disk
• Data is represented on the disk as a sequence of sectors, each
containing 512-byte blocks
• Sector 0 represents the first 512 bytes, sector 1 the next 512, and
so on

• The OS has a corresponding structure (struct buf) that
maps to one sector
• The data within the OS sector structure is often out of sync with
the disk
• xv6 implements an IDE driver
Example: Disk driver

• In charge of copying data back and forth from the disk
• Data is represented on the disk as a sequence of sectors, each
containing 512-byte blocks
• Sector 0 represents the first 512 bytes, sector 1 the next 512, and
so on

• The OS has a corresponding structure (struct buf) that
maps to one sector
• The data within the OS sector structure is often out of sync with
the disk
• xv6 implements an IDE driver
Example: Disk driver

• In charge of copying data back and forth from the disk
• Data is represented on the disk as a sequence of sectors, each
containing 512-byte blocks
• Sector 0 represents the first 512 bytes, sector 1 the next 512, and
so on

• The OS has a corresponding structure (struct buf) that
maps to one sector
• The data within the OS sector structure is often out of sync with
the disk
• xv6 implements an IDE driver
Example: Disk driver

• In charge of copying data back and forth from the disk
• Data is represented on the disk as a sequence of sectors, each
containing 512-byte blocks
• Sector 0 represents the first 512 bytes, sector 1 the next 512, and
so on

• The OS has a corresponding structure (struct buf) that
maps to one sector
• The data within the OS sector structure is often out of sync with
the disk
• xv6 implements an IDE driver
Example: Disk driver

• In charge of copying data back and forth from the disk
• Data is represented on the disk as a sequence of sectors, each
containing 512-byte blocks
• Sector 0 represents the first 512 bytes, sector 1 the next 512, and
so on

• The OS has a corresponding structure (struct buf) that
maps to one sector
• The data within the OS sector structure is often out of sync with
the disk
• xv6 implements an IDE driver
Example: Disk driver

• In charge of copying data back and forth from the disk
• Data is represented on the disk as a sequence of sectors, each
containing 512-byte blocks
• Sector 0 represents the first 512 bytes, sector 1 the next 512, and
so on

• The OS has a corresponding structure (struct buf) that
maps to one sector
• The data within the OS sector structure is often out of sync with
the disk
• xv6 implements an IDE driver
Code: struct buf

struct buf {
int flags;
uint dev;
uint sector;
struct buf *prev;
struct buf *next;
struct buf *qnext;
uchar data[512];
};
#define B_BUSY 0x1
#define B_VALID 0x2
#define B_DIRTY 0x4
Example: Disk driver initialization

• ideinit() is invoked by main(), which initializes the disk
driver
1 ideinit() sets up CPU(n − 1) to handle disk interrupts
2 It then makes a call to idewait() to wait for disk 0 to initialize
• It assumes that at least disk 0 is present because the boot loader
and the kernel were obviously loaded from it
3

idewait() polls the status bits of the disk hardware, until
IDE_BSY is clear and IDE_DRDY is set

4

It then checks whether another disk is present
Example: Disk driver initialization

• ideinit() is invoked by main(), which initializes the disk
driver
1 ideinit() sets up CPU(n − 1) to handle disk interrupts
2 It then makes a call to idewait() to wait for disk 0 to initialize
• It assumes that at least disk 0 is present because the boot loader
and the kernel were obviously loaded from it
3

idewait() polls the status bits of the disk hardware, until
IDE_BSY is clear and IDE_DRDY is set

4

It then checks whether another disk is present
Example: Disk driver initialization

• ideinit() is invoked by main(), which initializes the disk
driver
1 ideinit() sets up CPU(n − 1) to handle disk interrupts
2 It then makes a call to idewait() to wait for disk 0 to initialize
• It assumes that at least disk 0 is present because the boot loader
and the kernel were obviously loaded from it
3

idewait() polls the status bits of the disk hardware, until
IDE_BSY is clear and IDE_DRDY is set

4

It then checks whether another disk is present
Example: Disk driver initialization

• ideinit() is invoked by main(), which initializes the disk
driver
1 ideinit() sets up CPU(n − 1) to handle disk interrupts
2 It then makes a call to idewait() to wait for disk 0 to initialize
• It assumes that at least disk 0 is present because the boot loader
and the kernel were obviously loaded from it
3

idewait() polls the status bits of the disk hardware, until
IDE_BSY is clear and IDE_DRDY is set

4

It then checks whether another disk is present
Example: Disk driver initialization

• ideinit() is invoked by main(), which initializes the disk
driver
1 ideinit() sets up CPU(n − 1) to handle disk interrupts
2 It then makes a call to idewait() to wait for disk 0 to initialize
• It assumes that at least disk 0 is present because the boot loader
and the kernel were obviously loaded from it
3

idewait() polls the status bits of the disk hardware, until
IDE_BSY is clear and IDE_DRDY is set

4

It then checks whether another disk is present
Example: Disk driver initialization

• ideinit() is invoked by main(), which initializes the disk
driver
1 ideinit() sets up CPU(n − 1) to handle disk interrupts
2 It then makes a call to idewait() to wait for disk 0 to initialize
• It assumes that at least disk 0 is present because the boot loader
and the kernel were obviously loaded from it
3

idewait() polls the status bits of the disk hardware, until
IDE_BSY is clear and IDE_DRDY is set

4

It then checks whether another disk is present
Buffer cache

• The buffer cache is a linked list of struct buf in memory
• It holds cached copies of disk blocks
• Uses iderw(struct buf *b) to read/write a buffer from/to
the disk
• If B_DIRTY is set, it writes b to disk
• If B_VALID is not set, it reads b from disk
Buffer cache

• The buffer cache is a linked list of struct buf in memory
• It holds cached copies of disk blocks
• Uses iderw(struct buf *b) to read/write a buffer from/to
the disk
• If B_DIRTY is set, it writes b to disk
• If B_VALID is not set, it reads b from disk
Buffer cache

• The buffer cache is a linked list of struct buf in memory
• It holds cached copies of disk blocks
• Uses iderw(struct buf *b) to read/write a buffer from/to
the disk
• If B_DIRTY is set, it writes b to disk
• If B_VALID is not set, it reads b from disk
Buffer cache

• The buffer cache is a linked list of struct buf in memory
• It holds cached copies of disk blocks
• Uses iderw(struct buf *b) to read/write a buffer from/to
the disk
• If B_DIRTY is set, it writes b to disk
• If B_VALID is not set, it reads b from disk
Buffer cache

• The buffer cache is a linked list of struct buf in memory
• It holds cached copies of disk blocks
• Uses iderw(struct buf *b) to read/write a buffer from/to
the disk
• If B_DIRTY is set, it writes b to disk
• If B_VALID is not set, it reads b from disk
iderw
• Disk accesses take milliseconds of time therefore polling is not an
option
• iderw keeps the list of pending disk requests in a queue
(idequeue) and uses interrupts to signal whenever a request
has finished
• It adds b to the end of idequeue
• If b is the only buffer in idequeue, it instantly dispatches it to the
disk hardware by calling idestart() which either issues a
read or a write

• The current process is then put to sleep waiting for the operation
on b to be completed
• Once the hardware has completed the operation, it will generate
an interrupt (IRQ_IDE) which will be handled by trap by
invoking ideintr()
iderw
• Disk accesses take milliseconds of time therefore polling is not an
option
• iderw keeps the list of pending disk requests in a queue
(idequeue) and uses interrupts to signal whenever a request
has finished
• It adds b to the end of idequeue
• If b is the only buffer in idequeue, it instantly dispatches it to the
disk hardware by calling idestart() which either issues a
read or a write

• The current process is then put to sleep waiting for the operation
on b to be completed
• Once the hardware has completed the operation, it will generate
an interrupt (IRQ_IDE) which will be handled by trap by
invoking ideintr()
iderw
• Disk accesses take milliseconds of time therefore polling is not an
option
• iderw keeps the list of pending disk requests in a queue
(idequeue) and uses interrupts to signal whenever a request
has finished
• It adds b to the end of idequeue
• If b is the only buffer in idequeue, it instantly dispatches it to the
disk hardware by calling idestart() which either issues a
read or a write

• The current process is then put to sleep waiting for the operation
on b to be completed
• Once the hardware has completed the operation, it will generate
an interrupt (IRQ_IDE) which will be handled by trap by
invoking ideintr()
iderw
• Disk accesses take milliseconds of time therefore polling is not an
option
• iderw keeps the list of pending disk requests in a queue
(idequeue) and uses interrupts to signal whenever a request
has finished
• It adds b to the end of idequeue
• If b is the only buffer in idequeue, it instantly dispatches it to the
disk hardware by calling idestart() which either issues a
read or a write

• The current process is then put to sleep waiting for the operation
on b to be completed
• Once the hardware has completed the operation, it will generate
an interrupt (IRQ_IDE) which will be handled by trap by
invoking ideintr()
iderw
• Disk accesses take milliseconds of time therefore polling is not an
option
• iderw keeps the list of pending disk requests in a queue
(idequeue) and uses interrupts to signal whenever a request
has finished
• It adds b to the end of idequeue
• If b is the only buffer in idequeue, it instantly dispatches it to the
disk hardware by calling idestart() which either issues a
read or a write

• The current process is then put to sleep waiting for the operation
on b to be completed
• Once the hardware has completed the operation, it will generate
an interrupt (IRQ_IDE) which will be handled by trap by
invoking ideintr()
iderw
• Disk accesses take milliseconds of time therefore polling is not an
option
• iderw keeps the list of pending disk requests in a queue
(idequeue) and uses interrupts to signal whenever a request
has finished
• It adds b to the end of idequeue
• If b is the only buffer in idequeue, it instantly dispatches it to the
disk hardware by calling idestart() which either issues a
read or a write

• The current process is then put to sleep waiting for the operation
on b to be completed
• Once the hardware has completed the operation, it will generate
an interrupt (IRQ_IDE) which will be handled by trap by
invoking ideintr()
Code: iderw
void iderw(struct buf *b)
{
struct buf **pp;
acquire(&idelock);
b->qnext = 0;
for(pp=&idequeue; *pp; pp=&(*pp)->qnext)
;
*pp = b;
if(idequeue == b)
idestart(b);
while((b->flags & (B_VALID|B_DIRTY)) != B_VALID){
sleep(b, &idelock);
}
release(&idelock);
}
ideintr

1

Checks the first buffer in idequeue to find the type of the
operation (read or write)

2

If the operation was a read, it reads the data into the buffer via

insl()
3

It then sets B_VALID and clears B_DIRTY and wakes up any
processes sleeping on b

4

Finally, it dispatches the next buffer from idequeue
ideintr

1

Checks the first buffer in idequeue to find the type of the
operation (read or write)

2

If the operation was a read, it reads the data into the buffer via

insl()
3

It then sets B_VALID and clears B_DIRTY and wakes up any
processes sleeping on b

4

Finally, it dispatches the next buffer from idequeue
ideintr

1

Checks the first buffer in idequeue to find the type of the
operation (read or write)

2

If the operation was a read, it reads the data into the buffer via

insl()
3

It then sets B_VALID and clears B_DIRTY and wakes up any
processes sleeping on b

4

Finally, it dispatches the next buffer from idequeue
ideintr

1

Checks the first buffer in idequeue to find the type of the
operation (read or write)

2

If the operation was a read, it reads the data into the buffer via

insl()
3

It then sets B_VALID and clears B_DIRTY and wakes up any
processes sleeping on b

4

Finally, it dispatches the next buffer from idequeue
Modern disk controllers in a real OS

• Most disk controllers typically accept multiple outstanding disk
requests at a time
• They even reorder them to make efficient use of the disk arm
• Conceptually other hardware is very similar to disks
• Network buffers hold packets
• Audio device buffers hold sound samples
• Graphics card buffers hold video data
Modern disk controllers in a real OS

• Most disk controllers typically accept multiple outstanding disk
requests at a time
• They even reorder them to make efficient use of the disk arm
• Conceptually other hardware is very similar to disks
• Network buffers hold packets
• Audio device buffers hold sound samples
• Graphics card buffers hold video data
Modern disk controllers in a real OS

• Most disk controllers typically accept multiple outstanding disk
requests at a time
• They even reorder them to make efficient use of the disk arm
• Conceptually other hardware is very similar to disks
• Network buffers hold packets
• Audio device buffers hold sound samples
• Graphics card buffers hold video data
Modern disk controllers in a real OS

• Most disk controllers typically accept multiple outstanding disk
requests at a time
• They even reorder them to make efficient use of the disk arm
• Conceptually other hardware is very similar to disks
• Network buffers hold packets
• Audio device buffers hold sound samples
• Graphics card buffers hold video data
Modern disk controllers in a real OS

• Most disk controllers typically accept multiple outstanding disk
requests at a time
• They even reorder them to make efficient use of the disk arm
• Conceptually other hardware is very similar to disks
• Network buffers hold packets
• Audio device buffers hold sound samples
• Graphics card buffers hold video data
Modern disk controllers in a real OS

• Most disk controllers typically accept multiple outstanding disk
requests at a time
• They even reorder them to make efficient use of the disk arm
• Conceptually other hardware is very similar to disks
• Network buffers hold packets
• Audio device buffers hold sound samples
• Graphics card buffers hold video data
DMA

• High-bandwidth I/O devices, such as disks, graphics cards,
network cards, etc. often use direct memory access (DMA)
instead of explicit I/O (insl and outsl)
• Via DMA, controllers get direct access to physical memory
• The device driver passes the physical address of the buffer’s data
field to the device, which copies it from/to the main memory
• Once it is done, it generates an interrupt
• As a result of DMA, the CPU is not involved, hence making the
entire process more efficient
DMA

• High-bandwidth I/O devices, such as disks, graphics cards,
network cards, etc. often use direct memory access (DMA)
instead of explicit I/O (insl and outsl)
• Via DMA, controllers get direct access to physical memory
• The device driver passes the physical address of the buffer’s data
field to the device, which copies it from/to the main memory
• Once it is done, it generates an interrupt
• As a result of DMA, the CPU is not involved, hence making the
entire process more efficient
DMA

• High-bandwidth I/O devices, such as disks, graphics cards,
network cards, etc. often use direct memory access (DMA)
instead of explicit I/O (insl and outsl)
• Via DMA, controllers get direct access to physical memory
• The device driver passes the physical address of the buffer’s data
field to the device, which copies it from/to the main memory
• Once it is done, it generates an interrupt
• As a result of DMA, the CPU is not involved, hence making the
entire process more efficient
DMA

• High-bandwidth I/O devices, such as disks, graphics cards,
network cards, etc. often use direct memory access (DMA)
instead of explicit I/O (insl and outsl)
• Via DMA, controllers get direct access to physical memory
• The device driver passes the physical address of the buffer’s data
field to the device, which copies it from/to the main memory
• Once it is done, it generates an interrupt
• As a result of DMA, the CPU is not involved, hence making the
entire process more efficient
DMA

• High-bandwidth I/O devices, such as disks, graphics cards,
network cards, etc. often use direct memory access (DMA)
instead of explicit I/O (insl and outsl)
• Via DMA, controllers get direct access to physical memory
• The device driver passes the physical address of the buffer’s data
field to the device, which copies it from/to the main memory
• Once it is done, it generates an interrupt
• As a result of DMA, the CPU is not involved, hence making the
entire process more efficient
Dynamic interrupt routing

• In case of xv6 all disk interrupts are routed to CPU(n − 1)
• Real OSes use sophisticated algorithms to dynamically route
interrupts to processors
• The goal is to achieve optimum load balancing while maintaining
good locality
Dynamic interrupt routing

• In case of xv6 all disk interrupts are routed to CPU(n − 1)
• Real OSes use sophisticated algorithms to dynamically route
interrupts to processors
• The goal is to achieve optimum load balancing while maintaining
good locality
Dynamic interrupt routing

• In case of xv6 all disk interrupts are routed to CPU(n − 1)
• Real OSes use sophisticated algorithms to dynamically route
interrupts to processors
• The goal is to achieve optimum load balancing while maintaining
good locality
Reading(s)

• Chapter 3, “Traps, interrupts, and drivers”, section “Code:
Interrupts" onwards from “xv6: a simple, Unix-like teaching
operating system”

Más contenido relacionado

La actualidad más candente

Kernel Recipes 2015: Kernel packet capture technologies
Kernel Recipes 2015: Kernel packet capture technologiesKernel Recipes 2015: Kernel packet capture technologies
Kernel Recipes 2015: Kernel packet capture technologiesAnne Nicolas
 
Broken Linux Performance Tools 2016
Broken Linux Performance Tools 2016Broken Linux Performance Tools 2016
Broken Linux Performance Tools 2016Brendan Gregg
 
BPF: Tracing and more
BPF: Tracing and moreBPF: Tracing and more
BPF: Tracing and moreBrendan Gregg
 
Linux Interrupts
Linux InterruptsLinux Interrupts
Linux InterruptsKernel TLV
 
Kernel Recipes 2015 - So you want to write a Linux driver framework
Kernel Recipes 2015 - So you want to write a Linux driver frameworkKernel Recipes 2015 - So you want to write a Linux driver framework
Kernel Recipes 2015 - So you want to write a Linux driver frameworkAnne Nicolas
 
Block I/O Layer Tracing: blktrace
Block I/O Layer Tracing: blktraceBlock I/O Layer Tracing: blktrace
Block I/O Layer Tracing: blktraceBabak Farrokhi
 
SecureCore RTAS2013
SecureCore RTAS2013SecureCore RTAS2013
SecureCore RTAS2013mkyoon83
 
Linux Systems Performance 2016
Linux Systems Performance 2016Linux Systems Performance 2016
Linux Systems Performance 2016Brendan Gregg
 
EuroBSDcon 2017 System Performance Analysis Methodologies
EuroBSDcon 2017 System Performance Analysis MethodologiesEuroBSDcon 2017 System Performance Analysis Methodologies
EuroBSDcon 2017 System Performance Analysis MethodologiesBrendan Gregg
 
Systems Performance: Enterprise and the Cloud
Systems Performance: Enterprise and the CloudSystems Performance: Enterprise and the Cloud
Systems Performance: Enterprise and the CloudBrendan Gregg
 
Linux BPF Superpowers
Linux BPF SuperpowersLinux BPF Superpowers
Linux BPF SuperpowersBrendan Gregg
 
LinuxCon_2013_NA_Eckermann_Filesystems_btrfs.pdf
LinuxCon_2013_NA_Eckermann_Filesystems_btrfs.pdfLinuxCon_2013_NA_Eckermann_Filesystems_btrfs.pdf
LinuxCon_2013_NA_Eckermann_Filesystems_btrfs.pdfdegarden
 
The New Systems Performance
The New Systems PerformanceThe New Systems Performance
The New Systems PerformanceBrendan Gregg
 
Embedded Recipes 2018 - Finding sources of Latency In your system - Steven Ro...
Embedded Recipes 2018 - Finding sources of Latency In your system - Steven Ro...Embedded Recipes 2018 - Finding sources of Latency In your system - Steven Ro...
Embedded Recipes 2018 - Finding sources of Latency In your system - Steven Ro...Anne Nicolas
 
The Silence of the Canaries
The Silence of the CanariesThe Silence of the Canaries
The Silence of the CanariesKernel TLV
 
Container Performance Analysis
Container Performance AnalysisContainer Performance Analysis
Container Performance AnalysisBrendan Gregg
 
Linux kernel debugging
Linux kernel debuggingLinux kernel debugging
Linux kernel debugginglibfetion
 

La actualidad más candente (20)

Kernel Recipes 2015: Kernel packet capture technologies
Kernel Recipes 2015: Kernel packet capture technologiesKernel Recipes 2015: Kernel packet capture technologies
Kernel Recipes 2015: Kernel packet capture technologies
 
Broken Linux Performance Tools 2016
Broken Linux Performance Tools 2016Broken Linux Performance Tools 2016
Broken Linux Performance Tools 2016
 
BPF: Tracing and more
BPF: Tracing and moreBPF: Tracing and more
BPF: Tracing and more
 
Linux Interrupts
Linux InterruptsLinux Interrupts
Linux Interrupts
 
Kernel Recipes 2015 - So you want to write a Linux driver framework
Kernel Recipes 2015 - So you want to write a Linux driver frameworkKernel Recipes 2015 - So you want to write a Linux driver framework
Kernel Recipes 2015 - So you want to write a Linux driver framework
 
Tuned
TunedTuned
Tuned
 
Block I/O Layer Tracing: blktrace
Block I/O Layer Tracing: blktraceBlock I/O Layer Tracing: blktrace
Block I/O Layer Tracing: blktrace
 
SecureCore RTAS2013
SecureCore RTAS2013SecureCore RTAS2013
SecureCore RTAS2013
 
Speeding up ps and top
Speeding up ps and topSpeeding up ps and top
Speeding up ps and top
 
Linux Systems Performance 2016
Linux Systems Performance 2016Linux Systems Performance 2016
Linux Systems Performance 2016
 
EuroBSDcon 2017 System Performance Analysis Methodologies
EuroBSDcon 2017 System Performance Analysis MethodologiesEuroBSDcon 2017 System Performance Analysis Methodologies
EuroBSDcon 2017 System Performance Analysis Methodologies
 
Systems Performance: Enterprise and the Cloud
Systems Performance: Enterprise and the CloudSystems Performance: Enterprise and the Cloud
Systems Performance: Enterprise and the Cloud
 
Linux BPF Superpowers
Linux BPF SuperpowersLinux BPF Superpowers
Linux BPF Superpowers
 
LinuxCon_2013_NA_Eckermann_Filesystems_btrfs.pdf
LinuxCon_2013_NA_Eckermann_Filesystems_btrfs.pdfLinuxCon_2013_NA_Eckermann_Filesystems_btrfs.pdf
LinuxCon_2013_NA_Eckermann_Filesystems_btrfs.pdf
 
The New Systems Performance
The New Systems PerformanceThe New Systems Performance
The New Systems Performance
 
Embedded Recipes 2018 - Finding sources of Latency In your system - Steven Ro...
Embedded Recipes 2018 - Finding sources of Latency In your system - Steven Ro...Embedded Recipes 2018 - Finding sources of Latency In your system - Steven Ro...
Embedded Recipes 2018 - Finding sources of Latency In your system - Steven Ro...
 
The Silence of the Canaries
The Silence of the CanariesThe Silence of the Canaries
The Silence of the Canaries
 
Container Performance Analysis
Container Performance AnalysisContainer Performance Analysis
Container Performance Analysis
 
Making Linux do Hard Real-time
Making Linux do Hard Real-timeMaking Linux do Hard Real-time
Making Linux do Hard Real-time
 
Linux kernel debugging
Linux kernel debuggingLinux kernel debugging
Linux kernel debugging
 

Destacado

Topic 13: Cloud Stacks
Topic 13: Cloud StacksTopic 13: Cloud Stacks
Topic 13: Cloud StacksZubair Nabi
 
AOS Lab 7: Page tables
AOS Lab 7: Page tablesAOS Lab 7: Page tables
AOS Lab 7: Page tablesZubair Nabi
 
AOS Lab 1: Hello, Linux!
AOS Lab 1: Hello, Linux!AOS Lab 1: Hello, Linux!
AOS Lab 1: Hello, Linux!Zubair Nabi
 
AOS Lab 10: File system -- Inodes and beyond
AOS Lab 10: File system -- Inodes and beyondAOS Lab 10: File system -- Inodes and beyond
AOS Lab 10: File system -- Inodes and beyondZubair Nabi
 
AOS Lab 5: System calls
AOS Lab 5: System callsAOS Lab 5: System calls
AOS Lab 5: System callsZubair Nabi
 
AOS Lab 9: File system -- Of buffers, logs, and blocks
AOS Lab 9: File system -- Of buffers, logs, and blocksAOS Lab 9: File system -- Of buffers, logs, and blocks
AOS Lab 9: File system -- Of buffers, logs, and blocksZubair Nabi
 
AOS Lab 2: Hello, xv6!
AOS Lab 2: Hello, xv6!AOS Lab 2: Hello, xv6!
AOS Lab 2: Hello, xv6!Zubair Nabi
 
Topic 14: Operating Systems and Virtualization
Topic 14: Operating Systems and VirtualizationTopic 14: Operating Systems and Virtualization
Topic 14: Operating Systems and VirtualizationZubair Nabi
 
AOS Lab 12: Network Communication
AOS Lab 12: Network CommunicationAOS Lab 12: Network Communication
AOS Lab 12: Network CommunicationZubair Nabi
 
Topic 15: Datacenter Design and Networking
Topic 15: Datacenter Design and NetworkingTopic 15: Datacenter Design and Networking
Topic 15: Datacenter Design and NetworkingZubair Nabi
 
The Anatomy of Web Censorship in Pakistan
The Anatomy of Web Censorship in PakistanThe Anatomy of Web Censorship in Pakistan
The Anatomy of Web Censorship in PakistanZubair Nabi
 
AOS Lab 1: Hello, Linux!
AOS Lab 1: Hello, Linux!AOS Lab 1: Hello, Linux!
AOS Lab 1: Hello, Linux!Zubair Nabi
 
Raabta: Low-cost Video Conferencing for the Developing World
Raabta: Low-cost Video Conferencing for the Developing WorldRaabta: Low-cost Video Conferencing for the Developing World
Raabta: Low-cost Video Conferencing for the Developing WorldZubair Nabi
 
MapReduce and DBMS Hybrids
MapReduce and DBMS HybridsMapReduce and DBMS Hybrids
MapReduce and DBMS HybridsZubair Nabi
 
MapReduce Application Scripting
MapReduce Application ScriptingMapReduce Application Scripting
MapReduce Application ScriptingZubair Nabi
 
The Big Data Stack
The Big Data StackThe Big Data Stack
The Big Data StackZubair Nabi
 

Destacado (16)

Topic 13: Cloud Stacks
Topic 13: Cloud StacksTopic 13: Cloud Stacks
Topic 13: Cloud Stacks
 
AOS Lab 7: Page tables
AOS Lab 7: Page tablesAOS Lab 7: Page tables
AOS Lab 7: Page tables
 
AOS Lab 1: Hello, Linux!
AOS Lab 1: Hello, Linux!AOS Lab 1: Hello, Linux!
AOS Lab 1: Hello, Linux!
 
AOS Lab 10: File system -- Inodes and beyond
AOS Lab 10: File system -- Inodes and beyondAOS Lab 10: File system -- Inodes and beyond
AOS Lab 10: File system -- Inodes and beyond
 
AOS Lab 5: System calls
AOS Lab 5: System callsAOS Lab 5: System calls
AOS Lab 5: System calls
 
AOS Lab 9: File system -- Of buffers, logs, and blocks
AOS Lab 9: File system -- Of buffers, logs, and blocksAOS Lab 9: File system -- Of buffers, logs, and blocks
AOS Lab 9: File system -- Of buffers, logs, and blocks
 
AOS Lab 2: Hello, xv6!
AOS Lab 2: Hello, xv6!AOS Lab 2: Hello, xv6!
AOS Lab 2: Hello, xv6!
 
Topic 14: Operating Systems and Virtualization
Topic 14: Operating Systems and VirtualizationTopic 14: Operating Systems and Virtualization
Topic 14: Operating Systems and Virtualization
 
AOS Lab 12: Network Communication
AOS Lab 12: Network CommunicationAOS Lab 12: Network Communication
AOS Lab 12: Network Communication
 
Topic 15: Datacenter Design and Networking
Topic 15: Datacenter Design and NetworkingTopic 15: Datacenter Design and Networking
Topic 15: Datacenter Design and Networking
 
The Anatomy of Web Censorship in Pakistan
The Anatomy of Web Censorship in PakistanThe Anatomy of Web Censorship in Pakistan
The Anatomy of Web Censorship in Pakistan
 
AOS Lab 1: Hello, Linux!
AOS Lab 1: Hello, Linux!AOS Lab 1: Hello, Linux!
AOS Lab 1: Hello, Linux!
 
Raabta: Low-cost Video Conferencing for the Developing World
Raabta: Low-cost Video Conferencing for the Developing WorldRaabta: Low-cost Video Conferencing for the Developing World
Raabta: Low-cost Video Conferencing for the Developing World
 
MapReduce and DBMS Hybrids
MapReduce and DBMS HybridsMapReduce and DBMS Hybrids
MapReduce and DBMS Hybrids
 
MapReduce Application Scripting
MapReduce Application ScriptingMapReduce Application Scripting
MapReduce Application Scripting
 
The Big Data Stack
The Big Data StackThe Big Data Stack
The Big Data Stack
 

Similar a AOS Lab 8: Interrupts and Device Drivers

Functions of the Operating System
Functions of the Operating SystemFunctions of the Operating System
Functions of the Operating Systemandyr91
 
Let's write a Debugger!
Let's write a Debugger!Let's write a Debugger!
Let's write a Debugger!Levente Kurusa
 
Interrupt in real time system
Interrupt in real time system Interrupt in real time system
Interrupt in real time system ali jawad
 
Ch2.1 computer system structures
Ch2.1 computer system structures Ch2.1 computer system structures
Ch2.1 computer system structures Syaiful Ahdan
 
Multithreaded Programming Part- III.pdf
Multithreaded Programming Part- III.pdfMultithreaded Programming Part- III.pdf
Multithreaded Programming Part- III.pdfHarika Pudugosula
 
03_Top Level View of Computer Function and Interconnection.ppt
03_Top Level View of Computer Function and Interconnection.ppt03_Top Level View of Computer Function and Interconnection.ppt
03_Top Level View of Computer Function and Interconnection.pptChABiDRazZaQ
 
Operating System-Ch2 computer system structures
Operating System-Ch2 computer system structuresOperating System-Ch2 computer system structures
Operating System-Ch2 computer system structuresSyaiful Ahdan
 
Operating system enhancements to prevent misuse of systems
Operating system enhancements to prevent misuse of systemsOperating system enhancements to prevent misuse of systems
Operating system enhancements to prevent misuse of systemsDayal Dilli
 
Automating the Hunt for Non-Obvious Sources of Latency Spreads
Automating the Hunt for Non-Obvious Sources of Latency SpreadsAutomating the Hunt for Non-Obvious Sources of Latency Spreads
Automating the Hunt for Non-Obvious Sources of Latency SpreadsScyllaDB
 

Similar a AOS Lab 8: Interrupts and Device Drivers (20)

Interrupts.ppt
Interrupts.pptInterrupts.ppt
Interrupts.ppt
 
Os introduction
Os introductionOs introduction
Os introduction
 
Os introduction
Os introductionOs introduction
Os introduction
 
Techno-Fest-15nov16
Techno-Fest-15nov16Techno-Fest-15nov16
Techno-Fest-15nov16
 
12879591.ppt
12879591.ppt12879591.ppt
12879591.ppt
 
Functions of the Operating System
Functions of the Operating SystemFunctions of the Operating System
Functions of the Operating System
 
Let's write a Debugger!
Let's write a Debugger!Let's write a Debugger!
Let's write a Debugger!
 
Interrupt in real time system
Interrupt in real time system Interrupt in real time system
Interrupt in real time system
 
Ch2.1 computer system structures
Ch2.1 computer system structures Ch2.1 computer system structures
Ch2.1 computer system structures
 
Multithreaded Programming Part- III.pdf
Multithreaded Programming Part- III.pdfMultithreaded Programming Part- III.pdf
Multithreaded Programming Part- III.pdf
 
Unit 5 ppt
Unit 5 pptUnit 5 ppt
Unit 5 ppt
 
Interrupts in CPU
Interrupts in CPUInterrupts in CPU
Interrupts in CPU
 
Lec 2
Lec 2Lec 2
Lec 2
 
03_Top Level View of Computer Function and Interconnection.ppt
03_Top Level View of Computer Function and Interconnection.ppt03_Top Level View of Computer Function and Interconnection.ppt
03_Top Level View of Computer Function and Interconnection.ppt
 
Operating System-Ch2 computer system structures
Operating System-Ch2 computer system structuresOperating System-Ch2 computer system structures
Operating System-Ch2 computer system structures
 
Windows kernel
Windows kernelWindows kernel
Windows kernel
 
Cache profiling on ARM Linux
Cache profiling on ARM LinuxCache profiling on ARM Linux
Cache profiling on ARM Linux
 
Operating Systems
Operating Systems Operating Systems
Operating Systems
 
Operating system enhancements to prevent misuse of systems
Operating system enhancements to prevent misuse of systemsOperating system enhancements to prevent misuse of systems
Operating system enhancements to prevent misuse of systems
 
Automating the Hunt for Non-Obvious Sources of Latency Spreads
Automating the Hunt for Non-Obvious Sources of Latency SpreadsAutomating the Hunt for Non-Obvious Sources of Latency Spreads
Automating the Hunt for Non-Obvious Sources of Latency Spreads
 

Más de Zubair Nabi

Lab 5: Interconnecting a Datacenter using Mininet
Lab 5: Interconnecting a Datacenter using MininetLab 5: Interconnecting a Datacenter using Mininet
Lab 5: Interconnecting a Datacenter using MininetZubair Nabi
 
Topic 12: NoSQL in Action
Topic 12: NoSQL in ActionTopic 12: NoSQL in Action
Topic 12: NoSQL in ActionZubair Nabi
 
Lab 4: Interfacing with Cassandra
Lab 4: Interfacing with CassandraLab 4: Interfacing with Cassandra
Lab 4: Interfacing with CassandraZubair Nabi
 
Topic 10: Taxonomy of Data and Storage
Topic 10: Taxonomy of Data and StorageTopic 10: Taxonomy of Data and Storage
Topic 10: Taxonomy of Data and StorageZubair Nabi
 
Topic 11: Google Filesystem
Topic 11: Google FilesystemTopic 11: Google Filesystem
Topic 11: Google FilesystemZubair Nabi
 
Lab 3: Writing a Naiad Application
Lab 3: Writing a Naiad ApplicationLab 3: Writing a Naiad Application
Lab 3: Writing a Naiad ApplicationZubair Nabi
 
Topic 8: Enhancements and Alternative Architectures
Topic 8: Enhancements and Alternative ArchitecturesTopic 8: Enhancements and Alternative Architectures
Topic 8: Enhancements and Alternative ArchitecturesZubair Nabi
 
Topic 7: Shortcomings in the MapReduce Paradigm
Topic 7: Shortcomings in the MapReduce ParadigmTopic 7: Shortcomings in the MapReduce Paradigm
Topic 7: Shortcomings in the MapReduce ParadigmZubair Nabi
 
Lab 1: Introduction to Amazon EC2 and MPI
Lab 1: Introduction to Amazon EC2 and MPILab 1: Introduction to Amazon EC2 and MPI
Lab 1: Introduction to Amazon EC2 and MPIZubair Nabi
 
Topic 6: MapReduce Applications
Topic 6: MapReduce ApplicationsTopic 6: MapReduce Applications
Topic 6: MapReduce ApplicationsZubair Nabi
 

Más de Zubair Nabi (11)

Lab 5: Interconnecting a Datacenter using Mininet
Lab 5: Interconnecting a Datacenter using MininetLab 5: Interconnecting a Datacenter using Mininet
Lab 5: Interconnecting a Datacenter using Mininet
 
Topic 12: NoSQL in Action
Topic 12: NoSQL in ActionTopic 12: NoSQL in Action
Topic 12: NoSQL in Action
 
Lab 4: Interfacing with Cassandra
Lab 4: Interfacing with CassandraLab 4: Interfacing with Cassandra
Lab 4: Interfacing with Cassandra
 
Topic 10: Taxonomy of Data and Storage
Topic 10: Taxonomy of Data and StorageTopic 10: Taxonomy of Data and Storage
Topic 10: Taxonomy of Data and Storage
 
Topic 11: Google Filesystem
Topic 11: Google FilesystemTopic 11: Google Filesystem
Topic 11: Google Filesystem
 
Lab 3: Writing a Naiad Application
Lab 3: Writing a Naiad ApplicationLab 3: Writing a Naiad Application
Lab 3: Writing a Naiad Application
 
Topic 9: MR+
Topic 9: MR+Topic 9: MR+
Topic 9: MR+
 
Topic 8: Enhancements and Alternative Architectures
Topic 8: Enhancements and Alternative ArchitecturesTopic 8: Enhancements and Alternative Architectures
Topic 8: Enhancements and Alternative Architectures
 
Topic 7: Shortcomings in the MapReduce Paradigm
Topic 7: Shortcomings in the MapReduce ParadigmTopic 7: Shortcomings in the MapReduce Paradigm
Topic 7: Shortcomings in the MapReduce Paradigm
 
Lab 1: Introduction to Amazon EC2 and MPI
Lab 1: Introduction to Amazon EC2 and MPILab 1: Introduction to Amazon EC2 and MPI
Lab 1: Introduction to Amazon EC2 and MPI
 
Topic 6: MapReduce Applications
Topic 6: MapReduce ApplicationsTopic 6: MapReduce Applications
Topic 6: MapReduce Applications
 

Último

A Call to Action for Generative AI in 2024
A Call to Action for Generative AI in 2024A Call to Action for Generative AI in 2024
A Call to Action for Generative AI in 2024Results
 
04-2024-HHUG-Sales-and-Marketing-Alignment.pptx
04-2024-HHUG-Sales-and-Marketing-Alignment.pptx04-2024-HHUG-Sales-and-Marketing-Alignment.pptx
04-2024-HHUG-Sales-and-Marketing-Alignment.pptxHampshireHUG
 
TrustArc Webinar - Stay Ahead of US State Data Privacy Law Developments
TrustArc Webinar - Stay Ahead of US State Data Privacy Law DevelopmentsTrustArc Webinar - Stay Ahead of US State Data Privacy Law Developments
TrustArc Webinar - Stay Ahead of US State Data Privacy Law DevelopmentsTrustArc
 
Histor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slideHistor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slidevu2urc
 
The Role of Taxonomy and Ontology in Semantic Layers - Heather Hedden.pdf
The Role of Taxonomy and Ontology in Semantic Layers - Heather Hedden.pdfThe Role of Taxonomy and Ontology in Semantic Layers - Heather Hedden.pdf
The Role of Taxonomy and Ontology in Semantic Layers - Heather Hedden.pdfEnterprise Knowledge
 
Presentation on how to chat with PDF using ChatGPT code interpreter
Presentation on how to chat with PDF using ChatGPT code interpreterPresentation on how to chat with PDF using ChatGPT code interpreter
Presentation on how to chat with PDF using ChatGPT code interpreternaman860154
 
08448380779 Call Girls In Friends Colony Women Seeking Men
08448380779 Call Girls In Friends Colony Women Seeking Men08448380779 Call Girls In Friends Colony Women Seeking Men
08448380779 Call Girls In Friends Colony Women Seeking MenDelhi Call girls
 
CNv6 Instructor Chapter 6 Quality of Service
CNv6 Instructor Chapter 6 Quality of ServiceCNv6 Instructor Chapter 6 Quality of Service
CNv6 Instructor Chapter 6 Quality of Servicegiselly40
 
Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)wesley chun
 
Data Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt RobisonData Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt RobisonAnna Loughnan Colquhoun
 
Workshop - Best of Both Worlds_ Combine KG and Vector search for enhanced R...
Workshop - Best of Both Worlds_ Combine  KG and Vector search for  enhanced R...Workshop - Best of Both Worlds_ Combine  KG and Vector search for  enhanced R...
Workshop - Best of Both Worlds_ Combine KG and Vector search for enhanced R...Neo4j
 
08448380779 Call Girls In Diplomatic Enclave Women Seeking Men
08448380779 Call Girls In Diplomatic Enclave Women Seeking Men08448380779 Call Girls In Diplomatic Enclave Women Seeking Men
08448380779 Call Girls In Diplomatic Enclave Women Seeking MenDelhi Call girls
 
Slack Application Development 101 Slides
Slack Application Development 101 SlidesSlack Application Development 101 Slides
Slack Application Development 101 Slidespraypatel2
 
How to convert PDF to text with Nanonets
How to convert PDF to text with NanonetsHow to convert PDF to text with Nanonets
How to convert PDF to text with Nanonetsnaman860154
 
IAC 2024 - IA Fast Track to Search Focused AI Solutions
IAC 2024 - IA Fast Track to Search Focused AI SolutionsIAC 2024 - IA Fast Track to Search Focused AI Solutions
IAC 2024 - IA Fast Track to Search Focused AI SolutionsEnterprise Knowledge
 
Automating Google Workspace (GWS) & more with Apps Script
Automating Google Workspace (GWS) & more with Apps ScriptAutomating Google Workspace (GWS) & more with Apps Script
Automating Google Workspace (GWS) & more with Apps Scriptwesley chun
 
The 7 Things I Know About Cyber Security After 25 Years | April 2024
The 7 Things I Know About Cyber Security After 25 Years | April 2024The 7 Things I Know About Cyber Security After 25 Years | April 2024
The 7 Things I Know About Cyber Security After 25 Years | April 2024Rafal Los
 
08448380779 Call Girls In Greater Kailash - I Women Seeking Men
08448380779 Call Girls In Greater Kailash - I Women Seeking Men08448380779 Call Girls In Greater Kailash - I Women Seeking Men
08448380779 Call Girls In Greater Kailash - I Women Seeking MenDelhi Call girls
 
2024: Domino Containers - The Next Step. News from the Domino Container commu...
2024: Domino Containers - The Next Step. News from the Domino Container commu...2024: Domino Containers - The Next Step. News from the Domino Container commu...
2024: Domino Containers - The Next Step. News from the Domino Container commu...Martijn de Jong
 
🐬 The future of MySQL is Postgres 🐘
🐬  The future of MySQL is Postgres   🐘🐬  The future of MySQL is Postgres   🐘
🐬 The future of MySQL is Postgres 🐘RTylerCroy
 

Último (20)

A Call to Action for Generative AI in 2024
A Call to Action for Generative AI in 2024A Call to Action for Generative AI in 2024
A Call to Action for Generative AI in 2024
 
04-2024-HHUG-Sales-and-Marketing-Alignment.pptx
04-2024-HHUG-Sales-and-Marketing-Alignment.pptx04-2024-HHUG-Sales-and-Marketing-Alignment.pptx
04-2024-HHUG-Sales-and-Marketing-Alignment.pptx
 
TrustArc Webinar - Stay Ahead of US State Data Privacy Law Developments
TrustArc Webinar - Stay Ahead of US State Data Privacy Law DevelopmentsTrustArc Webinar - Stay Ahead of US State Data Privacy Law Developments
TrustArc Webinar - Stay Ahead of US State Data Privacy Law Developments
 
Histor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slideHistor y of HAM Radio presentation slide
Histor y of HAM Radio presentation slide
 
The Role of Taxonomy and Ontology in Semantic Layers - Heather Hedden.pdf
The Role of Taxonomy and Ontology in Semantic Layers - Heather Hedden.pdfThe Role of Taxonomy and Ontology in Semantic Layers - Heather Hedden.pdf
The Role of Taxonomy and Ontology in Semantic Layers - Heather Hedden.pdf
 
Presentation on how to chat with PDF using ChatGPT code interpreter
Presentation on how to chat with PDF using ChatGPT code interpreterPresentation on how to chat with PDF using ChatGPT code interpreter
Presentation on how to chat with PDF using ChatGPT code interpreter
 
08448380779 Call Girls In Friends Colony Women Seeking Men
08448380779 Call Girls In Friends Colony Women Seeking Men08448380779 Call Girls In Friends Colony Women Seeking Men
08448380779 Call Girls In Friends Colony Women Seeking Men
 
CNv6 Instructor Chapter 6 Quality of Service
CNv6 Instructor Chapter 6 Quality of ServiceCNv6 Instructor Chapter 6 Quality of Service
CNv6 Instructor Chapter 6 Quality of Service
 
Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)Powerful Google developer tools for immediate impact! (2023-24 C)
Powerful Google developer tools for immediate impact! (2023-24 C)
 
Data Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt RobisonData Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt Robison
 
Workshop - Best of Both Worlds_ Combine KG and Vector search for enhanced R...
Workshop - Best of Both Worlds_ Combine  KG and Vector search for  enhanced R...Workshop - Best of Both Worlds_ Combine  KG and Vector search for  enhanced R...
Workshop - Best of Both Worlds_ Combine KG and Vector search for enhanced R...
 
08448380779 Call Girls In Diplomatic Enclave Women Seeking Men
08448380779 Call Girls In Diplomatic Enclave Women Seeking Men08448380779 Call Girls In Diplomatic Enclave Women Seeking Men
08448380779 Call Girls In Diplomatic Enclave Women Seeking Men
 
Slack Application Development 101 Slides
Slack Application Development 101 SlidesSlack Application Development 101 Slides
Slack Application Development 101 Slides
 
How to convert PDF to text with Nanonets
How to convert PDF to text with NanonetsHow to convert PDF to text with Nanonets
How to convert PDF to text with Nanonets
 
IAC 2024 - IA Fast Track to Search Focused AI Solutions
IAC 2024 - IA Fast Track to Search Focused AI SolutionsIAC 2024 - IA Fast Track to Search Focused AI Solutions
IAC 2024 - IA Fast Track to Search Focused AI Solutions
 
Automating Google Workspace (GWS) & more with Apps Script
Automating Google Workspace (GWS) & more with Apps ScriptAutomating Google Workspace (GWS) & more with Apps Script
Automating Google Workspace (GWS) & more with Apps Script
 
The 7 Things I Know About Cyber Security After 25 Years | April 2024
The 7 Things I Know About Cyber Security After 25 Years | April 2024The 7 Things I Know About Cyber Security After 25 Years | April 2024
The 7 Things I Know About Cyber Security After 25 Years | April 2024
 
08448380779 Call Girls In Greater Kailash - I Women Seeking Men
08448380779 Call Girls In Greater Kailash - I Women Seeking Men08448380779 Call Girls In Greater Kailash - I Women Seeking Men
08448380779 Call Girls In Greater Kailash - I Women Seeking Men
 
2024: Domino Containers - The Next Step. News from the Domino Container commu...
2024: Domino Containers - The Next Step. News from the Domino Container commu...2024: Domino Containers - The Next Step. News from the Domino Container commu...
2024: Domino Containers - The Next Step. News from the Domino Container commu...
 
🐬 The future of MySQL is Postgres 🐘
🐬  The future of MySQL is Postgres   🐘🐬  The future of MySQL is Postgres   🐘
🐬 The future of MySQL is Postgres 🐘
 

AOS Lab 8: Interrupts and Device Drivers

  • 1. Lab 8: Interrupts and Device Drivers Advanced Operating Systems Zubair Nabi zubair.nabi@itu.edu.pk March 28, 2013
  • 2. Recap of Lab 5: Extraordinary events Events that break normal processor flow, to return control to the kernel: 1 A device signals that it needs attention (e.g. Timer): Interrupt 2 A user program does something illegal (e.g. divide by zero): Exception 3 A user program asks the kernel for a service: System call
  • 3. Recap of Lab 5: Extraordinary events Events that break normal processor flow, to return control to the kernel: 1 A device signals that it needs attention (e.g. Timer): Interrupt 2 A user program does something illegal (e.g. divide by zero): Exception 3 A user program asks the kernel for a service: System call
  • 4. Recap of Lab 5: Extraordinary events Events that break normal processor flow, to return control to the kernel: 1 A device signals that it needs attention (e.g. Timer): Interrupt 2 A user program does something illegal (e.g. divide by zero): Exception 3 A user program asks the kernel for a service: System call
  • 5. Recap of Lab 5: Extraordinary events Events that break normal processor flow, to return control to the kernel: 1 A device signals that it needs attention (e.g. Timer): Interrupt 2 A user program does something illegal (e.g. divide by zero): Exception 3 A user program asks the kernel for a service: System call
  • 6. Recap of Lab 5: Handling extraordinary events The operating system must: 1 Save the processor’s registers for future resumption 2 Set up system for execution in the kernel 3 Choose a place for the kernel to start execution 4 Retrieve information about the event and call corresponding interrupt handler 5 All the while, maintain isolation between user processes and the kernel
  • 7. Recap of Lab 5: Handling extraordinary events The operating system must: 1 Save the processor’s registers for future resumption 2 Set up system for execution in the kernel 3 Choose a place for the kernel to start execution 4 Retrieve information about the event and call corresponding interrupt handler 5 All the while, maintain isolation between user processes and the kernel
  • 8. Recap of Lab 5: Handling extraordinary events The operating system must: 1 Save the processor’s registers for future resumption 2 Set up system for execution in the kernel 3 Choose a place for the kernel to start execution 4 Retrieve information about the event and call corresponding interrupt handler 5 All the while, maintain isolation between user processes and the kernel
  • 9. Recap of Lab 5: Handling extraordinary events The operating system must: 1 Save the processor’s registers for future resumption 2 Set up system for execution in the kernel 3 Choose a place for the kernel to start execution 4 Retrieve information about the event and call corresponding interrupt handler 5 All the while, maintain isolation between user processes and the kernel
  • 10. Recap of Lab 5: Handling extraordinary events The operating system must: 1 Save the processor’s registers for future resumption 2 Set up system for execution in the kernel 3 Choose a place for the kernel to start execution 4 Retrieve information about the event and call corresponding interrupt handler 5 All the while, maintain isolation between user processes and the kernel
  • 11. Recap of Lab 5: Handling extraordinary events The operating system must: 1 Save the processor’s registers for future resumption 2 Set up system for execution in the kernel 3 Choose a place for the kernel to start execution 4 Retrieve information about the event and call corresponding interrupt handler 5 All the while, maintain isolation between user processes and the kernel
  • 12. Recap of Lab 5: Handling extraordinary events (2) • Need hardware support • On the x86, system calls generate an interrupt via the int instruction • The same mechanism for handling interrupts is used for handling system calls and exceptions • Traps are caused by the current running process • Interrupts are caused by devices • Can happen concurrently
  • 13. Recap of Lab 5: Handling extraordinary events (2) • Need hardware support • On the x86, system calls generate an interrupt via the int instruction • The same mechanism for handling interrupts is used for handling system calls and exceptions • Traps are caused by the current running process • Interrupts are caused by devices • Can happen concurrently
  • 14. Recap of Lab 5: Handling extraordinary events (2) • Need hardware support • On the x86, system calls generate an interrupt via the int instruction • The same mechanism for handling interrupts is used for handling system calls and exceptions • Traps are caused by the current running process • Interrupts are caused by devices • Can happen concurrently
  • 15. Recap of Lab 5: Handling extraordinary events (2) • Need hardware support • On the x86, system calls generate an interrupt via the int instruction • The same mechanism for handling interrupts is used for handling system calls and exceptions • Traps are caused by the current running process • Interrupts are caused by devices • Can happen concurrently
  • 16. Recap of Lab 5: Handling extraordinary events (2) • Need hardware support • On the x86, system calls generate an interrupt via the int instruction • The same mechanism for handling interrupts is used for handling system calls and exceptions • Traps are caused by the current running process • Interrupts are caused by devices • Can happen concurrently
  • 17. Recap of Lab 5: Handling extraordinary events (2) • Need hardware support • On the x86, system calls generate an interrupt via the int instruction • The same mechanism for handling interrupts is used for handling system calls and exceptions • Traps are caused by the current running process • Interrupts are caused by devices • Can happen concurrently
  • 18. Recap of Lab 5: trap • Gets passed struct trapframe *tf • Checks tf->trapno to decide if it was called for a system call (T_SYSCALL) or a hardware interrupt or an exception • In case of: 1 System call, it invokes syscall 2 3 Hardware interrupt, it calls the hardware interrupt controller Exception, it prints the details and kills the user process
  • 19. Recap of Lab 5: trap • Gets passed struct trapframe *tf • Checks tf->trapno to decide if it was called for a system call (T_SYSCALL) or a hardware interrupt or an exception • In case of: 1 System call, it invokes syscall 2 3 Hardware interrupt, it calls the hardware interrupt controller Exception, it prints the details and kills the user process
  • 20. Recap of Lab 5: trap • Gets passed struct trapframe *tf • Checks tf->trapno to decide if it was called for a system call (T_SYSCALL) or a hardware interrupt or an exception • In case of: 1 System call, it invokes syscall 2 3 Hardware interrupt, it calls the hardware interrupt controller Exception, it prints the details and kills the user process
  • 21. Recap of Lab 5: trap • Gets passed struct trapframe *tf • Checks tf->trapno to decide if it was called for a system call (T_SYSCALL) or a hardware interrupt or an exception • In case of: 1 System call, it invokes syscall 2 3 Hardware interrupt, it calls the hardware interrupt controller Exception, it prints the details and kills the user process
  • 22. Recap of Lab 5: trap • Gets passed struct trapframe *tf • Checks tf->trapno to decide if it was called for a system call (T_SYSCALL) or a hardware interrupt or an exception • In case of: 1 System call, it invokes syscall 2 3 Hardware interrupt, it calls the hardware interrupt controller Exception, it prints the details and kills the user process
  • 23. Interrupts • Examples of interrupts: Pressing a key on the keyboard, storing data on disk etc. • Hardware on the motherboard signals the CPU whenever a device needs attention • Devices need to be programmed to generate interrupts • Interrupts must be assigned to a CPU for handling
  • 24. Interrupts • Examples of interrupts: Pressing a key on the keyboard, storing data on disk etc. • Hardware on the motherboard signals the CPU whenever a device needs attention • Devices need to be programmed to generate interrupts • Interrupts must be assigned to a CPU for handling
  • 25. Interrupts • Examples of interrupts: Pressing a key on the keyboard, storing data on disk etc. • Hardware on the motherboard signals the CPU whenever a device needs attention • Devices need to be programmed to generate interrupts • Interrupts must be assigned to a CPU for handling
  • 26. Interrupts • Examples of interrupts: Pressing a key on the keyboard, storing data on disk etc. • Hardware on the motherboard signals the CPU whenever a device needs attention • Devices need to be programmed to generate interrupts • Interrupts must be assigned to a CPU for handling
  • 27. Handing interrupts on multi-processors Two parts of handling interrupts on multi-processors 1 A method to route interrupts to processors (I/O APIC – Advanced Programmable Interrupt Controller, ioapic.c) 2 A per CPU interrupt controller to handle interrupts (Local APIC, lapic.c) The OS needs to program both the IOAPIC and the LAPIC
  • 28. Handing interrupts on multi-processors Two parts of handling interrupts on multi-processors 1 A method to route interrupts to processors (I/O APIC – Advanced Programmable Interrupt Controller, ioapic.c) 2 A per CPU interrupt controller to handle interrupts (Local APIC, lapic.c) The OS needs to program both the IOAPIC and the LAPIC
  • 29. Handing interrupts on multi-processors Two parts of handling interrupts on multi-processors 1 A method to route interrupts to processors (I/O APIC – Advanced Programmable Interrupt Controller, ioapic.c) 2 A per CPU interrupt controller to handle interrupts (Local APIC, lapic.c) The OS needs to program both the IOAPIC and the LAPIC
  • 30. IOAPIC • Interrupts are generated by the APIC labelled from IRQ0 to IRQ16 or IRQ24 • A device enables particular interrupts within the IOAPIC table and specifies which processor they should be routed to • For instance, the keyboard interrupt is routed to CPU0 while disk interrupts are routed to CPU(n − 1), where n is the number of CPUs • Every CPU decides whether it wants to receive interrupts. For instance, scheduler() disables all interrupts
  • 31. IOAPIC • Interrupts are generated by the APIC labelled from IRQ0 to IRQ16 or IRQ24 • A device enables particular interrupts within the IOAPIC table and specifies which processor they should be routed to • For instance, the keyboard interrupt is routed to CPU0 while disk interrupts are routed to CPU(n − 1), where n is the number of CPUs • Every CPU decides whether it wants to receive interrupts. For instance, scheduler() disables all interrupts
  • 32. IOAPIC • Interrupts are generated by the APIC labelled from IRQ0 to IRQ16 or IRQ24 • A device enables particular interrupts within the IOAPIC table and specifies which processor they should be routed to • For instance, the keyboard interrupt is routed to CPU0 while disk interrupts are routed to CPU(n − 1), where n is the number of CPUs • Every CPU decides whether it wants to receive interrupts. For instance, scheduler() disables all interrupts
  • 33. IOAPIC • Interrupts are generated by the APIC labelled from IRQ0 to IRQ16 or IRQ24 • A device enables particular interrupts within the IOAPIC table and specifies which processor they should be routed to • For instance, the keyboard interrupt is routed to CPU0 while disk interrupts are routed to CPU(n − 1), where n is the number of CPUs • Every CPU decides whether it wants to receive interrupts. For instance, scheduler() disables all interrupts
  • 34. LAPIC • Each CPU has its own LAPIC • xv6 programs the LAPIC using lapicinit()
  • 35. LAPIC • Each CPU has its own LAPIC • xv6 programs the LAPIC using lapicinit()
  • 36. Example: Timer interrupt • The kernel uses timer interrupts to get a notion of time and to make scheduling decisions • A value of 100 timer ticks is used by default which is high enough to allow interactivity and low enough not to lead to a live lock • This value is set in lapicinit() and IRQ_TIMER is mapped to IRQ0 • IRQ_TIMER corresponds to interrupt number 32 • In trap(), for interrupt number 32, the timer tick is incremented and processes sleeping on it are woken up
  • 37. Example: Timer interrupt • The kernel uses timer interrupts to get a notion of time and to make scheduling decisions • A value of 100 timer ticks is used by default which is high enough to allow interactivity and low enough not to lead to a live lock • This value is set in lapicinit() and IRQ_TIMER is mapped to IRQ0 • IRQ_TIMER corresponds to interrupt number 32 • In trap(), for interrupt number 32, the timer tick is incremented and processes sleeping on it are woken up
  • 38. Example: Timer interrupt • The kernel uses timer interrupts to get a notion of time and to make scheduling decisions • A value of 100 timer ticks is used by default which is high enough to allow interactivity and low enough not to lead to a live lock • This value is set in lapicinit() and IRQ_TIMER is mapped to IRQ0 • IRQ_TIMER corresponds to interrupt number 32 • In trap(), for interrupt number 32, the timer tick is incremented and processes sleeping on it are woken up
  • 39. Example: Timer interrupt • The kernel uses timer interrupts to get a notion of time and to make scheduling decisions • A value of 100 timer ticks is used by default which is high enough to allow interactivity and low enough not to lead to a live lock • This value is set in lapicinit() and IRQ_TIMER is mapped to IRQ0 • IRQ_TIMER corresponds to interrupt number 32 • In trap(), for interrupt number 32, the timer tick is incremented and processes sleeping on it are woken up
  • 40. Example: Timer interrupt • The kernel uses timer interrupts to get a notion of time and to make scheduling decisions • A value of 100 timer ticks is used by default which is high enough to allow interactivity and low enough not to lead to a live lock • This value is set in lapicinit() and IRQ_TIMER is mapped to IRQ0 • IRQ_TIMER corresponds to interrupt number 32 • In trap(), for interrupt number 32, the timer tick is incremented and processes sleeping on it are woken up
  • 41. Device Driver • A piece of code in the OS that manages a particular device • Provides interrupt handlers for a device • Causes a device to perform operations • Causes a device to generate interrupts • Non-trivial to write as a driver executes concurrently with the device that it manages • Driver also needs to understand the hardware interface of the device
  • 42. Device Driver • A piece of code in the OS that manages a particular device • Provides interrupt handlers for a device • Causes a device to perform operations • Causes a device to generate interrupts • Non-trivial to write as a driver executes concurrently with the device that it manages • Driver also needs to understand the hardware interface of the device
  • 43. Device Driver • A piece of code in the OS that manages a particular device • Provides interrupt handlers for a device • Causes a device to perform operations • Causes a device to generate interrupts • Non-trivial to write as a driver executes concurrently with the device that it manages • Driver also needs to understand the hardware interface of the device
  • 44. Device Driver • A piece of code in the OS that manages a particular device • Provides interrupt handlers for a device • Causes a device to perform operations • Causes a device to generate interrupts • Non-trivial to write as a driver executes concurrently with the device that it manages • Driver also needs to understand the hardware interface of the device
  • 45. Device Driver • A piece of code in the OS that manages a particular device • Provides interrupt handlers for a device • Causes a device to perform operations • Causes a device to generate interrupts • Non-trivial to write as a driver executes concurrently with the device that it manages • Driver also needs to understand the hardware interface of the device
  • 46. Device Driver • A piece of code in the OS that manages a particular device • Provides interrupt handlers for a device • Causes a device to perform operations • Causes a device to generate interrupts • Non-trivial to write as a driver executes concurrently with the device that it manages • Driver also needs to understand the hardware interface of the device
  • 47. Example: Disk driver • In charge of copying data back and forth from the disk • Data is represented on the disk as a sequence of sectors, each containing 512-byte blocks • Sector 0 represents the first 512 bytes, sector 1 the next 512, and so on • The OS has a corresponding structure (struct buf) that maps to one sector • The data within the OS sector structure is often out of sync with the disk • xv6 implements an IDE driver
  • 48. Example: Disk driver • In charge of copying data back and forth from the disk • Data is represented on the disk as a sequence of sectors, each containing 512-byte blocks • Sector 0 represents the first 512 bytes, sector 1 the next 512, and so on • The OS has a corresponding structure (struct buf) that maps to one sector • The data within the OS sector structure is often out of sync with the disk • xv6 implements an IDE driver
  • 49. Example: Disk driver • In charge of copying data back and forth from the disk • Data is represented on the disk as a sequence of sectors, each containing 512-byte blocks • Sector 0 represents the first 512 bytes, sector 1 the next 512, and so on • The OS has a corresponding structure (struct buf) that maps to one sector • The data within the OS sector structure is often out of sync with the disk • xv6 implements an IDE driver
  • 50. Example: Disk driver • In charge of copying data back and forth from the disk • Data is represented on the disk as a sequence of sectors, each containing 512-byte blocks • Sector 0 represents the first 512 bytes, sector 1 the next 512, and so on • The OS has a corresponding structure (struct buf) that maps to one sector • The data within the OS sector structure is often out of sync with the disk • xv6 implements an IDE driver
  • 51. Example: Disk driver • In charge of copying data back and forth from the disk • Data is represented on the disk as a sequence of sectors, each containing 512-byte blocks • Sector 0 represents the first 512 bytes, sector 1 the next 512, and so on • The OS has a corresponding structure (struct buf) that maps to one sector • The data within the OS sector structure is often out of sync with the disk • xv6 implements an IDE driver
  • 52. Example: Disk driver • In charge of copying data back and forth from the disk • Data is represented on the disk as a sequence of sectors, each containing 512-byte blocks • Sector 0 represents the first 512 bytes, sector 1 the next 512, and so on • The OS has a corresponding structure (struct buf) that maps to one sector • The data within the OS sector structure is often out of sync with the disk • xv6 implements an IDE driver
  • 53. Code: struct buf struct buf { int flags; uint dev; uint sector; struct buf *prev; struct buf *next; struct buf *qnext; uchar data[512]; }; #define B_BUSY 0x1 #define B_VALID 0x2 #define B_DIRTY 0x4
  • 54. Example: Disk driver initialization • ideinit() is invoked by main(), which initializes the disk driver 1 ideinit() sets up CPU(n − 1) to handle disk interrupts 2 It then makes a call to idewait() to wait for disk 0 to initialize • It assumes that at least disk 0 is present because the boot loader and the kernel were obviously loaded from it 3 idewait() polls the status bits of the disk hardware, until IDE_BSY is clear and IDE_DRDY is set 4 It then checks whether another disk is present
  • 55. Example: Disk driver initialization • ideinit() is invoked by main(), which initializes the disk driver 1 ideinit() sets up CPU(n − 1) to handle disk interrupts 2 It then makes a call to idewait() to wait for disk 0 to initialize • It assumes that at least disk 0 is present because the boot loader and the kernel were obviously loaded from it 3 idewait() polls the status bits of the disk hardware, until IDE_BSY is clear and IDE_DRDY is set 4 It then checks whether another disk is present
  • 56. Example: Disk driver initialization • ideinit() is invoked by main(), which initializes the disk driver 1 ideinit() sets up CPU(n − 1) to handle disk interrupts 2 It then makes a call to idewait() to wait for disk 0 to initialize • It assumes that at least disk 0 is present because the boot loader and the kernel were obviously loaded from it 3 idewait() polls the status bits of the disk hardware, until IDE_BSY is clear and IDE_DRDY is set 4 It then checks whether another disk is present
  • 57. Example: Disk driver initialization • ideinit() is invoked by main(), which initializes the disk driver 1 ideinit() sets up CPU(n − 1) to handle disk interrupts 2 It then makes a call to idewait() to wait for disk 0 to initialize • It assumes that at least disk 0 is present because the boot loader and the kernel were obviously loaded from it 3 idewait() polls the status bits of the disk hardware, until IDE_BSY is clear and IDE_DRDY is set 4 It then checks whether another disk is present
  • 58. Example: Disk driver initialization • ideinit() is invoked by main(), which initializes the disk driver 1 ideinit() sets up CPU(n − 1) to handle disk interrupts 2 It then makes a call to idewait() to wait for disk 0 to initialize • It assumes that at least disk 0 is present because the boot loader and the kernel were obviously loaded from it 3 idewait() polls the status bits of the disk hardware, until IDE_BSY is clear and IDE_DRDY is set 4 It then checks whether another disk is present
  • 59. Example: Disk driver initialization • ideinit() is invoked by main(), which initializes the disk driver 1 ideinit() sets up CPU(n − 1) to handle disk interrupts 2 It then makes a call to idewait() to wait for disk 0 to initialize • It assumes that at least disk 0 is present because the boot loader and the kernel were obviously loaded from it 3 idewait() polls the status bits of the disk hardware, until IDE_BSY is clear and IDE_DRDY is set 4 It then checks whether another disk is present
  • 60. Buffer cache • The buffer cache is a linked list of struct buf in memory • It holds cached copies of disk blocks • Uses iderw(struct buf *b) to read/write a buffer from/to the disk • If B_DIRTY is set, it writes b to disk • If B_VALID is not set, it reads b from disk
  • 61. Buffer cache • The buffer cache is a linked list of struct buf in memory • It holds cached copies of disk blocks • Uses iderw(struct buf *b) to read/write a buffer from/to the disk • If B_DIRTY is set, it writes b to disk • If B_VALID is not set, it reads b from disk
  • 62. Buffer cache • The buffer cache is a linked list of struct buf in memory • It holds cached copies of disk blocks • Uses iderw(struct buf *b) to read/write a buffer from/to the disk • If B_DIRTY is set, it writes b to disk • If B_VALID is not set, it reads b from disk
  • 63. Buffer cache • The buffer cache is a linked list of struct buf in memory • It holds cached copies of disk blocks • Uses iderw(struct buf *b) to read/write a buffer from/to the disk • If B_DIRTY is set, it writes b to disk • If B_VALID is not set, it reads b from disk
  • 64. Buffer cache • The buffer cache is a linked list of struct buf in memory • It holds cached copies of disk blocks • Uses iderw(struct buf *b) to read/write a buffer from/to the disk • If B_DIRTY is set, it writes b to disk • If B_VALID is not set, it reads b from disk
  • 65. iderw • Disk accesses take milliseconds of time therefore polling is not an option • iderw keeps the list of pending disk requests in a queue (idequeue) and uses interrupts to signal whenever a request has finished • It adds b to the end of idequeue • If b is the only buffer in idequeue, it instantly dispatches it to the disk hardware by calling idestart() which either issues a read or a write • The current process is then put to sleep waiting for the operation on b to be completed • Once the hardware has completed the operation, it will generate an interrupt (IRQ_IDE) which will be handled by trap by invoking ideintr()
  • 66. iderw • Disk accesses take milliseconds of time therefore polling is not an option • iderw keeps the list of pending disk requests in a queue (idequeue) and uses interrupts to signal whenever a request has finished • It adds b to the end of idequeue • If b is the only buffer in idequeue, it instantly dispatches it to the disk hardware by calling idestart() which either issues a read or a write • The current process is then put to sleep waiting for the operation on b to be completed • Once the hardware has completed the operation, it will generate an interrupt (IRQ_IDE) which will be handled by trap by invoking ideintr()
  • 67. iderw • Disk accesses take milliseconds of time therefore polling is not an option • iderw keeps the list of pending disk requests in a queue (idequeue) and uses interrupts to signal whenever a request has finished • It adds b to the end of idequeue • If b is the only buffer in idequeue, it instantly dispatches it to the disk hardware by calling idestart() which either issues a read or a write • The current process is then put to sleep waiting for the operation on b to be completed • Once the hardware has completed the operation, it will generate an interrupt (IRQ_IDE) which will be handled by trap by invoking ideintr()
  • 68. iderw • Disk accesses take milliseconds of time therefore polling is not an option • iderw keeps the list of pending disk requests in a queue (idequeue) and uses interrupts to signal whenever a request has finished • It adds b to the end of idequeue • If b is the only buffer in idequeue, it instantly dispatches it to the disk hardware by calling idestart() which either issues a read or a write • The current process is then put to sleep waiting for the operation on b to be completed • Once the hardware has completed the operation, it will generate an interrupt (IRQ_IDE) which will be handled by trap by invoking ideintr()
  • 69. iderw • Disk accesses take milliseconds of time therefore polling is not an option • iderw keeps the list of pending disk requests in a queue (idequeue) and uses interrupts to signal whenever a request has finished • It adds b to the end of idequeue • If b is the only buffer in idequeue, it instantly dispatches it to the disk hardware by calling idestart() which either issues a read or a write • The current process is then put to sleep waiting for the operation on b to be completed • Once the hardware has completed the operation, it will generate an interrupt (IRQ_IDE) which will be handled by trap by invoking ideintr()
  • 70. iderw • Disk accesses take milliseconds of time therefore polling is not an option • iderw keeps the list of pending disk requests in a queue (idequeue) and uses interrupts to signal whenever a request has finished • It adds b to the end of idequeue • If b is the only buffer in idequeue, it instantly dispatches it to the disk hardware by calling idestart() which either issues a read or a write • The current process is then put to sleep waiting for the operation on b to be completed • Once the hardware has completed the operation, it will generate an interrupt (IRQ_IDE) which will be handled by trap by invoking ideintr()
  • 71. Code: iderw void iderw(struct buf *b) { struct buf **pp; acquire(&idelock); b->qnext = 0; for(pp=&idequeue; *pp; pp=&(*pp)->qnext) ; *pp = b; if(idequeue == b) idestart(b); while((b->flags & (B_VALID|B_DIRTY)) != B_VALID){ sleep(b, &idelock); } release(&idelock); }
  • 72. ideintr 1 Checks the first buffer in idequeue to find the type of the operation (read or write) 2 If the operation was a read, it reads the data into the buffer via insl() 3 It then sets B_VALID and clears B_DIRTY and wakes up any processes sleeping on b 4 Finally, it dispatches the next buffer from idequeue
  • 73. ideintr 1 Checks the first buffer in idequeue to find the type of the operation (read or write) 2 If the operation was a read, it reads the data into the buffer via insl() 3 It then sets B_VALID and clears B_DIRTY and wakes up any processes sleeping on b 4 Finally, it dispatches the next buffer from idequeue
  • 74. ideintr 1 Checks the first buffer in idequeue to find the type of the operation (read or write) 2 If the operation was a read, it reads the data into the buffer via insl() 3 It then sets B_VALID and clears B_DIRTY and wakes up any processes sleeping on b 4 Finally, it dispatches the next buffer from idequeue
  • 75. ideintr 1 Checks the first buffer in idequeue to find the type of the operation (read or write) 2 If the operation was a read, it reads the data into the buffer via insl() 3 It then sets B_VALID and clears B_DIRTY and wakes up any processes sleeping on b 4 Finally, it dispatches the next buffer from idequeue
  • 76. Modern disk controllers in a real OS • Most disk controllers typically accept multiple outstanding disk requests at a time • They even reorder them to make efficient use of the disk arm • Conceptually other hardware is very similar to disks • Network buffers hold packets • Audio device buffers hold sound samples • Graphics card buffers hold video data
  • 77. Modern disk controllers in a real OS • Most disk controllers typically accept multiple outstanding disk requests at a time • They even reorder them to make efficient use of the disk arm • Conceptually other hardware is very similar to disks • Network buffers hold packets • Audio device buffers hold sound samples • Graphics card buffers hold video data
  • 78. Modern disk controllers in a real OS • Most disk controllers typically accept multiple outstanding disk requests at a time • They even reorder them to make efficient use of the disk arm • Conceptually other hardware is very similar to disks • Network buffers hold packets • Audio device buffers hold sound samples • Graphics card buffers hold video data
  • 79. Modern disk controllers in a real OS • Most disk controllers typically accept multiple outstanding disk requests at a time • They even reorder them to make efficient use of the disk arm • Conceptually other hardware is very similar to disks • Network buffers hold packets • Audio device buffers hold sound samples • Graphics card buffers hold video data
  • 80. Modern disk controllers in a real OS • Most disk controllers typically accept multiple outstanding disk requests at a time • They even reorder them to make efficient use of the disk arm • Conceptually other hardware is very similar to disks • Network buffers hold packets • Audio device buffers hold sound samples • Graphics card buffers hold video data
  • 81. Modern disk controllers in a real OS • Most disk controllers typically accept multiple outstanding disk requests at a time • They even reorder them to make efficient use of the disk arm • Conceptually other hardware is very similar to disks • Network buffers hold packets • Audio device buffers hold sound samples • Graphics card buffers hold video data
  • 82. DMA • High-bandwidth I/O devices, such as disks, graphics cards, network cards, etc. often use direct memory access (DMA) instead of explicit I/O (insl and outsl) • Via DMA, controllers get direct access to physical memory • The device driver passes the physical address of the buffer’s data field to the device, which copies it from/to the main memory • Once it is done, it generates an interrupt • As a result of DMA, the CPU is not involved, hence making the entire process more efficient
  • 83. DMA • High-bandwidth I/O devices, such as disks, graphics cards, network cards, etc. often use direct memory access (DMA) instead of explicit I/O (insl and outsl) • Via DMA, controllers get direct access to physical memory • The device driver passes the physical address of the buffer’s data field to the device, which copies it from/to the main memory • Once it is done, it generates an interrupt • As a result of DMA, the CPU is not involved, hence making the entire process more efficient
  • 84. DMA • High-bandwidth I/O devices, such as disks, graphics cards, network cards, etc. often use direct memory access (DMA) instead of explicit I/O (insl and outsl) • Via DMA, controllers get direct access to physical memory • The device driver passes the physical address of the buffer’s data field to the device, which copies it from/to the main memory • Once it is done, it generates an interrupt • As a result of DMA, the CPU is not involved, hence making the entire process more efficient
  • 85. DMA • High-bandwidth I/O devices, such as disks, graphics cards, network cards, etc. often use direct memory access (DMA) instead of explicit I/O (insl and outsl) • Via DMA, controllers get direct access to physical memory • The device driver passes the physical address of the buffer’s data field to the device, which copies it from/to the main memory • Once it is done, it generates an interrupt • As a result of DMA, the CPU is not involved, hence making the entire process more efficient
  • 86. DMA • High-bandwidth I/O devices, such as disks, graphics cards, network cards, etc. often use direct memory access (DMA) instead of explicit I/O (insl and outsl) • Via DMA, controllers get direct access to physical memory • The device driver passes the physical address of the buffer’s data field to the device, which copies it from/to the main memory • Once it is done, it generates an interrupt • As a result of DMA, the CPU is not involved, hence making the entire process more efficient
  • 87. Dynamic interrupt routing • In case of xv6 all disk interrupts are routed to CPU(n − 1) • Real OSes use sophisticated algorithms to dynamically route interrupts to processors • The goal is to achieve optimum load balancing while maintaining good locality
  • 88. Dynamic interrupt routing • In case of xv6 all disk interrupts are routed to CPU(n − 1) • Real OSes use sophisticated algorithms to dynamically route interrupts to processors • The goal is to achieve optimum load balancing while maintaining good locality
  • 89. Dynamic interrupt routing • In case of xv6 all disk interrupts are routed to CPU(n − 1) • Real OSes use sophisticated algorithms to dynamically route interrupts to processors • The goal is to achieve optimum load balancing while maintaining good locality
  • 90. Reading(s) • Chapter 3, “Traps, interrupts, and drivers”, section “Code: Interrupts" onwards from “xv6: a simple, Unix-like teaching operating system”