1. Class-G Headphone Driver in 65nm
CMOS Technology
Alex Lollio1, Giacomino Bollati2 and Rinaldo Castello1
1Università degli studi di Pavia, Pavia, Italy
2Marvell Italia, Pavia, Italy
1

2. Headphone audio amplifiers
Target application
Typical operating conditions
VIN
VHV
-VHV
Key objectives:
• Low distortion
• Low noise
• High efficiency
• Single ended
• RL = 32/16 Ω
• BW = 20Hz–20kHz
• PO,MAX = 40mW (on
16 Ω)
Modern cellular phones incorporates MP3 music playback
and users may wish to use this feature for many hours
2

3. Outline
• Headphone amplifier
(Class-AB, Class-D, Class-G PROs and CONs)
• Class-G headphone driver
(architecture, switching principle, distortion analysis)
• Prototype in 65nm CMOS technology
(implementation, results, comparison)
• Conclusions
3

4. Outline
• Headphone amplifier
(Class-AB, Class-D, Class-G PROs and CONs)
• Class-G headphone driver
(architecture, switching principle, distortion analysis)
• Prototype in 65nm CMOS technology
(implementation, results, comparison)
• Conclusions
4

5.  Class AB (Linear amplifier)
PROs: Best linearity
No EMI problems
CONs: Low efficiency
Typically the preferred solution in headphone application
 Class D (Switching amplifier)
PROs: Best efficiency
CONs: Less linearity than class AB
EMI problems
Emerging solution in headphone application
Headphone audio amplifiers
Alternative topologies
5

6. Headphone audio amplifiers
Alternative topologies
 Class G: It is a linear amplifier which uses two voltage supply
rails which switches to the appropriate voltage as required by
the instantaneous output voltage
PROs: High efficiency but less than class D
High linearity but less than class AB
No EMI problems
CONs: It needs two voltage supply rails
VIN
VLV
VHV
-VLV
-VHV
VHV
-VHV
VLV
-VLV
VOUT VOUT
6

7. Class G
alternative topologies
 Series topology
(classical)
 Parallel topology
• Only one
output stage
• Switches
are in series
with the
power
transistors
• Two output
stages work in
parallel
• No switches in
series with the
power transistors
• It needs a careful
switching circuit
design
VHV
-VHV
VLV
-VLV
VHV
VLV
-VHV
-VLV
RL
RL
This is the adopted solution
7

8. Class G: working principle
For Vout below the switching point the low voltage stage is active.
For Vout above the switching point both the low voltage and high voltage
stages drive the load (in different moments).
VHV
VLV
-VHV
-VLV
LV stage
HV stage
iHV
iLV
iLV
iHV
iLV
iHV
Iout[A]
Iout[A]
iLV
t t
Switching
point
8

9. Class G: switching distortion
Distortion caused by the
switching
Up to the switching point
the class G linearity is the
same as a class AB
Compared to class AB, class G has an additional source of
distortion.
9
Switching point

10. Class G: critical design choices
The implemented current based switching enables low distortion and
high efficiency
• Switching point
level:
To achieve high
efficiency, it must be
as close as possible
to the low voltage
supply
Switching point
close to low
voltage supply
Switching point
far from the low
voltage supply
• Switching strategy: to minimize the distortion, switching must be as
smooth as possible
10

11. Outline
• Headphone amplifier
(Class-AB, Class-D, Class-G PROs and CONs)
• Class-G headphone driver
(architecture, switching principle, distortion analysis)
• Prototype in 65nm CMOS technology
(implementation, results, comparison)
• Conclusions
11

12. Overall amplifier architecture
• Three stage
opamp with
differential input
and single ended
output.
• The two
identical second
stages, gm2, and
the third stages,
gm3L and gm3H,
work in parallel.
• Only the low voltage stage gm3L is supplied by the low voltage rail
±VLV. The rest of the circuit is supplied by the high voltage rail ±VHV
gm2
gm2
gm1
-gm3L
-gm3H
Switching
stage
R2
R1
R1
R2 RL
CM2
CM2CM1
VOUT
Main path
12

13. Amplifier architecture: main path
First stage
Input pairs
gm1
1313
VO
VLV
-VLV
VHV
-VHV
Floating
battery
VHV
VHV
-VHV
RL

14. Second stage
Amplifier architecture: main path
gm2
14
Floating battery ref: Renirie, Langen, Huijsing, 1995
VO
VLV
-VLV
VHV
-VHV
Floating
battery
VHV
VHV
-VHV
RL

15. Amplifier architecture: main path
Third
stage
LV stage
gm3L
HV stage
gm3H
15
RL
VO
VLV
-VLV
VHV
-VHV
-VHV
Floating
battery
VHV
VHV

16. Amplifier architecture: switching stage
conceptual schematic
PMOS
switching
stage
NMOS
switching
stage
RL
VO
VO
VLV - VTH
-VLV + VTHVO
VLV
-VLV
VHV
-VHV
-VHV
Floating
battery
VHV
VHV

17. Amplifier architecture: switching stage
conceptual schematic
PMOS
switching
stage
RL
VO
VO
VLV - VTH
-VLV + VTHVO
VLV
-VLV
VHV
-VHV
-VHV
Floating
battery
VHV
VHV

18. Switching principle details
• Switching point sensing is in
voltage domain.
A differential pair compares the
output voltage to the switching
point voltage VLV-VTH
• The switching between the
high voltage and low voltage
output stage is current based.
The switching circuit injects all
its bias current into the gate of
the MOS to be switched off.
VOUT
LV stage
HV stage
iJH
iJL
18
VOUT VLV - VTH
VHV
-VHV
-VLV
VLV
VHV
VHV
IBIAS
PMOS switching stage

19. Output currents during switching
t
Iout[A]
Outputcurrents
iLV
iHV
t
VLV -VTH
VLV
Vout[V]
• When VOUT is lower than the
switching point (VLV-VTH) the
switching circuit enables the LV stage
and disables the HV stage
• When VOUT is higher than the low
voltage supply VLV only the HV stage
drives the load
• When VOUT is between VLV-VTH and
VLV both stages drive the load
19

20. Switching distortion:
Amplifier model during the switching
• We use a simplified model of the amplifier during the switching.
This current is used to represent
the disturbance generated by the
switching stage.
gm1 gm2 -gm3
20
RL
VOUT
R1
R1
R2
CM1
CM2
IJ

21. gm2f
Cm2
s
f
s
1
/fs
gm2
1
iVout
T
2
T
T
J
Design criteria for distortion reduction
• From the model of previous slide we obtain the equation:
21
Where
21
1
T
RR
R
Cm1
gm1
f
time
ΔVOUT
VOUT
195u 200u
300m
305m
To minimize the distortion at the output we have to minimize ΔVout.
• Lower iJ value means better linearity and lower switching speed
• Higher amplifier bandwidth, fT, means higher linearity
Switching
point

22. Outline
• Headphone amplifier
(Class-AB, Class-D, Class-G PROs and CONs)
• Class-G headphone driver
(architecture, switching principle, distortion analysis)
• Prototype in 65nm CMOS technology
(implementation, results, comparison)
• Conclusions
22

23. Chip micrograph
• 65nm CMOS process
• 0.14mm2 active area per
channel
• Voltage supplies:
High voltage rail ±1.4V
Low voltage rail ±0.35V
• Switching point 50mV under
the low voltage supply
• Max load capacitance 1nF
23

24. Measurement results:
Power dissipation versus output power
Fin=1kHz
RL=32Ω
24

25. Measurement results:
THD+N and efficiency versus output power
• Sinusoidal input signal (fin=1kHz)
• About 6dB extra distortion due to switching
25

26. Measurement results:
THD+N versus frequency
RL=32Ω
BW= 20Hz – 20 kHz
26

27. Measurement results:
Spectrum at different output power
PO=20mW
Fin=1kHz
PO=1mW
Fin=1kHz
27

28. Performance summary and comparison
Parameter This work
JSSC 09
[1]
ESSCIRC 06
[2]
Technology 65nm 130nm 65nm
Supply voltage
±1.4V
±0.35V
±1V
±0.6V
2.5V
Quiescent power (per
channel)
0.41mW 1.2mW 12.5mW
Peak load power (16Ω) 90mW 40mW 53.5mW
THD+N @ PRMS (32Ω)
-80dB @
16mW
-84dB @
10mW
-68dB @
27mW (16Ω)
SNR A-weighted 101dB
92dB (un-
weighted)
-
FOM=
Peak load power
Quiescent power
219.5 33.3 4.3
28

29. Performance summary and comparison
Parameter This work
MAX9725
[3]
TPA6141
[4]
LM48824
[5]
Supply voltage
1.4V with two
charge pumps + 1
buck
1.5V with a
charge pump
3.6V with 1
charge pump +
1 buck
3.6V with 1
charge pump +
1 buck
Quiescent power (per
channel)
0.41mW + 0.5mW
(2 CPs + 1 buck)
1.57mW 2.16mW 1.62mW
PSUP @ PL=0.1mW 0.87mW + 0.6mW - 4.5mW 3.24mW
PSUP @ PL=0.5mW 1.63mW + 0.8mW - 7.2mW 5.58mW
Peak load power
(16Ω)
90mW 50mW 50mW 74mW
THD+N @ PRMS
(32Ω)
-80dB @ 16mW -84dB @12mW -80dB @20mW -69dB@20mW
SNR A-weighted 101dB 92dB 105dB 102dB
FOM=
Peak load power
Quiescent power
90 31.8 23.2 45.6 29

30. Outline
• Headphone amplifier
(Class-AB, Class-D, Class-G PROs and CONs)
• Class-G headphone driver
(architecture, switching principle, distortion analysis)
• Prototype in 65nm CMOS technology
(implementation, results, comparison)
• Conclusions
30

31. Conclusions
• A class-G headphone driver has been presented. It
shows 50% less power consumption than the
competitors.
• The class-G amplifier is very suitable in low voltage
systems which require high efficiency and low
distortion.
• A class-G headphone prototype with charge pumps
and a buck converter is in progress
31

32. References
[1] Vijay Dhanasekaran; Jose Silva-Martinez; Edgar Sanchez-Sinencio, "Design of
Three-Stage Class-AB 16Ohm Headphone Driver Capable of Handling Wide Range
of Load Capacitance," Solid-State Circuits, IEEE Journal of , vol.44, no.6, pp.1734-
1744, Jun 2009.
[2] P. Bogner, H. Habibovic and T. Hartig, ‘‘A High Signal Swing Class AB Earpiece
Amplifier in 65nm CMOS Technology,’’ Proc. ESSCIRC, pp.372-375, 2006.
[3] Maxim, ‘‘1V, Low-Power, DirectDrive, Stereo Headphone Amplifier with
Shutdown,’’ Rev. 3; 8/08, accessed on Jul. 7, 2009 < http://datasheets.maximic.
com/en/ds/MAX9725.pdf>
[4] Texas Instrument, ‘‘Class-G Directpath Stereo Headphone Amplifier,’’ 3/09,
accessed on Jul. 7, 2009 < http://focus.ti.com/lit/ds/symlink/tpa6141a2.pdf>
[5] National Semiconductor ”Class G Headphone Amplifier with I2C Volume Control,”
August 31,2009, accessed on Jan. 25, 2010
< http://www.national.com/ds/LM/LM48824.pdf >
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