VLSI stands for Very Large Scale Integration and refers to integrated circuits with over 100,000 transistors. The document discusses the history and progression of integration levels from SSI to VLSI to ULSI. It also describes the photolithography process used to etch circuit designs onto silicon wafers at the microscopic level needed for modern integrated circuits.

3. Integration Level Trends Obligatory historical Moore’s law plot

8. System Design Pyramid

9. • Photo-litho-graphy: lati n: light-stone-writing • Photolithography: an optical means for transferring patterns onto a substrate. • Patterns are first transferred to a photoresist layer . • Typically a wafer is about 8-10 inches in diameter. Individual ICs are placed inside it. Photolithography and Patterning

10. Photoresist is a liquid film that is spread out onto a substrate, exposed with a desired pattern, and developed into a selectively placed layer for subsequent processing. • Photolithography is a binary pattern transfer : there is no gray-scale, color, nor depth to the image.

17. WHAT IS A PHOTOMASK? Photomasks are high precision plates containing microscopic images of electronic circuits. Photomasks are made from very flat pieces of quartz or glass with a layer of chrome on one side. Etched in the chrome is a portion of an electronic circuit design. This circuit design on the mask is also called geometr y.

18. The Resist The first step is to coat the Si/SiO 2 wafer with a film of a light sensitive material, called a resist. A resist must also be capable of high fidelity recording of the pattern (resolution) and durable enough to survive later process steps Solvent Evaporates

21. Photolithography Energy - causes (photo)chemical reactions that modify resist dissolution rate Mask - blocks energy transmission to some areas of the resist Aligner - aligns mask to previously exposed layers of the overall design Resist - records the masked pattern of energy Energy Mask + Aligner Photoresist Wafer

22. Next Generation Lithography In 1996, five technology options were proposed for the 130 nm gate length technology: • X-ray proximity Lithography (XPL) • Extreme Ultraviolet (EUV) • Electron Projection Lithography (EPL) • Ion Projection Lithography (IPL) • Direct-write lithography (EBDW). These options were referred to as the next generation lithography.

26. Stick Diagrams Metal poly ndiff pdiff Can also draw in shades of gray/line style.

29. Basic Circuit Layout Stick Diagram Stick Diagrams Gnd V DD X X X X V DD Gnd

30. Layout Diagrams Stick Diagrams Gnd V DD X X X X V DD Gnd

32. MOSFET Arrays and AOI Gates A B C y x y x A B C

33. Parallel Connected MOS Patterning x y A B X X X A B x y

34. Alternate Layout Strategy A B x y X X X X x A B y

35. MOSFET Arrays and AOI Gates NAND2 Layout Vp Gnd Gnd Vp X X X X X

36. NOR2 Layout Vp Gnd Vp Gnd X X X X X

37. Stick Diagrams Power Ground B C Out A

39. X X X X X X X X X V DD Gnd X

40. Gnd X X X X X X X X X V DD