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An Introduction to nanoWatt XLP: PIC18F46J50  ,[object Object]
Introduction ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Features of PIC18F46J50 ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Introduction the PIC18F46J50 8-bit MCUs ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Typical Application ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
PIC18F46J50 Block Diagram
Low Power Trends ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Industry Standard Performance Benchmarks Energy Consumption Note:  Competitor 16-bit family at 16 MIPS Vdd=3.3V, Typical values for Idd PIC24F16KA102 family at 16 MIPS using MPLAB C Compiler for PIC24F with Opimization level O3 – Vdd=3.3V, Typical values for Idd
Factors affecting Power Consumption ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
What is nanoWatt  XLP™  Technology? ,[object Object],[object Object],[object Object],[object Object],nanoWatt XLP ™   Requirements Best Specifications ,[object Object],<100 nA down to 20 nA ,[object Object],<800 nA down to 400 nA ,[object Object],<800 nA down to 500 nA
nanoWatt XLP™ Technology Portfolio
nanoWatt XLP™ MCU Portfolio PIC MCU Flash Memory KB Pins Sleep (nA) Deep Sleep (nA) WDT* (nA) RTC* (nA) 1MHz Run (µA) PIC16LF72X 3.5-14 28/44 20 - 500 500 110 PIC16LF193X  (LCD) 7-28 28/44 60 - 500 600 150 PIC18F1XK50 8-16 20 24 - 450 790 170 PIC18F14K22 8-16 20 34 - 460 650 150 PIC18FXXK20 8-64 28/44 100 - 600 600 300 PIC18(L)F46J11 16-64 28/44 54 13 813 813 272 PIC18(L)F46J50 16-64 28/44 54 13 813 813 272 PIC24F16KA102 (Cap Touch) 8-16 20/28 25 20 420 520 195
Sleep vs. Deep Sleep Comparison Low Power Mode SLEEP (RAM retained) Deep SLEEP Definition Core Powered Off, Some peripherals can operate, RAM retained Core, Peripherals and SRAM Powered-Off PIC16LF72X-I PD 60nA ,[object Object],PIC18 L F46J11/50-I PD 54nA ,[object Object],PIC18F46J11/50-I PD 3.1uA 13nA PIC24F16KA102 - I PD 25nA 20nA Wake-Up Sources RTCC Watch-Dog Timer Brown-out Reset Interrupt Pins Ultra-Low Power Wake Up Power-On Reset Reset Pin Peripherals RTCC Watch-Dog Timer Brown-out Reset Interrupt Pins Ultra-Low Power Wake Up Power-On Reset Reset Pin Wake Up Time Shorter (~1-5uS typical) Longer (wake-up is like POR) Pin State Maintained Maintained RAM State  Maintained 2 words maintained
PIC18F46J50 Connection Details Block Diagram Connecting different Blocks
Memory Maps For PIC18F46J50 Memory Maps For PIC18F46J50
Parallel Master Port (PMP) PMP Module Block Diagram
Universal Serial Bus (USB) Usb Peripheral And Options
Charge Time Measurement Unit (CTMU) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],CTMU BLOCK DIAGRAM
PIC18F46J50 Family Interrupt Logic Interrupt Logic  BLOCK DIAGRAM
nanoWatt XLP USB PIC18 Development Board  MA180024   ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Compatible Development Tool Chain ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Additional Resource ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],Newark Farnell

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Introduction to nanoWatt XLP: PIC18F46J50

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  • 8. Industry Standard Performance Benchmarks Energy Consumption Note: Competitor 16-bit family at 16 MIPS Vdd=3.3V, Typical values for Idd PIC24F16KA102 family at 16 MIPS using MPLAB C Compiler for PIC24F with Opimization level O3 – Vdd=3.3V, Typical values for Idd
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  • 12. nanoWatt XLP™ MCU Portfolio PIC MCU Flash Memory KB Pins Sleep (nA) Deep Sleep (nA) WDT* (nA) RTC* (nA) 1MHz Run (µA) PIC16LF72X 3.5-14 28/44 20 - 500 500 110 PIC16LF193X (LCD) 7-28 28/44 60 - 500 600 150 PIC18F1XK50 8-16 20 24 - 450 790 170 PIC18F14K22 8-16 20 34 - 460 650 150 PIC18FXXK20 8-64 28/44 100 - 600 600 300 PIC18(L)F46J11 16-64 28/44 54 13 813 813 272 PIC18(L)F46J50 16-64 28/44 54 13 813 813 272 PIC24F16KA102 (Cap Touch) 8-16 20/28 25 20 420 520 195
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  • 14. PIC18F46J50 Connection Details Block Diagram Connecting different Blocks
  • 15. Memory Maps For PIC18F46J50 Memory Maps For PIC18F46J50
  • 16. Parallel Master Port (PMP) PMP Module Block Diagram
  • 17. Universal Serial Bus (USB) Usb Peripheral And Options
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  • 19. PIC18F46J50 Family Interrupt Logic Interrupt Logic BLOCK DIAGRAM
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