SlideShare una empresa de Scribd logo
1 de 21
Finite state Machines with
            output


Moore and Mealy machines




                              1
Moore Machine           output is associated with
                     states

A Moore machine is a six tuple
(Q , Σ, ∆, δ, λ, q0)
∆ : Is the output alphabet
λ : I s a mapping from Q to ∆ giving output
       associated with each state.
Output in response to input a1 a2 …an is
λ(q0) λ(q1) λ(q2)… λ(qn)

Where q0, q1,…qn is the sequence of states such
 that δ (qi-1,ai) = qi
                        STRING LENGTH
                                                     2
                        N+1
Note
Any Moore machine gives output

λ(q0) in response to input - empty
                                 string




                                          3
DFA may be viewed as a special case of
 Moore machine where

output for accepting state is 1

output for nonaccepting state is 0




                                         4
Example
To find the residue mod 3 for binary string treated
    as a binary integer
 if a number i written in binary is followed by 0,
    resulting string has value 2i
If I is followed by 1 the resulting string has value 2i
    +1
If a string x(when treated as binary integer) has
    remainder p(when divided by 3) then string ‘x0’
    will have remainder 2p mod 3
And string ‘X1’ will have remainder 2p+1 mod 3

                                                          5
input 1010 value 10 so 10 mod 3 = 1
          q0 1 q1 0 q2 1 q2 0 q1
output    0       1        2       2       1

     0                1                    2
              1                        0
     q0               q1                   q2


              1                0


                                   1
          0
                                                6
• 25 = 1 1 0 0 1
    • Q0- 1 q1 – 1-   q0 0- q0- 0 - q0 – 1 – q1
    •0      1           0    0      0       1




                                                  7
Mealy Machine       out put is associated with
                      transition

A Mealy machine is a six tuple
(Q , Σ, ∆, δ, λ, q0)
∆ : Is the output alphabet
λ : I s a mapping from QX Σ to ∆ giving
  output λ(q,a)      associated with the
  transitions from state q and input each
  state.

                                                 8
Output in response to input a1 a2 …an is
λ(q0, a1) λ(q1,a2) λ(q2,a3)… λ(qn-1,an)
Where q0, q1,…qn is the sequence of states
 such that δ (qi-1,ai) = qi



Note that this sequence has length n
 rather that n+1 as in Moore machine


                                           9
Mealy machine to add two integers
  using their binary expansions
Inputs xn xn-1 …x0
         yn yn-1…y0
We assume that both xn and yn are zero.
 a state q0 represents that previous carry is
  zero
A state q1 represents that previous carry
  was 1
Inputs to the machine are pairs of bits:
  there are four possible inputs(00,01,10,11)
                                            10
Input            010010                      18
                      011101                      29
              01, 1                       01, 0   47
                           11, 0


                  q0                       q1


      00, 0                00, 1                       11, 1


                10, 1
                                        10, 0

 0 - 01- q0 - 10 - q0 - 01 - q0- 01 - q0- 11 - q1 - 00- q0
      1               1   1        1      0            1
                                                               11
out put is : 1 0 1 1 1 1 value 47
Equivalence of Moore and Mealy
           Machines
A Moore machine M can never be correctly
 equivalent to a Mealy machine M’
 because the length of output string from a
 Moore machine M is one greater than that
 from the Mealy machine M’ on the same
 input.
However we may neglect the response of
 Moore machine to input λ and say

                                          12
Moore machine M and a Mealy machine M’
 are equivalent if for all inputs w


         b TM’ (w)   = TM(w)



where b is the output of Moore machine M
 for its initial state



                                           13
• Theorem: I If M1= (Q , Σ, ∆, δ, λ, q0)
  is a Moore machine then there is a
  Mealy machineM2 equivalent to M1
• Proof: Construct Mealy machine M2 as
(Q , Σ, ∆, δ, λ’, q0)
   λ’ is defined as:

λ’(q,a) = λ(δ(q,a)) for all states q and
  input symbols a


                                           14
input 1010 value 10 so 10 mod 3 = 1
                                q0 1 q1 0 q2 1 q2 0 q1
 output of Moore                       0      1           2       2        1

          0                             1                     2
                           1/1                      0/2
           q0                            q1                   q2


                               1/0                  0/1


                                              1/2
                     0/0
Out put for Mealy machine on the same input
                                                                      15
q0 - 1   (1)    q1 - 0   (2)   q2- 1 (2) q2 - 0 (1) q1
• on input 1010 out by Moore machine is
      0 1        2     2    1
While output from the constructed Mealy
  machine is
           1      2     2    1
By the condition of equivalence
   we should add out put of q0 0 of Moore
  machine in the beginning of out put of
  Mealy machine
Hence the machine made is equivalent to
  the give Moore machine.
                                            16
• Theorem: If M1= (Q , Σ, ∆, δ, λ, q0)
  is a Mealy machine then there is a
  Moore machine M2 equivalent to M1.
• Proof:We can do the reverse of what we
  did in the construction of Mealy
  machine.
As the different edges terminating to a
  node may have different outputs.



                                       17
We look into each state and see the edges with
  different outputs are terminating to it.
Say state qi is having all the terminating edges
  with 0,1, 2 as outs on them.
State qi is split into
Qi0, qi1, qi2 ie. In the Moore machine in place
  of qi state we take three state
qi0, qi1, qi2.
With these states we associate outputs as
 0,1,2 respectively in the Moore machine

                                                   18
In q0 four edges are terminating and in different outputs
   on them are only two 0 and 1
So q0 is split into two states q00 and q01
         01, 1                         01, 0

                     11, 0


             q0                         q1


 00, 0               00, 1                        11, 1


           10, 1
                                     10, 0

Similarly on state q1 four edges are terminating with two
different output vales 0 and 1 so it is also split into two
new states as q10 and q11.
                                                          19
01,10

 00          00
                                     00
                     q01     1                1
             01
                           11        10, 01
                                              q11
      q00
              10
0                    00                                 11
                                     11
        11
                     q10
                             0


                  01,10
010010             18 q00 -01-q01-10-q01-01-q01-01-q01-11-q10-00-
                                                  q01
                                                                    20
011101             29    0 1 1 1 1 0 1 ie         101111 = 47
• 0 1 0 0 1 0 18
• 0 1 1 1 0 1 29       47

q00 - 01- q01 -10 - q01 - 01- q01 - 01-
  q01-11- q10 – 00 -    q01
•    0 1 1 1 1 0 1 ie
•    101111 = 47

                                          21

Más contenido relacionado

La actualidad más candente

Moore and Mealy machines
Moore and Mealy machinesMoore and Mealy machines
Moore and Mealy machines
Irfan Anjum
 
Formal Languages and Automata Theory Unit 1
Formal Languages and Automata Theory Unit 1Formal Languages and Automata Theory Unit 1
Formal Languages and Automata Theory Unit 1
Srimatre K
 
Digital logic circuits important question and answers for 5 units
Digital logic circuits important question and answers for 5 unitsDigital logic circuits important question and answers for 5 units
Digital logic circuits important question and answers for 5 units
Lekashri Subramanian
 
Finite state machines
Finite state machinesFinite state machines
Finite state machines
dennis gookyi
 

La actualidad más candente (20)

Theory of Computation Basic Concepts and Grammar
Theory of Computation Basic Concepts and GrammarTheory of Computation Basic Concepts and Grammar
Theory of Computation Basic Concepts and Grammar
 
NFA to DFA
NFA to DFANFA to DFA
NFA to DFA
 
Regular expressions
Regular expressionsRegular expressions
Regular expressions
 
Moore and Mealy machines
Moore and Mealy machinesMoore and Mealy machines
Moore and Mealy machines
 
Mealy moore machine model
Mealy moore machine modelMealy moore machine model
Mealy moore machine model
 
Chomsky classification of Language
Chomsky classification of LanguageChomsky classification of Language
Chomsky classification of Language
 
Formal Languages and Automata Theory Unit 1
Formal Languages and Automata Theory Unit 1Formal Languages and Automata Theory Unit 1
Formal Languages and Automata Theory Unit 1
 
Digital logic circuits important question and answers for 5 units
Digital logic circuits important question and answers for 5 unitsDigital logic circuits important question and answers for 5 units
Digital logic circuits important question and answers for 5 units
 
Pda
PdaPda
Pda
 
Sr Latch or Flip Flop
Sr Latch or Flip FlopSr Latch or Flip Flop
Sr Latch or Flip Flop
 
Introduction to fa and dfa
Introduction to fa  and dfaIntroduction to fa  and dfa
Introduction to fa and dfa
 
NFA & DFA
NFA & DFANFA & DFA
NFA & DFA
 
Digital Logic & Design (DLD) presentation
Digital Logic & Design (DLD) presentationDigital Logic & Design (DLD) presentation
Digital Logic & Design (DLD) presentation
 
Decision properties of reular languages
Decision properties of reular languagesDecision properties of reular languages
Decision properties of reular languages
 
Turing Machine
Turing MachineTuring Machine
Turing Machine
 
Introduction TO Finite Automata
Introduction TO Finite AutomataIntroduction TO Finite Automata
Introduction TO Finite Automata
 
Kleene's theorem
Kleene's theoremKleene's theorem
Kleene's theorem
 
TM - Techniques
TM - TechniquesTM - Techniques
TM - Techniques
 
Finite state machines
Finite state machinesFinite state machines
Finite state machines
 
Finite State Machine.ppt.pptx
Finite State Machine.ppt.pptxFinite State Machine.ppt.pptx
Finite State Machine.ppt.pptx
 

Destacado

Mealy state machine
Mealy state machineMealy state machine
Mealy state machine
Arif Siyal
 

Destacado (20)

Mealy and moore machines
Mealy and moore machinesMealy and moore machines
Mealy and moore machines
 
Mealy state machine
Mealy state machineMealy state machine
Mealy state machine
 
Introduction state machine
Introduction state machineIntroduction state machine
Introduction state machine
 
Introduction to State Machines
Introduction to State MachinesIntroduction to State Machines
Introduction to State Machines
 
Synchronous state machines. Moore and Mealy state machines (FSM)
Synchronous state machines.  Moore and Mealy state machines (FSM)Synchronous state machines.  Moore and Mealy state machines (FSM)
Synchronous state machines. Moore and Mealy state machines (FSM)
 
Finite state machines
Finite state machinesFinite state machines
Finite state machines
 
Fsm sequence detector
Fsm sequence detector Fsm sequence detector
Fsm sequence detector
 
Finite State Machines - Why the fear?
Finite State Machines - Why the fear?Finite State Machines - Why the fear?
Finite State Machines - Why the fear?
 
Finite State Machines
Finite State Machines Finite State Machines
Finite State Machines
 
Counters
CountersCounters
Counters
 
Sayısal Devreler 07, Feza BUZLUCA
Sayısal Devreler 07, Feza BUZLUCASayısal Devreler 07, Feza BUZLUCA
Sayısal Devreler 07, Feza BUZLUCA
 
Kleene's theorem
Kleene's theoremKleene's theorem
Kleene's theorem
 
Deterministic Finite Automata
Deterministic Finite AutomataDeterministic Finite Automata
Deterministic Finite Automata
 
NFA or Non deterministic finite automata
NFA or Non deterministic finite automataNFA or Non deterministic finite automata
NFA or Non deterministic finite automata
 
synchronous state machine design
synchronous state machine designsynchronous state machine design
synchronous state machine design
 
Mealy machine
Mealy machineMealy machine
Mealy machine
 
Mgd finite statemachine
Mgd finite statemachineMgd finite statemachine
Mgd finite statemachine
 
Divide by N clock
Divide by N clockDivide by N clock
Divide by N clock
 
Sayısal Devreler 06, Feza BUZLUCA
Sayısal Devreler 06, Feza BUZLUCASayısal Devreler 06, Feza BUZLUCA
Sayısal Devreler 06, Feza BUZLUCA
 
What Is Php
What Is PhpWhat Is Php
What Is Php
 

Similar a Moore and mealy machines

ALC-Prac-10A.pdfMAT2ALC Practice Class 10A Turing Machines.docx
ALC-Prac-10A.pdfMAT2ALC Practice Class 10A Turing Machines.docxALC-Prac-10A.pdfMAT2ALC Practice Class 10A Turing Machines.docx
ALC-Prac-10A.pdfMAT2ALC Practice Class 10A Turing Machines.docx
nettletondevon
 
Analysis of state machines & Conversion of models
Analysis of state machines & Conversion of modelsAnalysis of state machines & Conversion of models
Analysis of state machines & Conversion of models
Abhilash Nair
 
Designing Clocked Synchronous State Machine
Designing Clocked Synchronous State MachineDesigning Clocked Synchronous State Machine
Designing Clocked Synchronous State Machine
Abhilash Nair
 
Mux decod pld2_vs2
Mux decod pld2_vs2Mux decod pld2_vs2
Mux decod pld2_vs2
WanNurdiana
 
Diferents tables in the informatic presentation
Diferents tables in the informatic presentationDiferents tables in the informatic presentation
Diferents tables in the informatic presentation
Eli Diaz
 

Similar a Moore and mealy machines (20)

Lect21 Engin112
Lect21 Engin112Lect21 Engin112
Lect21 Engin112
 
Synchronous design process
Synchronous design processSynchronous design process
Synchronous design process
 
Finite automata
Finite automataFinite automata
Finite automata
 
ALC-Prac-10A.pdfMAT2ALC Practice Class 10A Turing Machines.docx
ALC-Prac-10A.pdfMAT2ALC Practice Class 10A Turing Machines.docxALC-Prac-10A.pdfMAT2ALC Practice Class 10A Turing Machines.docx
ALC-Prac-10A.pdfMAT2ALC Practice Class 10A Turing Machines.docx
 
FiniteAutomata (1).ppt
FiniteAutomata (1).pptFiniteAutomata (1).ppt
FiniteAutomata (1).ppt
 
FiniteAutomata.ppt
FiniteAutomata.pptFiniteAutomata.ppt
FiniteAutomata.ppt
 
TuringMachines.ppt
TuringMachines.pptTuringMachines.ppt
TuringMachines.ppt
 
Analysis of state machines & Conversion of models
Analysis of state machines & Conversion of modelsAnalysis of state machines & Conversion of models
Analysis of state machines & Conversion of models
 
Quantum Cost Calculation of Reversible Circuit
Quantum Cost Calculation of Reversible CircuitQuantum Cost Calculation of Reversible Circuit
Quantum Cost Calculation of Reversible Circuit
 
12 latches
12 latches12 latches
12 latches
 
lec7.ppt
lec7.pptlec7.ppt
lec7.ppt
 
Lec 25 26_27
Lec 25 26_27Lec 25 26_27
Lec 25 26_27
 
Lec9
Lec9Lec9
Lec9
 
Autoata.pptx
Autoata.pptxAutoata.pptx
Autoata.pptx
 
Designing Clocked Synchronous State Machine
Designing Clocked Synchronous State MachineDesigning Clocked Synchronous State Machine
Designing Clocked Synchronous State Machine
 
Lesson 18 Automata .ppt
Lesson 18 Automata .pptLesson 18 Automata .ppt
Lesson 18 Automata .ppt
 
Sequential Circuit
Sequential CircuitSequential Circuit
Sequential Circuit
 
Mux decod pld2_vs2
Mux decod pld2_vs2Mux decod pld2_vs2
Mux decod pld2_vs2
 
Sequential circuits
Sequential circuitsSequential circuits
Sequential circuits
 
Diferents tables in the informatic presentation
Diferents tables in the informatic presentationDiferents tables in the informatic presentation
Diferents tables in the informatic presentation
 

Más de lavishka_anuj

Más de lavishka_anuj (10)

Simplifiaction of grammar
Simplifiaction of grammarSimplifiaction of grammar
Simplifiaction of grammar
 
Properties of cfg
Properties of cfgProperties of cfg
Properties of cfg
 
One ques
One quesOne ques
One ques
 
Non regular languages
Non regular languagesNon regular languages
Non regular languages
 
Grammar
GrammarGrammar
Grammar
 
Flat
FlatFlat
Flat
 
Finite automata intro
Finite automata introFinite automata intro
Finite automata intro
 
Finite automata
Finite automataFinite automata
Finite automata
 
Pushdown automata
Pushdown automataPushdown automata
Pushdown automata
 
Turing machines
Turing machinesTuring machines
Turing machines
 

Último

Último (20)

Exploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone ProcessorsExploring the Future Potential of AI-Enabled Smartphone Processors
Exploring the Future Potential of AI-Enabled Smartphone Processors
 
Manulife - Insurer Transformation Award 2024
Manulife - Insurer Transformation Award 2024Manulife - Insurer Transformation Award 2024
Manulife - Insurer Transformation Award 2024
 
Connector Corner: Accelerate revenue generation using UiPath API-centric busi...
Connector Corner: Accelerate revenue generation using UiPath API-centric busi...Connector Corner: Accelerate revenue generation using UiPath API-centric busi...
Connector Corner: Accelerate revenue generation using UiPath API-centric busi...
 
Automating Google Workspace (GWS) & more with Apps Script
Automating Google Workspace (GWS) & more with Apps ScriptAutomating Google Workspace (GWS) & more with Apps Script
Automating Google Workspace (GWS) & more with Apps Script
 
AWS Community Day CPH - Three problems of Terraform
AWS Community Day CPH - Three problems of TerraformAWS Community Day CPH - Three problems of Terraform
AWS Community Day CPH - Three problems of Terraform
 
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
Apidays Singapore 2024 - Building Digital Trust in a Digital Economy by Veron...
 
Navi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot Model
Navi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot ModelNavi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot Model
Navi Mumbai Call Girls 🥰 8617370543 Service Offer VIP Hot Model
 
Real Time Object Detection Using Open CV
Real Time Object Detection Using Open CVReal Time Object Detection Using Open CV
Real Time Object Detection Using Open CV
 
Artificial Intelligence Chap.5 : Uncertainty
Artificial Intelligence Chap.5 : UncertaintyArtificial Intelligence Chap.5 : Uncertainty
Artificial Intelligence Chap.5 : Uncertainty
 
Axa Assurance Maroc - Insurer Innovation Award 2024
Axa Assurance Maroc - Insurer Innovation Award 2024Axa Assurance Maroc - Insurer Innovation Award 2024
Axa Assurance Maroc - Insurer Innovation Award 2024
 
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
Strategies for Unlocking Knowledge Management in Microsoft 365 in the Copilot...
 
MINDCTI Revenue Release Quarter One 2024
MINDCTI Revenue Release Quarter One 2024MINDCTI Revenue Release Quarter One 2024
MINDCTI Revenue Release Quarter One 2024
 
TrustArc Webinar - Unlock the Power of AI-Driven Data Discovery
TrustArc Webinar - Unlock the Power of AI-Driven Data DiscoveryTrustArc Webinar - Unlock the Power of AI-Driven Data Discovery
TrustArc Webinar - Unlock the Power of AI-Driven Data Discovery
 
Data Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt RobisonData Cloud, More than a CDP by Matt Robison
Data Cloud, More than a CDP by Matt Robison
 
Apidays Singapore 2024 - Modernizing Securities Finance by Madhu Subbu
Apidays Singapore 2024 - Modernizing Securities Finance by Madhu SubbuApidays Singapore 2024 - Modernizing Securities Finance by Madhu Subbu
Apidays Singapore 2024 - Modernizing Securities Finance by Madhu Subbu
 
How to Troubleshoot Apps for the Modern Connected Worker
How to Troubleshoot Apps for the Modern Connected WorkerHow to Troubleshoot Apps for the Modern Connected Worker
How to Troubleshoot Apps for the Modern Connected Worker
 
Boost Fertility New Invention Ups Success Rates.pdf
Boost Fertility New Invention Ups Success Rates.pdfBoost Fertility New Invention Ups Success Rates.pdf
Boost Fertility New Invention Ups Success Rates.pdf
 
Apidays New York 2024 - The value of a flexible API Management solution for O...
Apidays New York 2024 - The value of a flexible API Management solution for O...Apidays New York 2024 - The value of a flexible API Management solution for O...
Apidays New York 2024 - The value of a flexible API Management solution for O...
 
ICT role in 21st century education and its challenges
ICT role in 21st century education and its challengesICT role in 21st century education and its challenges
ICT role in 21st century education and its challenges
 
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
Emergent Methods: Multi-lingual narrative tracking in the news - real-time ex...
 

Moore and mealy machines

  • 1. Finite state Machines with output Moore and Mealy machines 1
  • 2. Moore Machine output is associated with states A Moore machine is a six tuple (Q , Σ, ∆, δ, λ, q0) ∆ : Is the output alphabet λ : I s a mapping from Q to ∆ giving output associated with each state. Output in response to input a1 a2 …an is λ(q0) λ(q1) λ(q2)… λ(qn) Where q0, q1,…qn is the sequence of states such that δ (qi-1,ai) = qi STRING LENGTH 2 N+1
  • 3. Note Any Moore machine gives output λ(q0) in response to input - empty string 3
  • 4. DFA may be viewed as a special case of Moore machine where output for accepting state is 1 output for nonaccepting state is 0 4
  • 5. Example To find the residue mod 3 for binary string treated as a binary integer if a number i written in binary is followed by 0, resulting string has value 2i If I is followed by 1 the resulting string has value 2i +1 If a string x(when treated as binary integer) has remainder p(when divided by 3) then string ‘x0’ will have remainder 2p mod 3 And string ‘X1’ will have remainder 2p+1 mod 3 5
  • 6. input 1010 value 10 so 10 mod 3 = 1 q0 1 q1 0 q2 1 q2 0 q1 output 0 1 2 2 1 0 1 2 1 0 q0 q1 q2 1 0 1 0 6
  • 7. • 25 = 1 1 0 0 1 • Q0- 1 q1 – 1- q0 0- q0- 0 - q0 – 1 – q1 •0 1 0 0 0 1 7
  • 8. Mealy Machine out put is associated with transition A Mealy machine is a six tuple (Q , Σ, ∆, δ, λ, q0) ∆ : Is the output alphabet λ : I s a mapping from QX Σ to ∆ giving output λ(q,a) associated with the transitions from state q and input each state. 8
  • 9. Output in response to input a1 a2 …an is λ(q0, a1) λ(q1,a2) λ(q2,a3)… λ(qn-1,an) Where q0, q1,…qn is the sequence of states such that δ (qi-1,ai) = qi Note that this sequence has length n rather that n+1 as in Moore machine 9
  • 10. Mealy machine to add two integers using their binary expansions Inputs xn xn-1 …x0 yn yn-1…y0 We assume that both xn and yn are zero. a state q0 represents that previous carry is zero A state q1 represents that previous carry was 1 Inputs to the machine are pairs of bits: there are four possible inputs(00,01,10,11) 10
  • 11. Input 010010 18 011101 29 01, 1 01, 0 47 11, 0 q0 q1 00, 0 00, 1 11, 1 10, 1 10, 0 0 - 01- q0 - 10 - q0 - 01 - q0- 01 - q0- 11 - q1 - 00- q0 1 1 1 1 0 1 11 out put is : 1 0 1 1 1 1 value 47
  • 12. Equivalence of Moore and Mealy Machines A Moore machine M can never be correctly equivalent to a Mealy machine M’ because the length of output string from a Moore machine M is one greater than that from the Mealy machine M’ on the same input. However we may neglect the response of Moore machine to input λ and say 12
  • 13. Moore machine M and a Mealy machine M’ are equivalent if for all inputs w b TM’ (w) = TM(w) where b is the output of Moore machine M for its initial state 13
  • 14. • Theorem: I If M1= (Q , Σ, ∆, δ, λ, q0) is a Moore machine then there is a Mealy machineM2 equivalent to M1 • Proof: Construct Mealy machine M2 as (Q , Σ, ∆, δ, λ’, q0) λ’ is defined as: λ’(q,a) = λ(δ(q,a)) for all states q and input symbols a 14
  • 15. input 1010 value 10 so 10 mod 3 = 1 q0 1 q1 0 q2 1 q2 0 q1 output of Moore 0 1 2 2 1 0 1 2 1/1 0/2 q0 q1 q2 1/0 0/1 1/2 0/0 Out put for Mealy machine on the same input 15 q0 - 1 (1) q1 - 0 (2) q2- 1 (2) q2 - 0 (1) q1
  • 16. • on input 1010 out by Moore machine is 0 1 2 2 1 While output from the constructed Mealy machine is 1 2 2 1 By the condition of equivalence we should add out put of q0 0 of Moore machine in the beginning of out put of Mealy machine Hence the machine made is equivalent to the give Moore machine. 16
  • 17. • Theorem: If M1= (Q , Σ, ∆, δ, λ, q0) is a Mealy machine then there is a Moore machine M2 equivalent to M1. • Proof:We can do the reverse of what we did in the construction of Mealy machine. As the different edges terminating to a node may have different outputs. 17
  • 18. We look into each state and see the edges with different outputs are terminating to it. Say state qi is having all the terminating edges with 0,1, 2 as outs on them. State qi is split into Qi0, qi1, qi2 ie. In the Moore machine in place of qi state we take three state qi0, qi1, qi2. With these states we associate outputs as 0,1,2 respectively in the Moore machine 18
  • 19. In q0 four edges are terminating and in different outputs on them are only two 0 and 1 So q0 is split into two states q00 and q01 01, 1 01, 0 11, 0 q0 q1 00, 0 00, 1 11, 1 10, 1 10, 0 Similarly on state q1 four edges are terminating with two different output vales 0 and 1 so it is also split into two new states as q10 and q11. 19
  • 20. 01,10 00 00 00 q01 1 1 01 11 10, 01 q11 q00 10 0 00 11 11 11 q10 0 01,10 010010 18 q00 -01-q01-10-q01-01-q01-01-q01-11-q10-00- q01 20 011101 29 0 1 1 1 1 0 1 ie 101111 = 47
  • 21. • 0 1 0 0 1 0 18 • 0 1 1 1 0 1 29 47 q00 - 01- q01 -10 - q01 - 01- q01 - 01- q01-11- q10 – 00 - q01 • 0 1 1 1 1 0 1 ie • 101111 = 47 21