1. ARM Core variant:
 Flat memory model
 Memory protection unit model
 Memory management unit model
Flat memory model:
 Linear memory addressing , allowing direct access addressing of all memory locations
 Simple interface for programmers, clean design.
 Greatest flexibility
 Minimum hardware and CPU real estate for simple controller applications
 Maximum execution speed
 Not suitable for general computing or multi-tasking operating systems, as any task
can corrupt the state of another task.
 ARM7TDMI,ARM7EJ-S
Memory Protection Unit
 For multi-tasking platforms protection required of resources like:
o Memory device
o Peripheral Devices ( memory mapped mostly)
 Processors equipped with hardware unit , MPU, that actively protects system resources.
 MPU uses REGIONS to manage protection
 MPU based processor do not understand virtual memory concept.
What is a REGION:
 Set of attributes associated with an area of memory
How define Regions
 CP15 registers to define regions
 Define size and location of instruction and Data regions
 Set access permission for each region
 Set cache/Write buffer attributes for each region

2. About Regions:
 Regions can overlap other regions
 Regions are assigned priority number
 When overlapping, attributes of higher priority region takes precedence over other
 Regions starting address is multiple of its size
 Size range from 4KB – 4GB
 Example: OS protected Regions, Peripheral Region, Task1 Region, Task2 Region etc…
 ARM946E-S
MMU
 Protection of Resources
 Provides resourced to enable Virtual memory
 ARM1026EJ-S
Core instructions to support Multi-processor/core systems:
 Instruction to provide lock-free atomic “read-modify-write” operation
 LL/SC ( Load-link / Store-conditional )
 Purpose is to maintain shared-data integrity by preventing 2 masters making conflicting
access at the same time.
 Armv6 onwards (also armv5te) provides LL/SC instructions : LDREX/STREX to provide
exclusive access.
Memory Alias:
 Accessing a memory region through different address range (alias)
 For example 0x10000000 alias address maps to physical address 0x00000000
 Specific to chip design and works at hardware level
 Alias generator block that captures the CPU address to get the actual address
 Nothing to do with software.
 In our case : Arm9 can have 3 alias memory addressing :
0x10000000,0x20000000,0x30000000 mapping to physical RAM at 0x00000000