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Presented  By: IQxplorer
Contents ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Designing an I/O bus requires more than a protocol definition and electrical interface specification .While these are two very important aspects of any bus architecture, other issues must also be addressed, such as system design. In the past, a bus had to be made wider for higher performance through higher bandwidth. But the ever-shrinking desktop and server form factors required by IT and consumer markets has made this design methodology both unrealistic and expensive, both in terms of actual costs and power consumption.
I/O Bandwidth Problem ,[object Object],[object Object]
Technologies responsible for increased Bandwidth ,[object Object],[object Object],[object Object]
HyperTransport technology Solution ,[object Object],[object Object]
Original design Goals  ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Traditional Shared PCI Bus Architecture
HyperTransport Architechture
Features of HyperTransport ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Flexible I/O Architecture ,[object Object],Session Layer Transport Layer Protocol Layer Data Link Layer Physical layer
Physical Layer ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Data link Layer ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Protocol Layer ,[object Object],[object Object],[object Object]
Session Layer ,[object Object],[object Object],[object Object],[object Object],[object Object]
HyperTransport Base Packet Protocol ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
HyperTransport Control Packets ,[object Object],[object Object],[object Object],[object Object],[object Object],Control Packet Request Response Info
Low Latency Feature ,[object Object],[object Object]
HyperTransport Topologies ,[object Object],[object Object],[object Object],[object Object],[object Object]
Ā 
[object Object],[object Object],[object Object],[object Object]
[object Object],[object Object]
Applications for HyperTransport ,[object Object],[object Object],[object Object],[object Object]
[object Object],[object Object],[object Object],[object Object]
Conclusion ,[object Object],[object Object],[object Object],[object Object]
References ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

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Hyper Transport Technology

  • 1. Presented By: IQxplorer
  • 2.
  • 3. Designing an I/O bus requires more than a protocol definition and electrical interface specification .While these are two very important aspects of any bus architecture, other issues must also be addressed, such as system design. In the past, a bus had to be made wider for higher performance through higher bandwidth. But the ever-shrinking desktop and server form factors required by IT and consumer markets has made this design methodology both unrealistic and expensive, both in terms of actual costs and power consumption.
  • 4.
  • 5.
  • 6.
  • 7.
  • 8. Traditional Shared PCI Bus Architecture
  • 10.
  • 11.
  • 12.
  • 13.
  • 14.
  • 15.
  • 16.
  • 17.
  • 18.
  • 19.
  • 20. Ā 
  • 21.
  • 22.
  • 23.
  • 24.
  • 25.
  • 26.