* Overview of primary 3D bonding processes * Mechanics of metal bonding options * Mechanics for hybrid bond materials * Process requirement comparisons * Equipment requirements for hybrid bond processes

1. Hybrid Bonding Methods for
Lower Temperature
3D Integration
James Hermanowski
October 2010

2. 2
Overview
Overview of primary 3D bonding processes
Mechanics of metal bonding options
Mechanics for hybrid bond materials
Process requirement comparisons
Equipment requirements for hybrid bond processes
Summary

3. 3
Expanding CE (consumer electronics) market drives the Semiconductor
innovation
Push for integration
Reduction in power consumption
Smaller form factor
Image sensors and memory stacking (for mobile applications) are two mass
volume applications for TSVs with close time-to-market
1980‘s1950‘s Today
Enabling new devices
3D Integration: Stacking for Higher Capacity

4. 4
Fusion / Adhesive Bonding
Lithography, Adhesive Bonding
CMOS
ImageSensor
CMOS Image Sensor Integration (BSI)
CMOS Image Sensor Packaging
Wafer Level Optics Assembly Imprinting, UV Bonding
Kodak / Intel / Samsung
Memory
Stacking
DRAM
FLASH
NAND
Metal to Metal Bonding
Fusion bonding
Adhesive Bonding
SUSS Equipment for 3D Packaging

5. 5
3D IC Process Sequence Variations
A&C
B&D
E
F
G
H
I
Lithography Temp. Bonding
Aligning and Bonding (Permanent)
Source: Phil Garrou, MCNC 2008
Test

6. 6
3D IC Process Sequence Variations
"face-up" Bond (metal bonding)TSV from back (vias first)Wafer Thinning (temp. handle)No TSVI
TSV from front (vias last)"face-up" Bond (all methods)Wafer Thinning (temp. handle)No TSVH
TSV from back (vias last)Wafer Thinning (on 3D stack)"face-down" Bond (all methods)No TSVG
"face-up" Bond (metal bonding)Wafer Thinning (temp. handle)TSV from front (vias first)No TSVF
Wafer Thinning (on 3D stack)"face-down" Bond (metal bonding)TSV from front (vias first)No TSVE
Wafer Thinning (on 3D stack)"face-down" Bond (metal bonding)BEOL TSV (vias first)D
"face-up" Bond (metal bonding)Wafer Thinning (temp. handle)BEOL TSV (vias first)C
Wafer Thinning (on 3D stack)"face-down" Bond (metal bonding)FEOL TSV (vias first)B
"face-up" Bond (metal bonding)Wafer Thinning (temp. handle)FEOL TSV (vias first)A
Step #3Step #2Step #1IC WaferProcess

7. 7
Logic to Logic Stacking using Cu-Cu Metal to Metal 3D
Technology at the 300mm Wafer to Wafer Level
SOURCE: Intel Developers ForumSOURCE: Intel Developers Forum

8. 8
Stacked Memory Modules using Cu-Cu Metal to Metal
3D Method
SOURCE: Intel Developers Forum

9. 9
3D Structure using Wafer Level Cu-Cu Bonding

10. 10
Silicon Direct Bonded 3D Chip to Wafer Example
DBI employs a chemo-mechanical
polish to expose metal patterns
embedded in the silicon-oxide
surface of each chip. When the
metal connection points of each
chip are placed in contact using the
company's room-temperature die-
to-wafer bonding technology, the
alignment is preserved, as opposed
to other bonding techniques that
apply heat or pressure that can
result in misalignment. The oxide
bonds create high bond energy
between the surfaces, which brings
the metal contact points close to
each other to form effective
electrical connections between
chips after a 350°C anneal.

11. 11
RPI/Albany Nanotech and IBM, Freescale Approach
using BCB

12. 12
Preparation for Cu-BCB Hybrid Bonding
1. Cu on Device Layer on Si 2. Pattern Cu (this gives larger vias)
3. Coat w/ BCB
4. Planarize/Expose Cu Nails

13. 13
Preparation for Cu-SiO2 Hybrid Bonding
1. Oxide on Device Layer on Si
4. Planarize to Cu Nails
2. DRIE Etch Via holes
3. Fill Via holes w/ Cu

14. 14
Requirements for Diffusion Bonding
Proper materials system: Rapid Diffusion at Low Temperature
Same crystal structure best
Minimal size difference
High Solubility
High mobility and small activation energy
Diffusion Barriers to protected regions
High Quality films - No contamination or oxide layer for metals
Intimate Contact between surfaces
Process Variables
Heat
Pressure
Gas Ambient
Process Vacuum levels

15. 15
Complete Solid Solubility
• Both Cu and Ni are FCC crystals
• ρ(Cu)=8.93 gm/cm3
• ρ(Ni)=8.91 gm/cm3
• Lattice Spacing a0(Cu)=3.6148Å
• Lattice Spacing a0(Ni)=3.5239Å
Copper (Cu) - Nickel (Ni)
αα
liqliq
CuCu NiNi

16. 16
Microstructure Development
Interface Properties
1. Generally retain elastic properties of noble
metals.
2. Resistivity usually obeys Vegard’s rule - linear
with % atomic concentration of mix.
3. Full layer diffusion not needed.
4. Adhesion layers may be needed for initial
substrate deposition process.
5. Diffusion barrier may be incorporated with
adhesion layer to prevent diffusion into
substrate.
6. Wetting agents between A & B layers assists in
initialization of diffusion.
Silicon
Silicon
Metal A (Ni)
Metal B (Cu)
Fully mixed with

17. 17
Diffusion Bonding
1. The mechanical force of the bonder establishes intimate contact
between the surfaces. Some plastic deformation may occur.
2. During heating the atoms migrate between lattice sites across the
interface to establish a void free bond. RMS <2-5 nm required.
3. Vacancies and grain boundaries will exist in final interface area.
Hermeticity is nearly identical to a bulk material.

18. 18
Diffusion Pathways in Crystals: Poly vs Single
Single CrystallineFine Grain Poly-
Crystalline
Dsurface > Dgrain.boundary > Dbulk
Course Grain Poly-
Crystalline

19. 19
Type A Kinetics: Rapid Bulk Diffusion Rates
In Type A kinetics the
lattice diffusion rates are
rapid and diffusion
profiles overlap between
adjacent grains.
gbgb gbgb gbgbgbgbbulk bulk bulk

20. 20
In type B kinetics the grain
boundary is isolated
between grains. Behavior
mimics bulk diffusion.
Diffusion is by both grain
boundaries and bulk
atomic motion. Dominate
pathways are related to
grain size and density.
Type B Kinetics: Normal Bulk Diffusion w/ GB Effect
gbgb gbgb gbgbgbgbbulk bulk bulk

21. 21
In Type C kinetics the lattice
diffusion rate is insignificant
and all atomic transport is
dominated by grain boundary
diffusion only For example
room temperature diffusion.
Type C Kinetics: Insignificant Bulk Diffusion
gbgb gbgb gbgbgbgbbulk bulk bulk

22. 22
6
4
2
0
-6
-4
-2
6
4
2
0
-6
-4
-2
2 40 6 8 10 12
6
4
2
0
-6
-4
-2
2 40 6 8 10 12
Log[1/g.s.(cm)]
Log ρd (cm-2) Log ρd (cm-2)
Log[1/g.s.(cm)]
T/Tm = 0.3T/Tm = 0.4
T/Tm = 0.6 T/Tm = 0.5
gbgb
gbgbgbgb
gbgb
ll ll
ll
ll
dddd
dd
dd
• Regimes of grain size (g.s.)
and dislocation density ρd
over which (l) lattice
diffusion, (gb) grain
boundary diffusion of (d)
dislocation diffusion is the
dominate mechanism for
atomic motion.
• All data is normalized to the
melting point and applies for
a thin film fcc metal at
steady state.
• Shaded area is typical of thin
film dislocation density 108
to 1012 lines/cm2.
Low Temperature Diffusion Relies on Defects

23. 23
Metal Bonding Options
Reaction
Type
Metal †
Bond Temp Oxidizes CMOS
Compatible
Cu-Cu >350°C No Yes
Au-Au >300°C Yes No
Al-Ge >419°C No Yes
Au-Si >363°C Yes No
Au-Ge >361°C Yes No
Au-Sn >278°C No No
Cu-Sn >231°C No Yes
†
Eutectic bonds are done ~15°C above the listed eutectic
tempereature. Diffusion bonds lower limit expressed.
Diffusion
Eutectic
CMOS compatibility –barrier layers are often used to prevent metal migration to the CMOS structure.

24. 24
Key Unique Requirements for Metal Bonds
Surface roughness is important to allow the metal surfaces to
come into intimate contact, especially for diffusion bonding
Metal oxide formation can prevent strong bond formation
Preventive actions and process controls need to be established
Force requirements are much tougher
Structural issues with bond chamber will become much more
apparent during metal bonding
For example, the chamber shape may change with the application of
high heat and force causing unbonded areas to form in the devices
Temperature controls will be pushed harder
To obtain the tighter overlay possible with metal bonding, it is
important to control both wafers to tight temperature tolerances
To prevent oxide formation, it is more desireable to load wafers at
lower temperatures into the bond chamber

25. 25
Gold-Gold bond at 300°C for 30 min. Au layer is 350nm, Cr is
50nm thick
0.5μm
AuAu
AuAu
CrCr
CrCr
SiSi
SiSi
InterfaceInterface
0.5μm
AuAu
AuAu
CrCr
CrCr
SiSi
SiSi
InterfaceInterface
Surface roughness is important
to maintain intimate contact and
good bonds.

26. 26
Thin (400nm) Cu/Cu bonds at 300°C for 30 min.
1μm
Si
Si
Cu
Cu
Interface Interface
1μm1μm
Si
Si
Cu
Cu
Interface Interface
Ultra smooth surfaces allow
better molecular intermixing
and deliver good bond quality

27. 27
Common Polymer Material Choices
Company Dow Toray Sumitomo Sumitomo Dow Corning HD-Micro HD-Micro MicroChem
Trade Name Cyclotene PWDC-1000 CRC-8000 CRX 2580P WL-5000 HD-2771 HD-3003XP SU8
Material BCB PI PBO PI Silicone PI PI Epoxy
PhotoPatternable Both Negative Positive Positive Yes Yes Negative Yes Negative Both Negative
Residual Stress
(MPa)
28 28 60 <6.4
Moisture Uptake (%) 0.23 0.6 0.3-0.9 0.06 ~0.2 >1.0 0.08%
Coefficient of
Thermal Expansion
(ppm/°C)
52 36 51 100 <236 42 124 52
Glass Transistion
Temperature (°C)
>350 295 294 188 50-55
Cure Temperature
(°C)
210-250 250+ 320 200 <250 >350 220 95
Dielectric Constant 2.65 2.9 2.65 <3.3 3 3.4
Modulus (GPa) 2.9 2.9 2.9 1.6 0.15-0.335 2.7 2.4 4
Thermal Stability
(%loss at 350C/1hr)
2 <1 5 <6 <1 <1
Shrinkage During
Cure (%)
2.5 <2 40-50 <0.04%
Minimum Thickness
(µm)
1 3 3 10 2 4 1 5
Storage Temperature
(°C)
-15 4 -15 r.t. or -18
Shelf Life (mos.) 6 6 6 12 @ -18C

28. 28
BCB Phase Diagram: Tailored Solutions
Liquid
Solid
• Control of bond kinetics allows
interface to become more or less
compliant to device layers and
structures.
• Control of phase transformation
and gaseous byproducts happens
during both the pre-cure and the
final bond process.
65°C 100°C 125°C 150°C 175°C

29. 29
Hybrid Cu/BCB Bonds
Sample # Lx Ly Rx Ry
92 -1.45 -0.75 -0.55 0.40
Benefits to maintaining alignment while bonding metal with BCB as a supporting layer and
interlayer dielectric

30. Equipment for Permanent & Temporary
Bonding for 3D Integration

31. 31
Permanent Bonding
Cu-Cu Bonding
Polymer / Hybrid Bonding
Fusion Bonding
Temporary Bonding/De-bonding
capability
Thermoplastics Process (eg. HT10.10)
3M WSS Process
Dupont / HD Process
Thin Materials AG (TMAT) Process
Total Process Flexibility for 3D Applications
XBC300 Standardized Platform

32. 32
XBC300 Configuration Examples
SC300
For
adhesive
coating
Module 3
PL300
(TMAT)
Laser
module
DB300
Tape on
frame
LF300
SC300
for
cleaning
(optional)
Temporary Bonding De-bonding

33. 33
True Modular Design

34. 34
True Modular Design

35. 35
True Modular Design

36. 36
True Modular Design
True Modular Design
Lowers investment risk
Ideal for changing
technology requirements
Lowers COO
Small footprint, high
throughput

37. 37
BA300UHP
Aligner
CB300
Bonder
CP300 Cool Plate
SC300 Spin
Coater
PL300T
Surface Prep
LF300 Low
Force Bonder
DB300
Debonder
Temporary Bonding
Permanent Bonding
CL300 Wafer
Cleaning
PL300
Plasma
Activation
Process Flexibility: Complete Line of Process Modules

38. 38
Permanent Bonding Configurations
BA300UHP
Aligner
CB300
Bonder
CP300
Cool
Plate
Fusion Bond Configuration Cu-Cu and Polymer
Bond Configuration*
BA300UHP
Aligner
(if alignment
with keys
required)
PL300
Plasma
Activation
CL300
Wafer
Cleaning
*Optional Die to Wafer Collective Bonding

39. 39
Permanent Bond Configurations
BA300UHP Bond Aligner – submicron alignment accuracy
CB300 Bond Chamber – temperature & force uniformity
CP300 Cool Plate – controlled cool rate
*Optional Die to Wafer Collective Bonding
Cu-Cu and Polymer Bond Configuration*

40. 40
Sub Micron Alignment Accuracy
Path to 350nm PBA for Cu-Cu bonding
Path to 150nm PBA for Fusion bonding
ISA alignment mode for face to face alignment
Allows smaller via diameters and higher via
densities
Built in Wedge Error Compensation
(WEC) to make upper and lower wafers
parallel prior to alignment
Eliminates wafer shift during wafer clamping
Closed loop optical tracking of
mechanical movements
Void free bonding in the BA with RPP™
Patent pending RPP™ creates an
engineered bond wave for propagation
Eliminates need for bond module
BA300UHP Bond Aligner Module

41. 41
Fusion Bonding in the BA300UHP
Wafers are loaded and vacuum held against SiC chucks
Chucks and the vacuum or pressure, that can be controlled
between the chuck and the backside of the wafer,
“engineers” the shape of the bonding surface
The chucks are used to align and bring the wafers into
contact
The chucks are also used to engineer the bond wave from
center to edge using RPP (Radial Pressure Propagation).
Click icon for
RPP Presentation
XBC300 Wafer Bonder
RPP (Radial Pressure Propagation)
in the BA300UHP Aligner Module

42. 42
Si C Chuck & Tool Fixture (Patent Pending)
Transports aligned pair from BA300
to CB300
Delivers reproducible submicron
alignment capabilities
Maintains wafer to wafer alignment
throughout all process and transfer
steps
No exclusion zone required for
clamping
Maintains alignment accuracy
through temperature ramp
Chuck CTE matches Si CTE
Increases throughput by reduction
of thermal mass

43. 43
CB300 Bond Chamber Module
Production Requirement Closed Bond
Chamber
Contamination Free
Open chamber lid introduces air-
turbulence and particles into bond
chamber
Uniform heat
Open chamber lid causes temperature
gradient between the front and back
3 Post Superstructure takes force, not bond
chamber
Chamber lid is the structural force
carrying element in clam shell design–
this causes force distortion
Safety
Opening chamber lid exposes user to
high temperatures

44. 44
CB Chamber Force Uniformity
Excellent Force Uniformity
Within ±5% pressure uniformity
Patented Pressure Column Technology for up to 90kN of bond force
Load Cell Verification
Bond Force options
Standard: 3kN to 60kN
High Force Option: 3kN to 90kN
Traditional PistonTraditional Piston
Bond-
Interface
SUSS Pressure Column TechnologySUSS Pressure Column Technology

45. 45
CB Chamber Thermal Design
Superior Thermal Performance
Within ±1.5% temperature
uniformity
Fast ramp (to 30°C/min) and
cool rate (to 20°C/min)
Matched top and bottom stack
assemblies
Perfect symmetry
Multi-zone, vacuum-isolated
heaters
Dramatically reduces hot
spots and burnouts
Eliminates edge effects

46. 46
CB Chamber Structural Design
Best-in-Class Post Bond Alignment
±1.5µm post bond alignment for metal
bonds
Rigid superstructure
Solid alignment stability
High planarity silicon carbide chucks
Maintains long term planarity for
superior post-bond alignment accuracy

47. 47
CP300 Cool Plate Module
Fixture and wafer cooling
Unclamp, unload, and optional
fixture load
Queuing and buffer station for
fixtures and wafers

48. 48
CL300 Wafer Cleaning Module for Fusion Bonding
Wet spin process for wafer
cleaning
Twin ultrasonic head
IR Assisted Drying
NH4OH chemistry
Simultaneous clean, mechanical
align and bond two wafers
Bond initiation integrated into CL300
Closed process chamber for
maximum particle protection
Rated for particle sizes down to
100nm
Design based on CFD
(computational fluid dynamic)
modeling
Example of KLA data w/ no adders down to 100nm
CFD modeling of chamber

49. 49
PL300 Plasma Activation Module for Fusion Bonding
Cleaning & surface conditioning for
fusion bonding
Simple operation with plasma
activation times in <30 seconds
Enables high bond strength at low
annealing temperatures
Vacuum chamber based plasma
system
Uniform glow plasma
Power supply options for frequency
and power level
Ex: 100kHz/300W; 13.56MHz; 2.4GHz
Automatic tuning
Input gases with up to 4 MFCs
Radially designed high conductance
plenum and vacuum system

50. 50
Summary
Metal, fusion and hybrid bond processes have been reviewed
Hybrid bond processes require mixture of metal bond processing
with either oxide bonding or polymer bond process modules
Tool flexibility is important
Metal hybrid bonding processes are being implemented as the
next generation solution
Although metal hybrid bonding processes have many advantages
over other approaches they also require much more from the
process equipment
For example much more stringent specs for force and thermal control
Process equipment proven to satisfy these requirements has
been presented