1. JNTUW
ORLD
Code: 9D57105
M.Tech - I Semester Regular and Supplementary Examinations, April/May 2012
HARDWARE SOFTWARE CO-DESIGN
(Common to VLSIS, VLSISD, VLSI and VLSID)
Time: 3 hours Max Marks: 60
Answer any FIVE questions
All questions carry equal marks
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1 (a) What are the driving factors in hardware/ software co-design?
(b) Discuss in detail generic co-design methodology.
2 (a) Explain about hardware and software synthesis algorithms.
(b) Write a note on component specialization techniques.
3 (a) Explain the architecture of control dominated systems.
(b) Draw the co-design computational model for any embedded application and give its
significance.
4 (a) Brief note on system level specialization languages.
(b) Write short notes on co-simulation model.
5 (a) Write short notes on interfacing component.
(b) Write notes on design representation for system level synthesis.
6 (a) Distinguish between design specification and verification.
(b) Write notes on Lycos system.
7 Give a brief notes for the following:
(a) A generic co-design methodology.
(b) Compile development environment.
8 (a) Write your view on hardware-software partioning.
(b) Write short notes on the following:
(i) Shared status Vs messages.
(ii) Programming constructs.
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