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T2
                  What the Second Generation Holds
                                                         www.tinyos.net


Philip Levis, David Gay, Vlado Handziski, Jan Hauer, Jon Ko, Kevin Klues, John
Regehr, Janos Sallai, Miklos Maroti, Branislav Kusy, David Moss, Jan Beutel, Adam
Wolisz, and many more...
In the Beginning
                    (1999)




Sensor networks are on the horizon...
... but what are they going to do?
  What problems will be important?
  What will communication look like?
  What will hardware platforms look like?
Having an operating system is nice...
... but how do you design one with these
uncertainties?
The TinyOS Goals
               (ASPLOS 2000)




Allow high concurrency
Operate with limited resources
Adapt to hardware evolution
Support a wide range of applications
Be robust
Support a diverse set of platforms
TinyOS Basics

A program is a set of components
  Components can be easily developed and reused
     Adaptable to many application domains
  Components can be easily replaced
  Components can be hardware or software
     Allows boundaries to change unknown to programmer

Hardware has internal concurrency
  Software needs to be able to have it as well
Hardware is non-blocking
  Software needs to be so as well
TinyOS Basics, Continued
                    (2002)




 Non-volatile       Non-volatile
    Storage            Storage
Encrypt Encrypt    Encrypt Encrypt
 This   Finished    This     Finished

                                        Interface


  Hardware            Software
                                               Tasks
   Crypto              Crypto

  Component          Component
The TinyOS Goals
               (ASPLOS 2000)




Allow high concurrency
Operate with limited resources
Adapt to hardware evolution
Support a wide range of applications
Be robust
Support a diverse set of platforms
Outline


TinyOS
Issues facing a second-generation OS
T2 core structure
Multi-layer abstractions
Static binding and allocation
Power locks
Supporting Applications

Complexities stem from hidden
dependencies over shared resources
  E.g., SPI bus
Ineficiencies stem from tension between
local independence and global properties
  All 6 use the radio, but how can the app know?
A next generation OS needs to have true
APIs that encapsulate underlying services
in a usable whole
An Example: CC2420

Platform diversity: needs to be easily
portable to new platforms (micaZ + Telos)

Robustness: 1.x implementation breaks
TinyOS concurrency model due to shared
task queue

Applications: interactions with other
components are a big source of problems
Three Approaches

Multi-layer abstractions
  Present a true spectrum of abstraction layers,
  from the most general and portable to the most
  eficient and platform-specific
Static binding and allocation
  Anything and everything that can be determined
  statically, should be
Power locks
  Greatly simplify power management and writing
  device drivers
Outline


TinyOS
Issues facing a second-generation OS
T2 core
Multi-layer abstractions
Static binding and allocation
Power locks
T2 Core



Platforms
Concurrency model
Scheduler
T2 Platforms

A platform is a collection of chips
  Platform       MCU        Radio
   mica2       ATMega128   CC1000
   micaZ       ATMega128   CC2420
    Telos       MSP430     CC2420
    eyes        MSP430     Infineon

Chip implementations are platform
independent
Platforms provide adapter code
TinyOS 1.x Concurrency

Tasks run to completion (do not preempt)
  while(1) {runNextTaskOrSleep();}
Two kinds of function
  Synchronous: can only run in a task (main)
  Asynchronous: can run in a task or interrupt
     Asynchronous code can preempt
     Compile-time race condition detection

Posting is how you go from async to sync
Concurrency Model

T2 has the same basic concurrency model
   Tasks, sync vs. async
T2 changes the task semantics
   TinyOS 1.x: post() can return FAIL, can post()
   multiple times (shared slots)
   T2: post returns FAIL i the task is already in the
   queue (single reserved slot per task)




TinyOS 1.x                        T2
Outline


TinyOS
Issues facing a second-generation OS
T2 core
Multi-layer abstractions
Static binding and allocation
Power locks
Varying Specificity



I   send packets
I   send packets and expect acks
I   sometimes turn o CSMA
I   sometimes turn o address decoding
More Varying Specificity


I need a timer, roughly ms granularity,
some jitter is OK
I need a timer, 32kHz granularity, as low
jitter as possible
I need a timer, 32kHz granularity, that
works in low power mode X
Multi-Layer Abstractions

       Many fine-grained layers of increasing
       power and specificity


      ActiveMessageC              Active Message
                                  CSMA
                                  802.15.4 Packet
CC2420ActiveMessageC
                                  802.15.4 Specific

       CC2420RadioC
Partial Virtualization


Some abstractions are shared and virtual
  Basic timers, packet transmission
Some are dedicated and physical
  Compare register B2 for CC2420 MAC timing
Some are shared and physical
  SPI bus between CC2420 and flash storage
  More on these later
Their Eect


Make it clear when your code is portable
vs. platform specific
  Improve robustness by making exchanging
  hidden dependencies for explicit ones
Enable a wider range of applications
  Support full spectrum of simple and portable to
  high-performance subsystems
Outline


TinyOS
Issues facing a second-generation OS
T2 core
Multi-layer abstractions
Static binding and allocation
Power locks
Static Binding

     nesC components can only interact
     through interfaces
                    interface SendMsg {...}
configuration MyAppC {               configuration CommC {
  uses interface SendMsg;              provides interface SendMsg;
}                                    }




                MyAppC.SendMsg - CommC.SendMsg
Static Binding, Continued

          Run-time vs. compile time parameters
interface CC2420Register {
  command uint16_t read(uint8_t reg);
  command uint8_t write(uint8_t reg, uint16_t val);
  command uint8_t strobe();
}
component CC2420C {
  provides interface CC2420Register;
}

interface CC2420StrobeReg {
  command uint8_t strobe();
}
component CC2420C {
  provides interface CC2420StrobeReg as SNOP;
  provides interface CC2420StrobeReg as STXONCCA;
   ....
}
Static Allocation

You know what you’ll need: allocate it at
compile-time (statically)
Depending on probabilities is a bet
  I.e., “it’s very unlikely they’ll all need to post
  tasks at once” = “they will”
You know what components will use a
resource, can allocate accordingly
  In some cases, static allocation can save memory
Saving Memory

module Foo {                           module Foo {
  bool busy;                             bool busy;

  command result_t request() {          command result_t request() {
    if (!busy()                         return post fooTask();
        post fooTask() == SUCCESS) {    }
      busy = TRUE;
      return SUCCESS;
    }
    else {
      return FAIL;
    }
  }


           TinyOS 1.x                                 T2
Eects


Static binding improves robustness
  Push as many checks to compile-time as possible
  Bad parameters become impossible compositions
Static allocation improves robustness
  You can make safe assumptions in code
  Code is shorter, simpler, and more deterministic
Outline


TinyOS
Issues facing a second-generation OS
T2 core
Multi-layer abstractions
Static binding and allocation
Power locks
Common Belief


Power management requires application
knowledge and control
OS provides explicit power management
  TinyOS 1.x: StdControl/SplitControl
  MantiOS: on/o
  SOS: device-specific functions
No limits, but also no help
Power Locks


                                       Power Lock
Define three classes of driver
power management: virtual,
dedicated, shared               Lock
Integrate power
management and
concurrency control at
lowest levels of OS
                                       Power Control
Reduces sample application
from 400 to 50 lines, 99%
eficiency of hand-tuned
Basic Application

Every 5 minutes:             Every 12 hours:
Turn on SPI bus              Turn on SPI bus
Turn on flash chip           Turn on radio
Turn on voltage reference    Turn on flash chip
Turn on I2C bus              while (new readings):
Log prior readings             turn on SPI bus
Start humidity sample          send prior reading
Wait 5ms for log               get next reading
Turn off flash chip            wait 5ms for log
Turn off SPI bus               turn off SPI bus
Wait 12ms for vref             wait for send
Turn on ADC
Start total solar sample
Wait 2ms for total solar
Start photo active sample            Every 5 minutes:      Every 12 hours:
Wait 2ms for photo active            Write prior samples   For all new log entries:
Turn off ADC                         Sample photo active     Send current sample
Turn off vref                        Sample total solar      Read next sample
Wait 34ms for humidity               Sample temperature
Start temperature sample             Sample humidity
Wait 220ms for temperature
Turn off I2C bus
Shared

          Many clients, explicit concurrency (lock)
               Allow clients to manage atomicity
               No request buering/scheduling
                                        Virtualized
          Lock has request information, manages
          power
                                        Virtualizer                 Dedicated

generic configuration Msp430Spi0C() {
  provides interface Resource;
  provides interface SpiByte;
  provides interface SpiPacket;                           Arbiter
                                                 Shared
}



                                                 System
Internals

           Need a general, simple mechanism for
           a huge variety of subsystems, devices,
           and policies
       Power Lock
                       Lock                Arbiter
Lock

                                  Power
                                                 Configurator
                                 Manager

       Power Control
Utility

       Power locks have been applied to the
       entire TinyOS code base (114 drivers)

ADC on atmega128                             USART on msp430
ADC Client
                                              I2C Client
                                                                        Arbiter
                                                                  L
                    L
ReadVirtualizer                Arbiter              SPI Client

                                                                        AC
                          AC
                                                                              D
                                                            I2C       SPI
                                     D
    Adc           Config
                   HC                                            HC
                                Power                                    Power
                          P                                           P Manager
    Atm128Adc                                    Msp430Usart
                               Manager
Power Locks
• TEP 108: Resource Arbitration
• Detailed paper in SOSP 2007
• Power trace from sample low-rate sensing application with
  no explicit power management:
Conclusion
The State of the Art Today

 Sensor networks are dierent
 Revisiting old problems and assumptions
   Dierent resource constraints
   Dierent design tradeos
   Sometimes new problems, sometimes not
 Opening the doors to innovation
 Systems to support a huge range of
 requirements, applications, and
 abstractions
Components

Innovation and exploration require
flexible systems
  Arbitrary boundaries
  Arbitrary composition
Current systems maximize flexibility
  TinyOS: collections of components
This flexibility sacrifices reliability
  E.g, TinyOS - SOS
  Inherent tension between flexibility/reliability
The Hidden Cost

Arbitrary flexibility prevents you from
promising anything
  Robustness, performance, etc.
You can still build applications, but it’s
hard and time consuming
T2: leverage nine years of experience
  Not all flexibility is needed
  Can we trade o some for improved usability and
  performance?
TinyOS Alliance

Working groups have a charter and write
permission to a subset of the tree
  core, net2, doc, zigbee, etc.
  Each working group has its own member policies
  Anyone can join, contact a working group chair

Tinyos-devel list for development
discussion (administrative on WG lists)

Tinyos-help for users
Working Groups

Active
  core: TinyOS core, hardware abstractions
  net2: multihop protocols (e.g., collection, IP)
  15-4: 802.15.4 standard
  zigbee: ZigBee protocol standard
  doc: documentation
Inactive
  sim: simulation infrastructure
  tools: Safe TinyOS, compilation tools (completed)
Questions

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T2: What the Second Generation Holds

  • 1. T2 What the Second Generation Holds www.tinyos.net Philip Levis, David Gay, Vlado Handziski, Jan Hauer, Jon Ko, Kevin Klues, John Regehr, Janos Sallai, Miklos Maroti, Branislav Kusy, David Moss, Jan Beutel, Adam Wolisz, and many more...
  • 2. In the Beginning (1999) Sensor networks are on the horizon... ... but what are they going to do? What problems will be important? What will communication look like? What will hardware platforms look like? Having an operating system is nice... ... but how do you design one with these uncertainties?
  • 3. The TinyOS Goals (ASPLOS 2000) Allow high concurrency Operate with limited resources Adapt to hardware evolution Support a wide range of applications Be robust Support a diverse set of platforms
  • 4. TinyOS Basics A program is a set of components Components can be easily developed and reused Adaptable to many application domains Components can be easily replaced Components can be hardware or software Allows boundaries to change unknown to programmer Hardware has internal concurrency Software needs to be able to have it as well Hardware is non-blocking Software needs to be so as well
  • 5. TinyOS Basics, Continued (2002) Non-volatile Non-volatile Storage Storage Encrypt Encrypt Encrypt Encrypt This Finished This Finished Interface Hardware Software Tasks Crypto Crypto Component Component
  • 6. The TinyOS Goals (ASPLOS 2000) Allow high concurrency Operate with limited resources Adapt to hardware evolution Support a wide range of applications Be robust Support a diverse set of platforms
  • 7. Outline TinyOS Issues facing a second-generation OS T2 core structure Multi-layer abstractions Static binding and allocation Power locks
  • 8. Supporting Applications Complexities stem from hidden dependencies over shared resources E.g., SPI bus Ineficiencies stem from tension between local independence and global properties All 6 use the radio, but how can the app know? A next generation OS needs to have true APIs that encapsulate underlying services in a usable whole
  • 9. An Example: CC2420 Platform diversity: needs to be easily portable to new platforms (micaZ + Telos) Robustness: 1.x implementation breaks TinyOS concurrency model due to shared task queue Applications: interactions with other components are a big source of problems
  • 10. Three Approaches Multi-layer abstractions Present a true spectrum of abstraction layers, from the most general and portable to the most eficient and platform-specific Static binding and allocation Anything and everything that can be determined statically, should be Power locks Greatly simplify power management and writing device drivers
  • 11. Outline TinyOS Issues facing a second-generation OS T2 core Multi-layer abstractions Static binding and allocation Power locks
  • 13. T2 Platforms A platform is a collection of chips Platform MCU Radio mica2 ATMega128 CC1000 micaZ ATMega128 CC2420 Telos MSP430 CC2420 eyes MSP430 Infineon Chip implementations are platform independent Platforms provide adapter code
  • 14. TinyOS 1.x Concurrency Tasks run to completion (do not preempt) while(1) {runNextTaskOrSleep();} Two kinds of function Synchronous: can only run in a task (main) Asynchronous: can run in a task or interrupt Asynchronous code can preempt Compile-time race condition detection Posting is how you go from async to sync
  • 15. Concurrency Model T2 has the same basic concurrency model Tasks, sync vs. async T2 changes the task semantics TinyOS 1.x: post() can return FAIL, can post() multiple times (shared slots) T2: post returns FAIL i the task is already in the queue (single reserved slot per task) TinyOS 1.x T2
  • 16. Outline TinyOS Issues facing a second-generation OS T2 core Multi-layer abstractions Static binding and allocation Power locks
  • 17. Varying Specificity I send packets I send packets and expect acks I sometimes turn o CSMA I sometimes turn o address decoding
  • 18. More Varying Specificity I need a timer, roughly ms granularity, some jitter is OK I need a timer, 32kHz granularity, as low jitter as possible I need a timer, 32kHz granularity, that works in low power mode X
  • 19. Multi-Layer Abstractions Many fine-grained layers of increasing power and specificity ActiveMessageC Active Message CSMA 802.15.4 Packet CC2420ActiveMessageC 802.15.4 Specific CC2420RadioC
  • 20. Partial Virtualization Some abstractions are shared and virtual Basic timers, packet transmission Some are dedicated and physical Compare register B2 for CC2420 MAC timing Some are shared and physical SPI bus between CC2420 and flash storage More on these later
  • 21. Their Eect Make it clear when your code is portable vs. platform specific Improve robustness by making exchanging hidden dependencies for explicit ones Enable a wider range of applications Support full spectrum of simple and portable to high-performance subsystems
  • 22. Outline TinyOS Issues facing a second-generation OS T2 core Multi-layer abstractions Static binding and allocation Power locks
  • 23. Static Binding nesC components can only interact through interfaces interface SendMsg {...} configuration MyAppC { configuration CommC { uses interface SendMsg; provides interface SendMsg; } } MyAppC.SendMsg - CommC.SendMsg
  • 24. Static Binding, Continued Run-time vs. compile time parameters interface CC2420Register { command uint16_t read(uint8_t reg); command uint8_t write(uint8_t reg, uint16_t val); command uint8_t strobe(); } component CC2420C { provides interface CC2420Register; } interface CC2420StrobeReg { command uint8_t strobe(); } component CC2420C { provides interface CC2420StrobeReg as SNOP; provides interface CC2420StrobeReg as STXONCCA; .... }
  • 25. Static Allocation You know what you’ll need: allocate it at compile-time (statically) Depending on probabilities is a bet I.e., “it’s very unlikely they’ll all need to post tasks at once” = “they will” You know what components will use a resource, can allocate accordingly In some cases, static allocation can save memory
  • 26. Saving Memory module Foo { module Foo { bool busy; bool busy; command result_t request() { command result_t request() { if (!busy() return post fooTask(); post fooTask() == SUCCESS) { } busy = TRUE; return SUCCESS; } else { return FAIL; } } TinyOS 1.x T2
  • 27. Eects Static binding improves robustness Push as many checks to compile-time as possible Bad parameters become impossible compositions Static allocation improves robustness You can make safe assumptions in code Code is shorter, simpler, and more deterministic
  • 28. Outline TinyOS Issues facing a second-generation OS T2 core Multi-layer abstractions Static binding and allocation Power locks
  • 29. Common Belief Power management requires application knowledge and control OS provides explicit power management TinyOS 1.x: StdControl/SplitControl MantiOS: on/o SOS: device-specific functions No limits, but also no help
  • 30. Power Locks Power Lock Define three classes of driver power management: virtual, dedicated, shared Lock Integrate power management and concurrency control at lowest levels of OS Power Control Reduces sample application from 400 to 50 lines, 99% eficiency of hand-tuned
  • 31. Basic Application Every 5 minutes: Every 12 hours: Turn on SPI bus Turn on SPI bus Turn on flash chip Turn on radio Turn on voltage reference Turn on flash chip Turn on I2C bus while (new readings): Log prior readings turn on SPI bus Start humidity sample send prior reading Wait 5ms for log get next reading Turn off flash chip wait 5ms for log Turn off SPI bus turn off SPI bus Wait 12ms for vref wait for send Turn on ADC Start total solar sample Wait 2ms for total solar Start photo active sample Every 5 minutes: Every 12 hours: Wait 2ms for photo active Write prior samples For all new log entries: Turn off ADC Sample photo active Send current sample Turn off vref Sample total solar Read next sample Wait 34ms for humidity Sample temperature Start temperature sample Sample humidity Wait 220ms for temperature Turn off I2C bus
  • 32. Shared Many clients, explicit concurrency (lock) Allow clients to manage atomicity No request buering/scheduling Virtualized Lock has request information, manages power Virtualizer Dedicated generic configuration Msp430Spi0C() { provides interface Resource; provides interface SpiByte; provides interface SpiPacket; Arbiter Shared } System
  • 33. Internals Need a general, simple mechanism for a huge variety of subsystems, devices, and policies Power Lock Lock Arbiter Lock Power Configurator Manager Power Control
  • 34. Utility Power locks have been applied to the entire TinyOS code base (114 drivers) ADC on atmega128 USART on msp430 ADC Client I2C Client Arbiter L L ReadVirtualizer Arbiter SPI Client AC AC D I2C SPI D Adc Config HC HC Power Power P P Manager Atm128Adc Msp430Usart Manager
  • 35. Power Locks • TEP 108: Resource Arbitration • Detailed paper in SOSP 2007 • Power trace from sample low-rate sensing application with no explicit power management:
  • 37. The State of the Art Today Sensor networks are dierent Revisiting old problems and assumptions Dierent resource constraints Dierent design tradeos Sometimes new problems, sometimes not Opening the doors to innovation Systems to support a huge range of requirements, applications, and abstractions
  • 38. Components Innovation and exploration require flexible systems Arbitrary boundaries Arbitrary composition Current systems maximize flexibility TinyOS: collections of components This flexibility sacrifices reliability E.g, TinyOS - SOS Inherent tension between flexibility/reliability
  • 39. The Hidden Cost Arbitrary flexibility prevents you from promising anything Robustness, performance, etc. You can still build applications, but it’s hard and time consuming T2: leverage nine years of experience Not all flexibility is needed Can we trade o some for improved usability and performance?
  • 40. TinyOS Alliance Working groups have a charter and write permission to a subset of the tree core, net2, doc, zigbee, etc. Each working group has its own member policies Anyone can join, contact a working group chair Tinyos-devel list for development discussion (administrative on WG lists) Tinyos-help for users
  • 41. Working Groups Active core: TinyOS core, hardware abstractions net2: multihop protocols (e.g., collection, IP) 15-4: 802.15.4 standard zigbee: ZigBee protocol standard doc: documentation Inactive sim: simulation infrastructure tools: Safe TinyOS, compilation tools (completed)