2. Inverter Topologies
The harmonic free
sinusoidal output is a
major area that has
been investigated for
many years as it is
highly desirable in
most inverter
applications.
• Some switching techniques are
utilized for the purpose of
enhancing the magnitude of
the fundamental component
and reducing the harmonics to
obtain minimized total
harmonic distortion.
3. In the harmonic elimination techniques the lower order harmonics
are effectively reduced from output voltage by fundamental
switching, so smaller output filters can easily be used to eliminate
the remaining higher order harmonics.
The
topologies are
explained in
the following
sequence:
•
•
•
•
•
•
Circuit Diagram.
Output Voltage waveform.
Fourier Analysis.
Switching Angles Calculation.
Spectrum of Output Sinusoidal waveform.
Calculation of Total Harmonic Distortion
4. Fundamental idea of harmonic Elimination
6
Fundamental Component
3rd Harmonic
4
2
120 Degree Conduction
210
330
0
30
150
120 Degree Conduction
-2
-4
-6
0
50
100
150
200
250
300
Degree
Elimination of 3rd Harmonic via Switching
350
21. PWM Inverter Output Voltage Waveform for M=0.82
Voltage Spectrums Normalized to
Fundamental Component
22. for M=0.9
for M=0.9
6
100
4
THD=36.48%
80
Harmonics Magnitude
Voltage Vo
2
0
-2
-4
60
40
20
-6
0
0.002
0.004
0.006
0.008
Time t
0.01
0.012
0.014
0.016
0
0
for M=0.87
for M=0.87
100
6
THD=34.29%
4
Harmonics Magnitude
80
2
Voltage Vo
60 120 180 240 300 360 420 480 540 600 660
Frequency Hz
0
-2
60
40
20
-4
-6
0
0
0.002
0.004
0.006
0.008
Time t
0.01
0.012
0.014
0.016
0
60 120 180 240 300 360 420 480 540 600 660
Frequency Hz
23. Diode Clamped Multilevel Inverter (DCMLI)
E4
Sa
S'e
Vdc
Da
Sb
Db
Sc
De
S'f
E3
Df
S'g
Vdc
Dc
Sd
Dg
S'h
A
LOAD
E2
B
S'a
S'b
S'c
Se
D'a
Sf
D'b
D'c
Sg
D'e
Vdc
D'f
E1
D'g
Vdc
S'd
Sh
0
Diode Five-Level Bridge Multilevel Inverter
E0
24. Five-level DCMLI voltage levels and their corresponding switch states.
V0
E4
E3
E2
E1
E0
E-1
E-2
E-3
E-4
ωt
α1 α2 α3 α4 π/2
π
Phase voltage waveform of 5-level inverter
2π
25. Fourier Analysis
The Fourier series of the quarter-wave symmetric 5-level DCMLI
multilevel waveform
Switching Angles Computation
The equations used to calculate switching angles are:
26. 5-Level DCMLI Output Voltage Waveform for M=0.82
Voltage Spectrums Normalized to
Fundamental Component
27. Pulse Width Modulated (PWM) multilevel Inverters
E1
Sa
S'c
Vdc
Da
Sb
Dc
S'd
A
LOAD
E1
B
S'a
D'a
Sc
D'c
Vdc
S'b
Sd
0
E0
Single-phase Full- Bridge PWM inverter
3-level PWM DCMLI voltage levels and corresponding switch states.
28. V0
E2
E1
E0
α1α2 α3 α4 α5 π/2
π
ωt
2π
E-1
E-2
3-level PWM output voltage waveform
Fourier Analysis
The Fourier series of the quarter-wave symmetric 3-level PWM
voltage waveform is:
output
30. 3-level PWM Inverter Output Voltage Waveform for M=0.82
Voltage Spectrums Normalized to
Fundamental Component
31. Conclusion
• The PWM inverter though took four switches
for implementation (less than other two) but
Simulation
resulting THD is greater of all.
results of • The DCMLI resulting THD is lowest of all but it
three
took too many devices for implementation.
different 1- • The PWM in DCMLI (Combination of PWM
φ inverters and DCMLI) have less number of switches
were
than the DCMLI and low THD than PWM
inverter, implying that this technique is
presented
economically and technically best to
implement
