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1. ELECTRONICALLY ADJUSTABLE LOAD FOR TESTING THREE PHASE AC
SYSTEMS
Kehler L.B., Corrêa L.C., Ribeiro C.G., Trapp J.G, Dr., Lenz J.M. and Farret, F.A., PhD
Center of Studies in Energy and Power Systems
Federal University of Santa Maria
Santa Maria, Brazil
leandrokehler@gmail.com
Abstract – Some equipment such as AC voltage
sources, power generators, inverters, and others
converters have to be exhaustively tested before being
used. To implement these tests it is necessary, in many
cases, to use variable AC loads, such as passive
(inductive, capacitive and resistive) and active loads
(battery chargers and photovoltaic panels). This paper
presents an analysis and design of an AC electronic load
to emulate either purely active and reactive three-phase
loads or other impedance combinations. This electronic
variable load allows the user set precisely the amount of
power required for practical experiments and bench
tests. Furthermore, this work presents the modeling of a
voltage source converter (VSC) and a buck converter,
used to purpose of emulating a variable and adjustable
load. Also it is discussed the compensators design to
control the converter and is presented simulation results
with the electronically adjustable load to active and
reactive power consumption.
Keywords - AC electronic loads; load simulation;
power converter; reactive loads; resistive load.
I. INTRODUCTION
The development of electrical and electronic equipment
grows exponentially with the advent of new technologies.
Devices such as power converters and inverters are used in
most electrical equipment, demanding for variable high
power levels.
Many manufacturers expends lots of time with equipment
tests. AC voltage sources, generators, inverters and power
converters, normally are tested using a variety of passive
loads (inductive, capacitive and resistive). These loads must
be verified within a wide range of conditions before reaching
the market, so as to attend official norms and specifications.
The loads’ power, used to test power equipment, is
directly linked to the physical size of their components,
usually being bulky, heavy and variable. They occupy an
appreciable physical space, and they are hard to transport and
regulate in magnitude and phase for most of the conventional
tests. Moreover, a series/parallel connection of resistances
and impedances are difficult to adjust, principally when
variable load is required.
Within this context, a controllable AC load with an easy
and precise adjustment, versatile and with reduced size
compared to traditional load banks is an effective tool for
equipment tests.
This paper aims at analyzing and developing an AC
electronically variable load, with the possibility of emulating
purely active and reactive loads and other impedances for
powers up to 7 kVA.
II. ELETRONIC AC LOAD
In general, AC electronic loads can have single-phase or
three-phase connections, depending on the equipment class
they will be used for. The conventional models of these loads
use rectifiers and inverters based on topologies of VSC
converter (Voltage Source Converter) [1], as illustrated in
Figure 1. The VSC topology is mostly justified due to the
possibility of emulating active and reactive powers.
Moreover, they allow a bidirectional current flow and they
can operate at different switching frequencies, thus enabling
control of harmonics. The VSC can be operated with
different modulation techniques, but the one mostly used is
the Sinusoidal Pulse Width Modulation (SPWM) [2].
S1 S2
S3 S4
S5
S6
Lf
C
Va1 ia
ib
ic
N
a
b
c
idc
}Vdc
Va2
Cf
La,b,c
LC Filter
Fig. 1. VSC converter.
For the purposes of this paper, the three-phase converter
operates as an inverter providing a synthesized purely
sinusoidal voltage Va2 lagged of Va1 by an angle of δ
according to the desired reactive or active power content,
which can be best visualized in the phase diagram of Figure
2. In this way, it is possible to control the power flow
through the voltage amplitude control and phase between
source and inverter voltages control.
The active power suffers more influence from the phase
difference between voltages, meanwhile the reactive power is
mostly affected by the amplitude difference between voltages
as expressed in (1) and (2).
 
X
V
V
P a
a 
sin
2
1 

 (1)
 
X
V
V
V
Q a
a
a 2
2
1 cos 



 (2)
978-1-4799-0272-9/13/$31.00 ©2013 IEEE 1082

2. L
Va1 δ Va2 0
I
δ
Va1
I
jXI
θ
δ - Load angle
θ – Power Factor
angle
Va2
(a)
(b)
Fig. 2. (a) Equivalent circuit diagram (b) Phasor diagram.
A. Instantaneous Power
Several references show the concepts used to define
instantaneous active and reactive power, either in steady or
transient states in such a way to express the generic current
and voltage waveforms. These definitions permit the control
of power flow between sources using the Clarke and Park
transforms [2, 3, 4].
B. PWM three-phase bidirectional inverter
The inverter used to emulate the three-phase electronic
load in this paper is a PWM three-phase three-wire
bidirectional inverter, operating with or without a neutral
point. Due to the converter model is not possible to control
independently the state variables [6], and the sum of the
output currents is null.
C. Control Techniques
The aim of the inverter control is to impose sinusoidal
currents with adjustable angles from -90º to +90º with
respect to the phase-neutral voltages. The angle between
current and voltage depends on the desired load power and it
must regulate the DC bus voltage.
Voltage Va2 should control the power flow through the
inverter in such a way as to avoid DC bus overvoltage when
active power is drained by the inverter, thus a buck converter
is used as auxiliary damping load to limit the DC link
voltage. Then when the DC bus voltage exceeds its designed
limit, the buck converter acts to limit such over voltage and
to control at a fixed value [5, 6, 7].
III. VSC CONVERTER MODEL
The equivalent circuit in Figure 3 was used to model the
three-phase balanced inverter using ideal switches. The
model was divided into two parts: the AC and the DC side of
the converter.
A. AC side converter model
The AC side model considers currents ia, ib and ic
according to its respective inputs voltages. The Park
transformer is applied to obtain the dq0 current and then their
respective duty cycles. For the AC model, the DC bus
voltage is considered a constant voltage source. Two transfer
functions, disregarding the dq axis coupling, are given in (3)
and (4).
S1 S2
S3 S4
S5
S6
La
Lb
Lc
C
Va
Vb
Vc
n
Rf ia
ib
ic
N
a
b
c
idc
}Vdc
Fig. 3. Three-phase PWM inverter equivalent circuit.
 
  f
f
dc
d
d
L
s
R
V
s
d
s
i




ˆ
ˆ
(3)
 
  f
f
dc
q
q
L
s
R
V
s
d
s
i




ˆ
ˆ
(4)
B. DC side converter model
From the DC side perspective of the modeled converter,
shown in Figure 3, the average current of the DC link is
obtained as:
           
t
d
t
i
t
d
t
i
t
d
t
i
i c
c
b
b
a
a
dc 




 (5)
Similarly, the dq0 transform is also applied to the DC side.
The transfer function of the DC bus voltage is given as a
function of id and iq currents. In order to linearize the model,
perturbations are included on the duty cycle.
After that, the transfer function of the DC bus voltage (Vdc)
is obtained as a function of id and iq currents expressed in (6)
and (7).
 
 


















2
3
3
2
2
1
ˆ
ˆ
dc
p
p
dc
f
f
d
dc
V
V
V
V
P
R
s
L
C
s
s
i
V (6)
 
 
















3
2
2
1
ˆ
ˆ
p
dc
f
f
q
dc
V
V
Q
R
s
L
C
s
s
i
V (7)
C. Buck converter model
A buck converter was connected to the VSC output to
ensure that the DC bus voltage do not exceed the reference
value when simulating active loads. Its transfer function is
given by (8).
 
b
b
dc
L
s
R
V
d
s
i



ˆ
ˆ
(8)
IV. DESIGN OF THE POWER STAGE
The electronic load emulator for lab tests was designed for
a maximum active power of 5 kW and maximum reactive
power of ± 5 kVAr. The total maximum power is 7 kVA.
The inverter maximum synthesized voltage occurs when the
emulated load is purely capacitive, i.e., when the active
power is zero and Q = 5 kVAr. From this condition it is
possible to calculate the maximum voltage Va2 in (2) and Vdc,
(9) [8].
dc
p
a V
M
V 


2
1
2
(9)
1083

3. Where:
Va2p - Maximum voltage of inverter.
M - Modulation index.
The project parameters are described on Table I and the
converter design data are on Table II.
TABLE I
Rated parameters
TABLE II
Converter desing data
V. CONTROL SYSTEM
The proposed control ensures the correct emulation of
both active and reactive power loads. The reference currents
id* and iq* are then calculated based on the selected power
level. By using such references, the inverter output currents
ia, ib and ic are sampled and submitted to a dq0 transformer
synchronized by a phase locked loop (PLL), in order to
obtain the instantaneous currents indicated in Figure 4.
The voltage across the DC bus capacitor is measured and
its value compared to the reference voltage. The resulting
signal drives the voltage controller, which output is the
reference correction that is added in the current loop control.
When the DC bus voltage exceeds the reference voltage, the
buck converter switch is triggered on.
The exceeding power is then dissipated in the buck
converter resistor to maintain the DC bus voltage at its
correct reference value. The direct and quadrature axis of the
current control is shown in Figure 5. The id current is
measured and compared to the reference given both by the
voltage control (Vref_id) and another one defined according to
the desired load power. The resulting error from this
comparison goes to a PI compensator and then through a dq0
inverse transform block. The output is compared to a 20 kHz
triangular carrier from which the PWM signal is generated.
The same process is used for iq current. The controller design
was developed with the support of MATLAB®
.
C
Lf
Va
Vb
Vc
Rf
Dq0
transform
VSC
Vdc
Lb
Rb
Vdc
*
Voltage
Controller
PWM
Modulation
iq
iq
*
id
id
*
Current
Controller
Dq0 inverse
transform
PLL
VaVbVc
ia
ib
ic
Voltage
Controller
Fig. 4. Proposed control system diagram.
Vdc
*
Vdc
PI
Limiter
Buck
Controller
PI
Vd Controller
id*
id
PI
id
Controller
PI
Vq Controller
iq
PI
iq
Controller
iq*
PWM
abc
PLL
dq0
PWM
Fig. 5. Block diagram of currents control in quadrature axis.
VI. SIMULATION RESULTS
Several simulations of load emulation were performed in
PSIM®
, at a variety of active and reactive power levels as
input. It was stipulated that the converter starts with a
reactive power of 2 kVAr (purely inductive load). After 0.5 s
it was demanded a 5 kW active power, and at 1 s the reactive
power was increased up to 5 kVAr. At 1.5 s the reactive
power was dropped to 0 VAr, emulating a purely active load.
In the sequence, at 2 s the active power was set to 0 W. At
2.5 s the reactive power was decreased to -5 kVAr (purely
capacitive load) as displayed in Figure 6. In this figure, the
topper graph refers to the active power (P), the second refers
to the reactive power (Q) and the third one, the DC bus
voltage.
More details are shown in the following figures. In Figure
7, it is shown the first simulation stage, with 2 kVAr. The
topper graph shows the simulated power and the one just
below represents the AC side voltage and current. The
current was multiplied by 5 in order of a better visualization.
It is observable that the load current is 90° lagged to the
phase voltage, characterizing a purely inductive load.
Parameter Value Description
P 7.071 kVa Power Converter
dc
V 350 V DC Bus Voltage
𝑉𝑎2 156 V Inverter Output Voltage
r
f 60 Hz Grid Frequency
s
f 20 kHz Switching Frequency
VPWM 5 V Triangular Wave Voltage (Peak)
Parameter Value Description
C 4700 μF DC Bus Capacitor
f
L 1.0 mH Coupling Inductor
b
L 4.5 mH Buck Inductor
b
R 10 Ω Buck Resistor
1084

4. P_ref P
Q_ref Q
Vdc
0
2k
4k
0
2k
4k
-4k
-2k
350.0
350.4
349.6
0 0.5 1 1.5 2 2.5 3 3.5
Tempo (s)
Fig. 6. Simulated results to different power values.
0.1 0.2 0.3 0.4 0.5
Tempo (s)
200
100
0
1k
2k
0
-100
-200
P
Q
Va
I(a)*5
Fig. 7. Simulation from 0 to 0.5 s.
Figure 8 results indicate an impedance subject to 5 kW
while the reactive power was maintained at 2 kVAr. Figure 9
shows the simulation results for 5 kW and 5kVAr,
respectively. In Figure 10 the reactive power is zero, which
can be observed by the equal current and voltage phases. At
2 s the active power is also zero, so the demanded current is
zero, saw in Figure 11.
0.5 0.6 0.7 0.8 0.9 1
Tempo (s)
P
100
3k
4k
0
-100
Q
Va
I(a)*5
200
-200
2k
5k
Fig. 8. Simulation from 0.5 to 1.0 s.
1 1.1 1.2 1.3 1.4 1.5
Tempo (s)
200
4.8k
P
100
4.6k
5.2k
5.4k
0
-100
-200
Q
Va I(a)*5
5.0k
Fig. 9. Simulation from 1.0 to 1.5 s.
1.5 1.6 1.7 1.8 1.9 2
Tempo (s)
P
100
2k
4k
0
-100
Q
Va I(a)*5
0
Fig. 10. Simulation from 1.5 to 2.0 s.
At 2.5 s, -5 kVar were added. However, with this
configuration is not possible to simulate a purely capacitive
load because the power flow comes from the DC bus to the
source. Since across the DC bus only one capacitor is
connected, it will be discharged causing a voltage drop and
instability in the system.
To avoid the voltage control from applying active power,
this capacitor is maintained charged and so it is possible to
simulate a capacitive load as shown in Figure 12 and Figure
13. As more reactive power is emulated, more active power
is needed to maintain the charge in the capacitor.
1.52 1.53 1.54 1.55 1.56 1.57 1.58
Time (s)
0
-100
-200
100
200
Va I(Aa)*5
0.52 0.53 0.54 0.55 0.56 0.57 0.58
Time (s)
0
-100
-200
100
200
Va I(Aa)*5
0.12 0.14 0.16 0.18
Time (s)
0
-100
-200
100
200
Va I(Aa)*5
I(a)*5
Va
Va
I(a)*5
1.02 1.04 1.06 1.08
Time (s)
0
-100
-200
100
200
Va I(Aa)*5
I(a)*5
Va
I(a)*5
Va
1085

5. 2 2.1 2.2 2.3 2.4 2.5
Tempo (s)
P
100
0
400
0
-100
Q
Va I(a)*5
-200
200
-200
200
-400
Fig. 11. Simulation from 2.0 to 2.5 s.
2.5 2.6 2.7 2.8 2.9 3
Tempo (s)
P
100
-2k
0
0
-100
Q
Va I(a)*5
200
-200
-4k
Fig. 12. Simulation from 2.5 to 3.0 s.
3 3.1 3.2 3.3 3.4 3.5
Tempo (s)
P
100
-1k
0
0
-100
Q
Va I(a)*5
200
-200
-2k
1k
Fig. 13. Simulation from 3.0 to 3.5 s.
VII. CONCLUSION
This paper presents a prototype of an electronic load
emulator for up to 7 kVA based on the theory of two sources
interconnected by an inductance. It is presented a discussion
about the VSC modelling and the control strategy used for a
three-phase bidirectional PWM inverter without neutral
connection, using Clarke and Park transforms and a buck
converter.
Several simulation were conducted using the PSIM®
software to refine the two-source inductance-interconnected
theory, the load model and its control. Some severe
conditions of active and reactive loads were used to obtain
significant results of load variation and facilities to allow the
user to select the desired load power reference. In all tests the
control managed to keep the DC bus voltage constant as
expected in theory.
An extreme case of load emulation was also tested for
purely capacitive loads since this type of impedance forces
the reactive power to flow from the inverter to the source. As
the inverter is not ideal there is energy loss in the conversion
from direct to alternate current.
Future developments following this work will include an
implementation of the proposed AC load controlled via a
digital signal processor, in order to validate the presented
simulations and different active and reactive load profiles.
ACKNOWLEDGMENT
The authors are grateful to CAPES and Post-Graduation
Program in Electrical Engineering - PPGEE of the Federal
University of Santa Maria for their financial support and to
CEESP-UFSM for allowing the use of all their laboratorial
facilities.
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2.02 2.04 2.06 2.08
Time (s)
0
-100
-200
100
200
Va I(Aa)*5
3.02 3.04 3.06 3.08
Time (s)
0
-100
-200
100
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Va I(Aa)*5
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Time (s)
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Va I(Aa)*5
Va I(a)*5
Va
I(a)*5
Va
I(a)*5
1086

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