KTN ran a collaborators' workshop on 26 September 2019 in London to explain more about the Digital Security by Design Challenge announced by the government.
The Digital Security by Design challenge has been recently announced by the Department for Business, Energy & Industrial Strategy (BEIS). This challenge, amounting to £70 million of government funding over 5 years, was delivered by UK Research and Innovation (UKRI) through the Industrial Strategy Challenge Fund (ISCF).
This Collaborators' Workshop provides an opportunity to hear more details of the challenge and forthcoming competitions.
A Scoping Workshop for this challenge was held on 30th May: http://ow.ly/oz6230pHlGl
Find out more about the Defence and Security Interest Group at https://ktn-uk.co.uk/interests/defence-security
Join the Defence and Security Interest Group at https://www.linkedin.com/groups/8584397 or Follow KTN_UK Defence group on Twitter https://twitter.com/KTNUK_Defence
2. Agenda
• Area of interest
• Current experience
• Imperas Background
• Involvement in Horizon2020 SafePower project
September 19(c) Imperas Software, Ltd.Page 2
3. Area of Interest
(related to this workshop)
• Electronic Products will all have new processing capabilities for Machine
Learning and Artificial Intelligence
• Their System-on-Chip Integrated Circuits will have many hardware acceleration blocks,
processors, and new configurations to execute these new ML/AI software stacks
• All this hardware will have different vulnerabilities and challenges due to security issues
and threats
September 19(c) Imperas Software, Ltd.Page 3
4. Area of Interest
(related to this workshop)
• Electronic Products will all have new processing capabilities for Machine
Learning and Artificial Intelligence
• Their System-on-Chip Integrated Circuits will have many hardware acceleration blocks,
processors, and new configurations to execute these new ML/AI software stacks
• All this hardware will have different vulnerabilities and challenges due to security issues
and threats
• Imperas is interested in working on the analysis of software running on these
new ML/AI fabrics
• Profile different fabrics/architectures running different software stacks
• Assess their robustness, reliability, and security
September 19(c) Imperas Software, Ltd.Page 4
5. Current (related) experience
• Several key customers building new ML/AI hardware designs use Imperas for
• Early fabric architecture exploration (try out new configurations, ISAs, accelerators…)
• Early software development (before silicon availability)
• Early software verification
• Two customers (cyber defence & security contractors) use Imperas tools are
virtual machines to inject them with virus/malware and explore how
vulnerabilities were exploited
• All based on use of Imperas virtual platform/virtual prototype
simulation/emulation products and software analysis tools
September 19(c) Imperas Software, Ltd.Page 5
6. Agenda
• Area of interest
• Current experience
• Imperas Background
• Involvement in Horizon2020 SafePower project
September 19(c) Imperas Software, Ltd.Page 6
7. Imperas Focus
• “nobody designs a chip without simulation”,
at Imperas we believe that:
“nobody should develop embedded software without simulation”
• Imperas develops simulators, analysis tools, debuggers, modelling technology, and
models to help embedded systems developers get their software running…
• and hardware developers get their designs correct
• 10+ years, self funded, profitable, UK based, team with much EDA (simulators,
verification), processors, and embedded experience
• www.imperas.com
• www.OVPworld.org
September 19(c) Imperas Software, Ltd.Page 7
9. Virtual Platforms Provide a Simulation Environment Such
That the Software Does Not Know That It Is Not Running
On Hardware
• The virtual platform is a set of instruction accurate models that reflect the hardware on which the software
will execute
• Could be 1 SoC, multiple SoCs, board, system; no physical limitations
• Run the executables compiled for the target hardware
• Models are typically written in C/C++
• Models for individual components – interrupt controller, UART, ethernet, … – are connected just like in the
hardware
• Peripheral components can be connected to the real world by using the host workstation resources:
keyboard, mouse, screen, ethernet, USB, …
September 19(c) Imperas Software, Ltd.Page 9
CPU
UART
USB
Memory
(RAM)
IDE VGAethernet
Extendable Platform Kit
(Linux)
10. Open Virtual Platforms (OVP) Library of High-Performance
Processor Models
• Over 200+ Fast Processor Models in OVP Library
• ARM: Models for ARMv4™, v5™, v6™, v7™ and v8™ architectures
• Including MMU, MPU, TCM, Thumb™, Thumb-2™, Jazelle™, SIMD, VFPv3, NEON™, TrustZone, hardware
virtualization instructions, …
• MIPS: Models for microMIPS, MIPS32 and MIPS64 architectures
• Verification, licensing, and distribution relationship
• Including MMU, MPU, DSP, FPU, MT, MSA, VZ architecture subsets
• Synopsys (ARC): ARC6xx, ARC7xx, EM families
• RISC-V (Andes, SiFive, Microsemi, lowRISC(pulp)) + all 26 standard 32/64bit variants + vectors/bitmanip
• Renesas: Models for RH850, V850 architectures; 16 bit microcontroller cores
• RH850G3, V850 ES, E1, E1F, E2; RL78, M16C cores
• PowerPC
• Altera Nios II
• Xilinx Microblaze
September 19(c) Imperas Software, Ltd.Page 10
“OVP is addressing key issues in software
development for embedded systems. By
supporting the creation of virtual platforms, OVP
is enabling early software development and
helping expand the ARM user community.”
Noel Hurley, VP Business Development, ARM
13. Imperas in Horizon 2020 project
• Development of cross-domain reference architecture for low-power mixed-criticality
systems comprised of networked multi-core chips considering relevant safety standards
• Imperas role
• Build the virtual platforms of the reference devices
• Build selected tools
• Power and timing analysis
• Security and safety analysis
• Provide platforms and tools to project collaborators
• Make platforms and tools commercially available
• Publicize participation in project and commercial results of project
• Successfully completed 3 year program in early 2019
September 19(c) Imperas Software, Ltd.Page 13
14. Area of Interest (recap)
(related to this workshop)
• Electronic Products will all have new processing capabilities for Machine
Learning and Artificial Intelligence
• Their System-on-Chip Integrated Circuits will have many hardware acceleration blocks,
processors, and new configurations to execute these new ML/AI software stacks
• All this hardware will have different vulnerabilities and challenges due to security issues
and threats
• Imperas is interested in working on the analysis of software running on these
new ML/AI fabrics
• Profile different fabrics/architectures running different software stacks
• Assess their robustness, reliability, and security
September 19(c) Imperas Software, Ltd.Page 14