1. NICHOLAS KING, JR.
16 Village Circle
Palm Coast, FL 32164
(386) 986-5853 (cell phone)
Email: nkingjr@cfl.rr.com
CURRENT STATUS: RETIRED, IN SEARCH OF EMPLOYMENT
PRIOR JOB TITLE (31 YRS): DEVELOPMENT ADVISORY ELECTRICAL ENGINEER/SCIENTIST,
PROCESS FUNCTIONAL ANALYSIS, IBM, CORPORATION
FUNCTION: FUNCTIONAL SEMICONDUCTOR TEST ENGINEER, KERF STRUCTURE DEVELOPMENT
IBM, CORPORATION
Department 206A, PROCESS FUNCTIONAL ANALYSIS
Building 321, 42J
Hopewell Junction, NY, 12533
EXPERIENCE:
1979, Hired by IBM, Corporate Component Procurement VLSI Quality Engineering
Moved to Warmer Climate, Palm Coast, FL, 09/01/2010
PRIOR TECHNICAL JOB RESPONSIBILITIES:
300mm Process Functional Test/Characterization, Device Test Programs and Analysis
Characterization/production test program development on 9SF, 9SFLP, 10SF,10SLP,11SF 12S,
13S Kerf Macros, including EFUSE, LSMs, EDRAMs, LOGIC, and ASICS down to 22nm functional
test structures. Design, build, and implementation of the test sector hardware,
software, and robotics.
Integration and Implementation of Customer semiconductor designs into the 300mm
Production Line, Inline Test Sector. Process Flow Improvement and Optimization.
Current test platforms used are Verigy/Agilent 93000, Mosaid 4205, and using Tel P12
Probers.
CAREER INTERESTS: MANUFACTURING
QUALITY/RELIABILITY ENGINEERING
FAILURE ANALYSIS, SEMICONDUCTOR FABRICATION/PACKAGING
CIRCUIT DESIGN, TEST/EVALUATION ENGINEERING
ELECTRONIC COMPONENT ANALYSIS/RELIABILITY/APPLICATIONS
WAFER FUNCTIONAL TEST/ANALYSIS, YIELD IMPROVEMENT
DEVELOPED TECHNICAL SKILLS:
- SRAM, DRAM, EDRAM, MRAM, EFUSE, LOGIC, ASIC, SCAN CHAIN AND MEMORY TEST
ENGINEERING SKILLS
o Memory Test Program Development, Module, SIMM, DIMM, and Wafer Level
o Auditing of Japanese, Korean, and US Memory Supplier's test programs
from Wafer Probe, to Final Test, To QA
o Implementing Application Memory Stimuli into internal, and supplier test
programs from Wafer Probe, to Final Test
o Resolution and Implementation of Solutions to Customer Application Test
Problems and Field Problems
o Correlation and Screen Development
o Develop and Implement Test Coverage Improvement
o Analyze Memory Supplier's Process Flows, to eliminate and prevent
test escapes
o Device Qualification, Characterization, Application
o Physical Failure Analysis/Construction Analysis Review/Interface
o Soft Error Rate Analysis, Radiation Analysis
o Test Engineering to Failure Analysis to Process Line corrective
action feedback loop closure
o Test Engineering on DRAM Memory Kerf Test sites (ADMs)
8f2, 6f2, cell technologies, stacked capacitor cells, and vertical
cells
o Signature Analysis of dram/sram/edram cell failure mechanisms
o Test Engineering on Embedded DRAM, and Kerf Test Sites

2. -300mm WAFER FUNCTIONAL PRODUCTION TEST SECTOR ENGINEER
o The initial 300mm functional test Sector Engineer
o Designed and setup the initial functional test sector using the
Mosaid Test Platform, and Agilent 93K Test Platform.
o Included the development of test programs, characterization, and
flow of characterization data, data analysis, and integration into
the production line.
-TEST PLATFORM SKILLS
o Teradyne J387, J387A, J389, J937, J997
o Pacific Western Colt Tester
o Fairchild Sentry VII, VIII
o Megatest
o Mosaid 4205 Memory Tester
o Verigy/Agilent 83000, 93000 Testers
o Familiar with Automatic Device Handlers, Wafer Probers(Tel P12)
-RELIABILITY ENGINEERING SKILLS
o Mathematical Reliability Analysis on Memory Supplier/IBM
Accelerated Stress Test Cells (Burn In, Chip, Package)
o Develop new Accelerated Tests, Methods, and processes
o Develop new Sampling Plans, Analyze Supplier Sampling Plans
o Knowledge and Application of Military, Industry Standard Tests
o Review Supplier's Continuous, Process Improvement Plans
-ELECTROSTATIC DISCHARGE SKILLS
o IPT/CCP Quality Engineering, ESD Representative
o Familiar with Test Methods, and ANTI-ESD Environment Design
-QUALITY ENGINEERING SKILLS
o Quality Engineering Interface with Memory, Crystal/Oscillator
suppliers/customers
o Develop, Monitor, Track Processes for Data Interchange,
Supplier Process Improvement, Supplier Quality Plans
o Technical Resolution of Device Quality, Application Problems,
Field Problems and feedback to the supplier's process
o Specification Development
o Data Base Design
o Manufacturing Line Audit Skills, and Corrective Actions
-PROGRAMMING LANGUAGES SKILLS
o BASIC, PASCAL, APL, C, C+, C++, Microcode, HTML
-OPERATING SYSTEMS
o VM/CMS, DOS, OS2, OS2 WARP, WINDOWS, UNIX, AIX, Linux, Lotus
Notes, All Microsoft Products(Word, PowerPoint, Exel, etc)
-CIRCUIT DESIGN SKILLS
o Analog, Digital, Microprocessor, DA/AD, RF, PCSPICE
-PRODUCT ENGINEERING SKILLS
o Responsibility for Crystals, Oscillators, Resonators, Frequency
Control Devices
o Responsibility for DRAM, SRAM and NV Devices
o Qualification Plan Development
o Supplier/Customer Product Engineering Interface, for design,
application, SPQL, Reliability, Process Improvement, Cost Reduction
o Specification Development
-PACKAGE DESIGN SKILLS
o Responsible for the design of SCM, MCM ceramic packages
o Design systems used: IGSII, Cadence Allegro, CAD
o Software development for design efficiency and checking
-BENCH TEST EQUIPMENT SKILLS
o Familiar with all types of bench test equipment such as
Oscilloscopes, Logic Analyzers, Voltmeters, Ammeters, Ohmmeters
Multi-meters

3. Personal and Work References:
Florence Fasciani
Email: birdlovr1@yahoo.com
Telephone: 1-386-585-4486
Location: USA
23 Farnum Lane
Palm Coast, FL 32137
Stephen Wu
Email: stevewu@us.ibm.com
Telephone: 1-845-892-3201
Location: USA
IBM, Corporation
1580 Route 52
Hopewell Junction, NY 12533
John Cassels
Email: cassej@us.ibm.com
Telephone: 1-845-892-2342
Location: USA
IBM, Corporation
1580 Route 52
Hopewell Junction, NY 12533
Arthur R. Gasasira
Email: gasasira@us.ibm.com
Telephone: 1-845-892-9105
Location: USA
IBM, Corporation
1580 Route 52
Hopewell Junction, NY 12533