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1
Driving HB-LEDs in High-Power
Industrial Lighting Fixtures
Steve Mappus
2
Agenda
• High-brightness LED characteristics
• LED system requirements
• LED driver topologies
- Single-stage vs. two-stage
• LED load control
- Parallel LED strings
• 100 W industrial LED design example
- Power stage calculations
- Test results
• Summary
3
High-Power Industrial LED Fixtures
TypicalApplications
LEDAdvantages
Highway Light
Parking Lot
Streetlight
Tunnel Lighting
High & Low Bay
Airports
Bridges
Manufacturing
Efficiency
Reliability
Maintenance
Instant-on
Dimming
Light Quality
UV-Free
Mercury Free
Typical Power, 50 W<PLED<200 W
Before
After
4
HB-LED Characteristics
VF, Forward Voltage (V)
IF,ForwardCurrent(mA)
0 0.5 1.5 2 2.5 3 3.5 4 4.5
100
200
300
400
500
600
700
800
900
0
200mA (50%)
100 °C
25 °C
200mV
(6%)
• PN junction devices
- Negative temperature coefficient
- T↑, VF↓, IF↑, T↑
- Not easily paralleled
• Steep IF vs. VF curve
• Small ΔVF→Large ΔIF
- LED color shift
- Thermal imbalance
- Decreased reliability
• VF varies with temperature
• VF can vary by 20%~30%
• Operate best from a Constant
Current (CC), Constant
Voltage (CV) power source
(Typical I-V curve for 1 A, HB-LED)
5
CC-CV Characteristic Curve
(Typical CC-CV Curve for 75 W LED Driver)
• Constant Current = 1.5 A
• Constant Voltage = 50 V
• Overvoltage Protection = 60 V
• CC-CV LED Driver Provides:
- Signal Conditioning (PFC)
- Power Conversion
- Load Control
(75 W CC-CV LED Driver)
CC-CV
LED
DRIVER
OUT
GND
VLED=50V
500
mA
VF
VF
VF
VF
VF
VF
VF
VF
VF
VF
VF
VF
500
mA
ILED=1.5A
500
mA
ILED, LED Current (A)
VLED,LEDVoltage(V)
0 0.25 0.5 0.75 1 1.25 1.5 1.75 2
20
30
40
50
60
70
0
10
Current
Foldback
OVP
6
HB-LED System Requirements
AC-DC DC-DC
CC-CV
LOAD
CONTROL
AC
ANALOG
DIM
PWM
DIM
LED DRIVER
PFC
EMI
BIAS
(OPTIONAL)
• Input voltage range of
85 VRMS<VAC<308 VRMS possible
• 50 W<POUT<200 W
• ILED<2 A per string
• PFC required
• THD: EN61000-3-2, Class C
(Lighting equipment >25 W)
• LED driver
- Single-stage or two-stage (shown)
- DC-DC
- CC-CV load control
- Dimming requirements
- Safety and electrical protection
requirements
• Various LED driver topology choices
(Typical Industrial LED System Block Diagram)
7
Single-Stage: CC-CV PFC Flyback
Advantages
• Best for simple, low-cost fixtures
where POUT<75 W
• Can handle wide VIN range
• Simple “familiar” design
Disadvantages
• High MOSFET VDS stress
• High output voltage ripple
• RCD clamp losses
• Difficult to meet: high PF, low
THD, high efficiency, high VIN
with single-stage









N
N
VVV
S
P
OUTINDS
• Typical VDS for 308 VRMS:
  VVVVDS 6754602308 
800 V-900 V MOSFET Required
AC-DC
AC
EMI
PFC
FL7930B/C
CC
CVFB
30VDC<VLED<60VDC
8
Two-Stage: PFC and CC-CV LLC
Advantages
• Best for any power level
50 W<POUT<1 kW
• Highest overall efficiency
• VDS = VIN
Disadvantages
• Complex power stage design
• Precise gate drive timing is critical
• Less efficient at low-line for 460 V
PFC output
• Can’t use LLC when operating PFC
in “boost-follower” mode
(NOTE: VBULK = 460 V to boost from 308 VRMS)AC-DC
AC
EMI
PFC
FL7930B/C
FAN7621S
or
FLS Series
CC
CVFB
VBULK=460VDC
30VDC<VLED<60VDC
9
Two-Stage: PFC and Two-Switch Flyback
Advantages
• Best for 50 W<POUT<150 W
• High overall efficiency
• Quasi-resonant (QR) flyback offers
valley switching
• Can handle wide VIN range
• Good choice for boost follower PFC
• Gate drive timing less critical
• Simple “familiar” design
• VDS = VIN
Disadvantages
• High-side gate drive required
• Less efficient compared to
PFC+LLC at high input
(NOTE: VBULK varies (Boost-Follower) according to VAC)
FLYBACK
FAN6300
HVIC
FAN7382
CC
CVFB
250VDC<VBULK<460VDC
30VDC<VLED<60VDC
AC-DC
AC
EMI
PFC
FL7930B/C
10
LED Load Control
Single Series String Control
VCS
VBUS
IF
VF
VF
VF
VF
CC LED
DRIVER
OUT
FB
GND
Advantages
• Can drive 100s of series LEDs
• IF is same for every LED
- No current sharing necessary
• Easy to control in CC or CV
Disadvantages
• HIGH STRING VOLTAGE
• Efficiency impact due to high voltage
power stage components
• LED shunts needed to account for
open LED failure
• UL 1310 safety→VBUS<60 V
The greater the number of required LEDs, the more thought should be given to a series-parallel configuration
11
LED Load Control
Linear Regulator Control
VOLTAGE
PRE-REG
OUT
FB
GND
VBUSIF1
VF
VF
VF
VF
VF
VF
VF
VF
VF
VF
VF
VF
IF2 IFN
ILED
CC
REG
CC
REG
CC
REG
Disadvantages
• VBUS> ∑VF +VREG
• Additional VBUS margin voltage is
dropped across linear regulator
• Increase in regulator
voltage→increase power
dissipation→lower efficiency
• Max current and power dissipation
limit the use of linear regulators for
high-power industrial LED lighting
• Matched VF (Binning) can increase
efficiency but increase LED cost
Advantages
• Driver operates in CV
• Each string independently regulated
• Single string can fail while remaining
strings regulate in CC
• Low EMI
12
LED Load Control
Switching Buck Regulator Control
VOLTAGE
PRE-REG
OUT
FB
GND
VBUS
IF1
VF
VF
VF
VF
ILED
SW
CS
VIN
GND
RCS1
CC BUCK
IF2
VF
VF
VF
VF
SW
CS
VIN
GND
RCS2
CC BUCK
IFN
VF
VF
VF
VF
SW
CS
VIN
GND
RCSN
CC BUCK
Advantages
• Driver operates in CV
• Each string independently regulated
• Single string can fail while remaining
strings regulate in CC
• Typical 20%-30% efficiency
improvement over linear regulators
Disadvantages
• High component count
• Must operate at high frequency to
minimize inductor size
- EMI impact
• Current sharing accuracy
tolerances→5% considered good
13
LED Load Control
FAN7346, 4-Channel LED Controller
FAN7346
CURRENT
BALANCE
OVR
FB1
GND VCS1
VBUS
IF1
VF
VF
VF
VF
VF
VF
VF
VF
VF
VF
VF
VF
IF2 IFN
ILED
VCS2 VCSN
FB2
FBN
CC-CV
LED
DRIVER
OUT
GND
FB FB OUT1
OUT2
OUTN
CH1
CH2
CHN
ADIM
PWMN
FO
Q1
Q2
QN
Advantages
• Driver operates in CC-CV
• VLED minimized→higher efficiency
• Each string independently
regulated
• Single string can fail while
remaining strings regulate in CC
• Low EMI
• Analog and PWM dimming
• Used with any LED driver topology
• Master/slave configurable for
additional LED channels
• Secondary (shown) or primary
(opto) side control
• Fault output (FO)
• ±1.5% current sharing accuracy
14
100 W, LED Design Specification
Two-Stage, BCM PFC and Two-Switch Flyback
Parameter Min. Typ. Max.
BCM PFC Stage
VAC 85VRMS 308VRMS
fVIN(AC_ 50Hz 60Hz 65Hz
VOUT_PFC
Fixed Regulation
440V 450V 465V
VOUT_PFC
Boost Follower
245V VIN(PK)+30V 465V
POUT_PFC 120W
tSOFT_START 50ms
tON_OVERSHOOT 10V
η_PFC 0.9 0.95
Two-Switch Flyback DC-DC LED Stage
VIN 250V 460V
VOUT_LED 30V 60V
IOUT_LED
Single Channel
2A
IOUT_LED
4-Channel (Per Channel)
350mA
POUT_LED 100W
fSW_LED 50kHz 150kHz
η_LED 0.9 0.95
Total System
η_120V 0.90
η_230V 0.90
PF_120V 0.95 0.99
PF_230V 0.95
Mechanical and Thermal
Height 30mm
TJ 60⁰C
Primary Design Goals
1. Wide input 85 VRMS<VAC<308 VRMS
2. Maximize wide range efficiency
3. Configurable for single-channel or
4-channel LED operation
4. Compatible with 0 V-10 V analog
dimming and 0%-100% PWM
dimming
5. Lowest possible design profile
Intended Applications
1. Streetlight, parking lot & highway
lighting
2. Industrial high-bay & low-bay
lighting
15
BCM, PFC Design
FL7930C
1
2
3
4 5
6
7
8
OUT
VCC
GND
ZCDCS
COMP
RDY
INV PBIAS
ZCD
ZCD
AC
EMI
FILTER
RDY
(TO FLYBACK)
BF
ON
OFF
VOUT
(TO FLYBACK)
1
2
3
R5
R6
C4
C5
R7
R8
R9
R10 R11
D6
D7 Q3
Q4
Q5
L1
D8
C6
C7
NB
NAUX
VIN
RZCD
RCS
J1
0V
VDS
tREStOFF tON
TS
0V
VAUX
0V
VZCD
0.65V
0A
IL
0V
VGS
VIN
VOUT
2x(VIN – VOUT)
1.4V
t
ZCD Delay
(150ns)
NAUX
NB
x (VOUT – VIN)
NAUX
NB
x VIN
1.5V
IL(PK)
• Constant on-time, variable frequency
• Switching period, TS = tOFF + tRES + tON
• Inductor current switches from 0A (ZCS)
• VDS
- ZVS→VOUT<2×VIN
- Valley switch→otherwise
• Boost follower modes set by J1
16
BCM, PFC Design
Boost Follower Operation
Time (ms)
Voltage(V)
0 20 40 60 80 100 120 140 160
50
100
150
200
250
300
350
400
450
0
500
180 200
VOUT=465V
250V<VOUT<475V
85VRMS<VAC<308VRMS
• Rectified AC shown for
85 VRMS<VAC<308 VRMS
• J1 boost follower setting:
- ON: 250 V<VOUT<460 V
- OFF: VOUT = 465 V
- OPEN: VOUT = 250 V
• Flyback DC-DC handles
~2:1 input range instead
of ~4:1
17
BCM, PFC Design
Boost Follower Design Procedure
1. Set VOUT divider:
𝑅5 =
𝑉𝑅𝐸𝐹
𝐼2
=
2.5𝑉
150𝜇𝐴
= 16.7𝑘Ω
𝑅4 =
𝑅5 × 𝑉𝑂1 − 𝑉𝑅𝐸𝐹
𝑉𝑅𝐸𝐹
=
16.7𝑘Ω × 250𝑉 − 2.5𝑉
2.5𝑉
= 1.65𝑀Ω
2. Boost follower ON for VAC >150 VRMS:
𝐼1 = 0𝐴, 𝑓𝑜𝑟 𝑉𝐴𝐶 < 150𝑉𝑅𝑀𝑆
3. Set Vb≈2 V when VAC =308 VRMS:
𝑉𝑐𝑡𝑟𝑙 = 𝑉𝑏 − 𝑉𝑏𝑒 = 2𝑉 − 0.7𝑉 = 1.3𝑉
5. Set VAC divider:
R1
R2
Vf
Vbe
R3
R4
R5
1
3
COMP
INV
VREF
(2.5V)
FL7930C
85VRMS<VAC<308VRMS
VO1=250VDC
VO2=475VDC
Vctrl
Vb
I1 I2
R6 C1
I3
I4
4. Set I4≈1 mA@√2 × 308 VRMS, solve R2:
𝑅2 =
𝑉𝑏 + 𝑉𝑓
𝐼4
=
2𝑉 + 0.5𝑉
1𝑚𝐴
= 2.5𝑘Ω
𝑅1 =
𝑅2 × 2 × 𝑉𝐴𝐶(𝑀𝐴𝑋) − 𝑉𝑏 + 𝑉𝑓
𝑉𝑏 + 𝑉𝑓
=
2.5𝑘Ω × 2 × 308𝑉𝑅𝑀𝑆 − 2𝑉 + 0.5𝑉
2𝑉 + 0.5𝑉
= 433𝑘Ω
𝐼1 = 𝐼2 ×
𝑉𝑂2
𝑉𝑂1
− 1 = 150µA ×
475V
250V
− 1 = 135μA, 𝑓𝑜𝑟 𝑉𝐴𝐶 = 308𝑉𝑅𝑀𝑆
𝑅3 =
𝑉𝑐𝑡𝑟𝑙
𝐼1
=
1.3𝑉
135𝜇𝐴
= 9.53𝑘Ω
18
BCM, PFC Design
Boost Follower Design Procedure (Cont.)
6. Verify Vctrl over 85 VRMS<VAC<308 VRMS:
R1
R2
Vf
Vbe
R3
R4
R5
1
3
COMP
INV
VREF
(2.5V)
FL7930C
85VRMS<VAC<308VRMS
VO1=250VDC
VO2=475VDC
Vctrl
Vb
I1 I2
R6 C1
I3
I4
𝑉𝑐𝑡𝑟𝑙 𝑉𝐴𝐶 =
𝑅2
𝑅1 + 𝑅2
× 2 × 𝑉𝐴𝐶 − 𝑉𝑓 + 𝑉𝑏𝑒
VAC
(VRMS)
Vctrl
(mV)
I1
(µA)
I2
(µA)
85 0 0 150
150 19 2 150
160 95 10 150
308 1287 135 150
19
𝐼𝐿(𝑃𝐾) =
4 × 𝑃𝑂𝑈𝑇
𝜂 × 2 × 𝑉𝐴𝐶(𝑀𝐼𝑁)
=
4 × 144𝑊
0.95 × 2 × 85𝑉𝑅𝑀𝑆
= 5𝐴 𝑃𝐾
𝐿 =
𝜂 × 2 × 𝑉𝐴𝐶(𝑀𝐼𝑁)
2
4 × 𝐹 𝑀𝐼𝑁 × 𝑃𝑂𝑈𝑇 × 1 +
2 × 𝑉𝐴𝐶(𝑀𝐼𝑁)
𝑉𝑂𝑈𝑇 − 2 × 𝑉𝐴𝐶(𝑀𝐼𝑁)
=
0.9 × 2 × 160𝑉𝑅𝑀𝑆
2
4 × 45𝑘𝐻𝑧 × 144𝑊 × 1 +
2 × 160𝑉𝑅𝑀𝑆
250𝑉 − 2 × 160𝑉𝑅𝑀𝑆
= 168𝜇𝐻 ≅ 170𝜇𝐻
1. Peak inductor current:
2. Inductor value (POUT Max +20% Margin = 144 W):
3. Maximum on-time:
𝑡 𝑂𝑁(𝑀𝐴𝑋) = 𝐿 ×
𝐼𝐿(𝑃𝐾)
2 × 𝑉𝐴𝐶(𝑀𝐼𝑁)
= 170𝜇𝐻 ×
5𝐴 𝑃𝐾
2 × 85𝑉𝑅𝑀𝑆
= 7𝜇𝑠 < 35𝜇𝑠 (𝐹𝐿7930 𝑡 𝑂𝑁 𝑀𝐴𝑋 )
(6)
(1)
NB=41 NA=3
(10)
(9)
Core: EFD30, Wurth Custom PN 750313579
Winding
Pins
(S→F)
Wire Layers Turns
Boost 6→1
40/38,
Served
Litz
2 41
AUX 9→10
2/38,
Bifilar
1 3
BCM, PFC Design
Power Stage, Inductor Calculation
20
4. Output capacitor:
≥
144𝑊
250𝑉 × 2 × π × 50𝐻𝑧 × (0.05 × 250𝑉)
= 150𝜇𝐹
• Holdup not typically required for LED
• COUT calculated based upon maximum allowable output
ripple voltage, ΔVOUT = 5%×VOUT(MIN)
• VOUT(MAX)= 460 V→need COUT rated for 500 V
• To maintain low-profile:
- COUT = 2 x 330 µF, 250 V aluminum radial leaded capacitors in series
BCM, PFC Design
Power Stage, Capacitor Calculation
𝐶 𝑂𝑈𝑇 ≥
𝑃𝑂𝑈𝑇
𝑉𝑂𝑈𝑇(𝑀𝐼𝑁) × 2𝜋 × 𝐹𝐿(𝑀𝐼𝑁) × ΔV 𝑂𝑈𝑇
21
Two-Switch Flyback Design
CC
CVFB
FAN6300H
1
2
3
4 5
6
7
8
NC
HV
VDD
GATEGND
CS
FB
DET
FAN7382
1
2
3
4 5
6
7
8
HO
VB
VS
LOCOM
LIN
HIN
VCCPBIAS
VIN
R1
R2
R3
Q1
Q2
D1
D2
D3
D4D5
ACIN
R4
C1
VA
VLED
VHS
C2
C3
(FROM PFC)
(FROM PFC)
RDY
PBIAS
22
0V
VDS
0A
IDS
tftOFF tON
TS
0A
ID
VAVA
0V
0V
VDET
0V
VIN
PBIAS
VIN+VHS
VGS(HS)
VGS(LS)
0.7V
5µs
2.5V
VO
OVP
IDET(SOURCE)>30µA
tDELAY=200ns
VRO
2
VRO
2
VIN
2
VIN
2
• Quasi-resonant, variable
frequency
• HS and LS MOSFETs switch
synchronously
• Switching period, TS = tOFF + tf + tON
• Inductor current switches from 0 A
(ZCS) every switching cycle
• VDS
- Valley switching
- Extended valley switching
• Gate turn-on
- IDET>30 µA→delay 200 ns→turn-on
• VDET>2.5 V→OVP (latching)
Two-Switch Flyback Design
Key Switching Waveforms
23
FAN7382
1
2
3
4 5
6
7
8
HO
VB
VS
LOCOM
LIN
HIN
VCCPBIAS
VIN
R1
R2
R3
Q1
Q2
D1
D2
D4D5
VA
VHS
C2
C3
DETPWM
(FROM PFC)
0V
0V
0V
PBIAS
VHS
UVLO
VGS(HS)
VGS(LS)
• FAN7382 HVIC
• HIN and LIN shorted
• Q1 and Q2 MOSFETs
switch synchronously…but
• During start-up
- HO not switching
- LO switching charges C2
only when HO not switching
• During steady-state
- C2 charged from VHS
Two-Switch Flyback Design
Gate Drive Operation
24
1. Transformer turns ratio:
2. Primary magnetizing inductance:
3. Primary current:
𝑛 =
𝑉𝐼𝑁 𝑀𝐼𝑁 × 𝐷 𝑀𝐴𝑋
1 − 𝐹 𝑀𝐼𝑁 × 𝑡𝑓 − 𝐷 𝑀𝐴𝑋
×
1
𝑉𝑂 + 𝑉𝑓
=
250𝑉 × 0.45
1 − 50𝑘𝐻𝑧 × 600𝑛𝑠 − 0.45
×
1
60𝑉 + 2𝑉
= 3.48
𝐿 𝑀 =
𝑉𝐼𝑁(𝑀𝐼𝑁) × 𝐷 𝑀𝐴𝑋
2
2 ×
𝑃𝑂
𝑛
× 𝐹 𝑀𝐼𝑁
=
250𝑉 × 0.45 2
2 ×
100𝑊
0.9
× 50𝑘𝐻𝑧
= 1.14𝑚𝐻 ≈ 1𝑚𝐻
𝐼 𝐷𝑆(𝑃𝐾) =
𝑉𝐼𝑁(𝑀𝐼𝑁) × 𝐷 𝑀𝐴𝑋
𝐿 𝑀 × 𝐹 𝑀𝐼𝑁
=
250𝑉 × 0.45
1.14𝑚𝐻 × 50𝑘𝐻𝑧
= 2𝐴 𝑃𝐾
𝐼 𝐷𝑆(𝑅𝑀𝑆) =
𝐷 𝑀𝐴𝑋
3
× 𝐼 𝐷𝑆(𝑃𝐾) =
0.45
3
× 2𝐴 𝑝𝑘 = 775𝑚𝐴 𝑅𝑀𝑆
𝑡𝑓 = 𝜋 × 𝐿 𝑀 ×
𝐶 𝑂𝑆𝑆
2
tf:
• Estimate tf to start
• Calculate tf after power
stage design complete
Two-Switch Flyback Design
Transformer Calculations
25
4. Area-product core size estimate:
5. Choose EER28L, calculate primary turns:
6. Secondary turns:
𝐴 𝑒 × 𝐴 𝑤 =
𝑃𝑂 × 108
× 𝐹𝐾
2 × 𝐹 𝑀𝐼𝑁 × 𝐵 𝑃𝐾 × 𝑊𝐹 × 𝐶𝐷 × 𝑈𝐹
=
100𝑊 × 108
× 1
2 × 50𝑘𝐻𝑧 × 3000𝐺 × 0.25 × 350 × 1
= 0.38𝑐𝑚2
𝑐𝑚2
Where:
FK = Cooling Factor (1=no cooling, 0.3=100 CFM)
BPK = AC Flux Density (Gauss)
WF = Window Factor (<1, practical<0.5)
CD = Current Density (250<CD<550, CM/A)
UF = Magnetization (1=single-end, 2=double-end)
Low-profile ferrite core choices
𝑁𝑃 =
𝐿 𝑀 × 𝐼 𝐷𝑆(𝑃𝐾) × 108
𝐵 𝑃𝐾 × 𝐴 𝑒
=
1𝑚𝐻 × 2𝐴 𝑃𝐾 × 108
3000𝐺 × 0.81𝑐𝑚2
= 82𝑇
𝑁𝐿𝐸𝐷 =
𝑁𝑃
𝑛
=
82𝑇
3.7
= 22𝑇
𝑁𝐴 = 𝑁𝐿𝐸𝐷 ×
𝑉𝐷𝐸𝑇
𝑉𝑂 + 𝑉𝑓
= 22𝑇 ×
12𝑉
60𝑉 + 2𝑉
= 4𝑇
𝑁 𝐻𝑆 = 𝑁𝐿𝐸𝐷 ×
𝑉𝐻𝑆
𝑉𝑂 + 𝑉𝑓
= 22𝑇 ×
8𝑉
60𝑉 + 2𝑉
= 3𝑇
→Regulated secondary
(TDK High Flux Ferrite Materials)
Two-Switch Flyback Design
Transformer Calculations (Cont.)
Core Ae Aw AwAe Height
EFD30 0.69 cm2 0.63 cm2 0.44 cm2cm2 14 mm
EER28L 0.81 cm2 0.97 cm2 079 cm2cm2 25 mm
26
7. EER28L transformer winding structure:
1
NP(2-3)=38T
NLED=22T
4
3
11,12
9,10
NHS(1-2)=3T
2
5
6
NP(3-4)=44T
NDET(6-5)=4T
Winding
Pins
(S→F)
Wire Layers Turns
½ Primary 2→3
15/38,
Served
Litz
1 38
Secondary
(LED)
9→11
30/38,
Served
Litz
1 22
Secondary
(LED)
10→12
30/38,
Served
Litz
1 22
½ Primary 3→4
15/38,
Served
Litz
1+ 44
Secondary
(DET)
6→5
2/38,
Bifilar
1 4
Secondary
(HS)
2→1
2/38,
Bifilar
1 3
EER28L ferrite core
Two-Switch Flyback Design
Transformer Winding Structure
27
• Can be used with any power
topology
• Constant current, U1a
- Set V-, initially to ~200 mV
- ILED through R12 will reach -200 mV
- U1a output goes high→regulates ILED
- ILED regulates CC as long as VLED<50 V
• Constant voltage, U1b
- Set R16, R17 divider to 2.5 V when
VLED = 50 V
- For VLED≥50 V, U1b output goes
high→regulates CV
LED Load Control Design
CC-CV Single-String Control
VL
SBIAS
2.5VREF
FB
R12
R13
R14
R15
R16
R17
R18
R19
R20R21
R22
D8
D9
30V<VLED<50V
C8
C9
ILED=2A
U1a
U1b
FAN4274
FAN4274
FOD817A
U2
VAO
28
FAN7346
1
2
3
4 25
26
27
28GND
VMIN
CMP
FB
OVR
21
22
23
24
17
18
19
20
15
16
8
7
6
5
12
11
10
9
14
13
PWM2
PWM3
PWM4
FO
SLPR
ADIM
ENA
PWM1
VCC
REF
FB1
OUT1
CH1
CH3
FB2
OUT2
CH2
OUT4
CH4
FB3
OUT3
FB4
VDD
VL
SBIAS
ADIM
ON
OFF 1
2
3
SBIAS
ADIM
PWM1
PWM2
PWM3
PWM4
ADIM
FB
FOD817A
U2
30V<VLED<50V
ICH1 ICH2 ICH3 ICH4
RS1 RS2 RS3 RS4
R23
R24
R25
R26R27
R28
R29
R30R21
R32
R33
R34
R35
C10
LED Load Control Design
CC-CV 4-Channel, Multi-String Control
29
• Constant current, ICHx
- ICHx sensed by RSx (FBx)
- FBx compared to VADIM/10
- 4 V<VADIM<5 V for full brightness
- FBx>1 V for 20 µs→OCP (latching)
for string x
• Constant voltage, VLED
- Qx drain sensed by CHx
- CHx compared to Gm amplifier, 1 V
reference
- Gm amplifier output drives FB pin
- Regulates VLED to minimum value to
maintain Qx drain to 1 V
• Over Voltage Regulation (OVR)
- Compares VLED to 1.42 V reference
- VLED set point>1.42 V→FB
proportionally pulled low
- ICHx is reduced, VLED clamped to
OVR set voltage level
RSx
VADIM/10
1V
Vf
VDS
VS
Gm
OVR
DCDC
OUT
FB
CMP
FB
CHx
OUTx
FBxFAN7346
ICHx
1.42V
ILED
50mV<VREF(LED)<400mV
Qx
VLED
VF
VF
VF
VF
(NOTE: One of four LED strings shown)
LED Load Control Design
CC-CV 4-Channel, Control Block Diagram
30
Power Board Schematic
PFC, Boost Follower Enable, Inrush Limit
BOOST FOLLOWER
1. OFF = 450 V
2. ON = BF
3. OPEN = 250 V
31
Power Board Schematic
2-Switch Flyback, PWM Dimmers
32
Power Board Schematic
High-Voltage Flyback Bias Power Supply
• 85 VRMS<VAC<308 VRMS
• Primary referenced, PBIAS~15 V, 0.5 A
• Secondary referenced, SBIAS = 12 V, 0.5 A
33
Controller Daughter Card Schematic
Single String CC-CV LED Controller
• Sources current into optocoupler anode (OPTO_A)
• Constant LED current set to 2 A
• Constant LED voltage set to 50 V
34
Controller Daughter Card Schematic
4-Channel LED Controller
• Sinks current through optocoupler cathode
(OPTO_C)
• Constant LED current set to 350 mA
• OVR set to 62 V
PDIM
1. OFF = 5 V
2. ON = PWM DIM
35
Power Board Dimensions
228.6 mm (9 in)
76.2 mm
(3 in)
25 mm
(0.99 in)
36
Power Board Partitioning
1 2
3
4
5
6
7
1. AC input, EMI filter, inrush current limiting
2. Flyback bias regulator
3. BCM PFC
4. 2-switch, quasi-resonant, flyback converter
5. Removable controller card (4-Channel Controller Shown)
6. PWM dimmer circuits
7. LED output terminal block
37
LED CC-CV Controller Cards
OR
4-Channel, 50 V, 350 mA per Channel Single Channel, 50 V, 2 A
J19
J23
38
• VIN = 120 VAC
• VOUT = 450 V vs. boost follower
• POUT = 120 W = 100%
• Δη = 1.8%, @ 20% POUT
• ηPK = 97%, @ 90% POUT
BCM PFC Measured Efficiency & PF
• VIN = 120 VAC, 230 VAC
• VOUT = 450 V
• POUT = 120 W = 100%
• PF = 0.994
• LED power is constant so PFC should
operate within 50%<POUT<90%
Δƞ=1.8%,
@20% POUT
LED Power Range
39
• Measured
- 80 VRMS<VAC<308 VRMS
- POUT = 120 W
BCM PFC, Boost Follower Mode
Measured vs. Predicted
• Predicted
- 80 VRMS<VAC<308 VRMS
- VOUT(BF) tracks VAC >150 VRMS
when boost follower is used
- Downstream DC-DC converter
designed for 250 V<VIN<460 V
time (ms)
Voltage(V)
0 20 40 60 80 100 120 140 160
50
100
150
200
250
300
350
400
450
0
500
180 200
VOUT=465V
250V<VOUT<475V
85VRMS<VAC<308VRMS
40
• VIN = step 115 VRMS to 300 VRMS
• VOUT(BF) = 250 V to 450 V
• POUT = 60 W
BCM PFC Boost Follower Voltage Tracking
CH1 = VIN(AC), CH2 = VOUT(BF)
• VIN = step 300 VRMS to 115 VRMS
• VOUT(BF) = 450 V to 250 V
• POUT = 60 W
41
2-Switch Flyback
CH1 = VGS(HO), CH2 = VGS(LO), CH3 = V(CBOOT)
• Boost Follower Benefit
- η = 94.75% peak @ 300 VDC
- VIN = VOUT(BF) = 250 V to 470 V
- 250 VIN corresponds to 120 VAC
- Without boost follower, VIN = 450 V
for 85 VRMS<VAC<308 VRMS
• FAN7382 Gate Drive Start-Up
94.02%,
250V
93.34%,
450V
Δη=0.68%
Δη=1.41%
42
2-Switch Flyback
CH1 = VDS(LO), CH3 = VGS(LO)
• Extended valley switching
- VIN = VOUT(BF) = 250 V
- D = 11%
- fS = 68 kHz
- POUT = 24 W (Dim, 60 V, 4 x 100 mA)
• VDS valley switching on first valley
- VIN = VOUT(BF)=250 V
- D = 42%
- fS = 63kHz
- POUT = 85 W (60 V, 4 x 350 mA)
43
System Performance
CH1 = PBIAS, CH2 = RDY, CH3 = VLED, CH4 = VOUT(PFC)
• Shut-Down
- RDY LOW, stops PFC and
2-switch flyback
- RDY HIGH, starts 2-SW flyback
- VLED slowly discharges
- POUT = 70 W (LED Load)
• Start-Up
- PBIAS HIGH, starts PFC
- RDY HIGH, starts
2-switch flyback
- VLED monotonic soft-start
- POUT = 70 W (LED Load)
44
System Performance
CH1 = VIN(AC), CH2 = IIN(AC)
• VIN(AC) = 300 VRMS
- PF = 0.915
- POUT = 85 W (LED load)
• VIN(AC) = 85 VRMS
- PF = 0.994
- POUT = 85 W (LED load)
45
• Inrush current limiting
- NTC R7 and R12 limit inrush to 3.18 A during startup
- RDY signal (12 V) applied to U1-3, comparator output is HIGH, relay shorts
across R7 + R12 to maintain high efficiency during steady state operation
- Relay shorting time can be further adjusted by R16, C10
- Relay short is removed during power supply turn-off
System Performance
CH1 = VIN(AC), CH2 = IIN(AC), CH3 = VLED
46
System Performance
CH1 = VIN(AC), CH2 = IIN(AC), CH3 = VLED
• Inrush circuit enabled
- VIN(AC) = 120 VRMS
- POUT = 70 W (LED load)
- IPK = 3.18 APK
- 79.2% reduction
• Inrush circuit disabled
- VIN(AC) = 120 VRMS
- POUT = 70 W (LED load)
- IPK = 15.25 APK
47
• PWM Dimming “chops” LED DC current
• FPWM = 250 Hz
• DCH1 = DCH2 = 50%, DCH3 = 10%, DCH4 = 100%
• ILEDCH1 = ILEDCH2 = 35 mA
• ILEDCH3 = 176 mA
• ILEDCH4 = 350 mA
• η = 87.02%
• PF =.971 during dimming
System Performance
CH1=PWMCH3, CH2=PWMCH1_CH2, CH3=ILEDCH3, CH4=ILEDCH1_CH2
• 2,on-board PWM dimmers
• PDIM1 controls channels 1, 2
• PDIM2 control channels 3, 4
• FPWM = 250 Hz, 1%<D<99.9%
• VPWM = 5 V
• Set J17, J21 to “OFF” to disable PWM
dimming or apply external PWM dimming
signal
48
System Performance
Dimming
• FAN7346 analog dimming
- All four strings dim simultaneously
- 0.5 V<VADIM<4 V
- 12% minimum dimming
- Cannot dim to 0% (full-off) due to minimum
internal analog dimming voltage clamped at
0.5 V
• FAN7346 PWM Dimming
- PWM dim each LED string independently
- 2 V<VDIM(PWM)<5 V
- 100 Hz<FPWM<500 Hz
- PWM dimming is linear from 0% (barely on)
to 100% (full brightness)
49
System Performance
EN61000-3-2, Class C (PIN>25 W)
• VIN(AC) = 115 VRMS
- VOUT(PFC) = 250 V
- POUT = 85.41 W (60 V, 4×350 mA)
- η = 91.05%
- THD = 8.91%
- Passes EN61000-3-2,Class C
• VIN(AC) = 230 VRMS
- VOUT(PFC) = 400 V
- POUT = 86.2 W (60 V, 4×350 mA)
- η = 91.51%
- THD = 21.52%
- Passes EN61000-3-2,Class C
50
System Performance
Efficiency
• POUT comparison
- POUT = 70 W vs. 85 W
- η>90% over entire range for
85 W<POUT<100 W
- Both cases shown operating
with PFC boost follower
• Boost follower comparison
- Greater benefit at low-line
- ~1.2% overall efficiency
improvement at low-line
- 91.8% peak efficiency includes
EMI filter and bias supply
51
System Performance
Power Factor & CC-CV
• System PF
• PF>90% for 85 W<POUT<100 W
• Peak PF = .996 for low-line
• Fixed 450 V and boost follower PFC
output shows identical PF
• CC-CV
• OVR set to ~52 V for 50 V, 4 x 350 mA
(70 W) operation to meet 50 V
specification
• VLED(MIN) = 31 V
52
Summary
• High-power, industrial LED lighting requirements were
reviewed
• Several power solutions for CC-CV LED load control were
introduced
• 100 W, dual-stage, QR flyback, LED driver was designed
- Wide AC input voltage range
- High efficiency
- Configurable for single-string or 4-string CC-CV LED
operation
• Techniques for maximizing efficiency were verified

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Drvg_HB_LED_HP Ind_Light Fix

  • 1. 1 Driving HB-LEDs in High-Power Industrial Lighting Fixtures Steve Mappus
  • 2. 2 Agenda • High-brightness LED characteristics • LED system requirements • LED driver topologies - Single-stage vs. two-stage • LED load control - Parallel LED strings • 100 W industrial LED design example - Power stage calculations - Test results • Summary
  • 3. 3 High-Power Industrial LED Fixtures TypicalApplications LEDAdvantages Highway Light Parking Lot Streetlight Tunnel Lighting High & Low Bay Airports Bridges Manufacturing Efficiency Reliability Maintenance Instant-on Dimming Light Quality UV-Free Mercury Free Typical Power, 50 W<PLED<200 W Before After
  • 4. 4 HB-LED Characteristics VF, Forward Voltage (V) IF,ForwardCurrent(mA) 0 0.5 1.5 2 2.5 3 3.5 4 4.5 100 200 300 400 500 600 700 800 900 0 200mA (50%) 100 °C 25 °C 200mV (6%) • PN junction devices - Negative temperature coefficient - T↑, VF↓, IF↑, T↑ - Not easily paralleled • Steep IF vs. VF curve • Small ΔVF→Large ΔIF - LED color shift - Thermal imbalance - Decreased reliability • VF varies with temperature • VF can vary by 20%~30% • Operate best from a Constant Current (CC), Constant Voltage (CV) power source (Typical I-V curve for 1 A, HB-LED)
  • 5. 5 CC-CV Characteristic Curve (Typical CC-CV Curve for 75 W LED Driver) • Constant Current = 1.5 A • Constant Voltage = 50 V • Overvoltage Protection = 60 V • CC-CV LED Driver Provides: - Signal Conditioning (PFC) - Power Conversion - Load Control (75 W CC-CV LED Driver) CC-CV LED DRIVER OUT GND VLED=50V 500 mA VF VF VF VF VF VF VF VF VF VF VF VF 500 mA ILED=1.5A 500 mA ILED, LED Current (A) VLED,LEDVoltage(V) 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 20 30 40 50 60 70 0 10 Current Foldback OVP
  • 6. 6 HB-LED System Requirements AC-DC DC-DC CC-CV LOAD CONTROL AC ANALOG DIM PWM DIM LED DRIVER PFC EMI BIAS (OPTIONAL) • Input voltage range of 85 VRMS<VAC<308 VRMS possible • 50 W<POUT<200 W • ILED<2 A per string • PFC required • THD: EN61000-3-2, Class C (Lighting equipment >25 W) • LED driver - Single-stage or two-stage (shown) - DC-DC - CC-CV load control - Dimming requirements - Safety and electrical protection requirements • Various LED driver topology choices (Typical Industrial LED System Block Diagram)
  • 7. 7 Single-Stage: CC-CV PFC Flyback Advantages • Best for simple, low-cost fixtures where POUT<75 W • Can handle wide VIN range • Simple “familiar” design Disadvantages • High MOSFET VDS stress • High output voltage ripple • RCD clamp losses • Difficult to meet: high PF, low THD, high efficiency, high VIN with single-stage          N N VVV S P OUTINDS • Typical VDS for 308 VRMS:   VVVVDS 6754602308  800 V-900 V MOSFET Required AC-DC AC EMI PFC FL7930B/C CC CVFB 30VDC<VLED<60VDC
  • 8. 8 Two-Stage: PFC and CC-CV LLC Advantages • Best for any power level 50 W<POUT<1 kW • Highest overall efficiency • VDS = VIN Disadvantages • Complex power stage design • Precise gate drive timing is critical • Less efficient at low-line for 460 V PFC output • Can’t use LLC when operating PFC in “boost-follower” mode (NOTE: VBULK = 460 V to boost from 308 VRMS)AC-DC AC EMI PFC FL7930B/C FAN7621S or FLS Series CC CVFB VBULK=460VDC 30VDC<VLED<60VDC
  • 9. 9 Two-Stage: PFC and Two-Switch Flyback Advantages • Best for 50 W<POUT<150 W • High overall efficiency • Quasi-resonant (QR) flyback offers valley switching • Can handle wide VIN range • Good choice for boost follower PFC • Gate drive timing less critical • Simple “familiar” design • VDS = VIN Disadvantages • High-side gate drive required • Less efficient compared to PFC+LLC at high input (NOTE: VBULK varies (Boost-Follower) according to VAC) FLYBACK FAN6300 HVIC FAN7382 CC CVFB 250VDC<VBULK<460VDC 30VDC<VLED<60VDC AC-DC AC EMI PFC FL7930B/C
  • 10. 10 LED Load Control Single Series String Control VCS VBUS IF VF VF VF VF CC LED DRIVER OUT FB GND Advantages • Can drive 100s of series LEDs • IF is same for every LED - No current sharing necessary • Easy to control in CC or CV Disadvantages • HIGH STRING VOLTAGE • Efficiency impact due to high voltage power stage components • LED shunts needed to account for open LED failure • UL 1310 safety→VBUS<60 V The greater the number of required LEDs, the more thought should be given to a series-parallel configuration
  • 11. 11 LED Load Control Linear Regulator Control VOLTAGE PRE-REG OUT FB GND VBUSIF1 VF VF VF VF VF VF VF VF VF VF VF VF IF2 IFN ILED CC REG CC REG CC REG Disadvantages • VBUS> ∑VF +VREG • Additional VBUS margin voltage is dropped across linear regulator • Increase in regulator voltage→increase power dissipation→lower efficiency • Max current and power dissipation limit the use of linear regulators for high-power industrial LED lighting • Matched VF (Binning) can increase efficiency but increase LED cost Advantages • Driver operates in CV • Each string independently regulated • Single string can fail while remaining strings regulate in CC • Low EMI
  • 12. 12 LED Load Control Switching Buck Regulator Control VOLTAGE PRE-REG OUT FB GND VBUS IF1 VF VF VF VF ILED SW CS VIN GND RCS1 CC BUCK IF2 VF VF VF VF SW CS VIN GND RCS2 CC BUCK IFN VF VF VF VF SW CS VIN GND RCSN CC BUCK Advantages • Driver operates in CV • Each string independently regulated • Single string can fail while remaining strings regulate in CC • Typical 20%-30% efficiency improvement over linear regulators Disadvantages • High component count • Must operate at high frequency to minimize inductor size - EMI impact • Current sharing accuracy tolerances→5% considered good
  • 13. 13 LED Load Control FAN7346, 4-Channel LED Controller FAN7346 CURRENT BALANCE OVR FB1 GND VCS1 VBUS IF1 VF VF VF VF VF VF VF VF VF VF VF VF IF2 IFN ILED VCS2 VCSN FB2 FBN CC-CV LED DRIVER OUT GND FB FB OUT1 OUT2 OUTN CH1 CH2 CHN ADIM PWMN FO Q1 Q2 QN Advantages • Driver operates in CC-CV • VLED minimized→higher efficiency • Each string independently regulated • Single string can fail while remaining strings regulate in CC • Low EMI • Analog and PWM dimming • Used with any LED driver topology • Master/slave configurable for additional LED channels • Secondary (shown) or primary (opto) side control • Fault output (FO) • ±1.5% current sharing accuracy
  • 14. 14 100 W, LED Design Specification Two-Stage, BCM PFC and Two-Switch Flyback Parameter Min. Typ. Max. BCM PFC Stage VAC 85VRMS 308VRMS fVIN(AC_ 50Hz 60Hz 65Hz VOUT_PFC Fixed Regulation 440V 450V 465V VOUT_PFC Boost Follower 245V VIN(PK)+30V 465V POUT_PFC 120W tSOFT_START 50ms tON_OVERSHOOT 10V η_PFC 0.9 0.95 Two-Switch Flyback DC-DC LED Stage VIN 250V 460V VOUT_LED 30V 60V IOUT_LED Single Channel 2A IOUT_LED 4-Channel (Per Channel) 350mA POUT_LED 100W fSW_LED 50kHz 150kHz η_LED 0.9 0.95 Total System η_120V 0.90 η_230V 0.90 PF_120V 0.95 0.99 PF_230V 0.95 Mechanical and Thermal Height 30mm TJ 60⁰C Primary Design Goals 1. Wide input 85 VRMS<VAC<308 VRMS 2. Maximize wide range efficiency 3. Configurable for single-channel or 4-channel LED operation 4. Compatible with 0 V-10 V analog dimming and 0%-100% PWM dimming 5. Lowest possible design profile Intended Applications 1. Streetlight, parking lot & highway lighting 2. Industrial high-bay & low-bay lighting
  • 15. 15 BCM, PFC Design FL7930C 1 2 3 4 5 6 7 8 OUT VCC GND ZCDCS COMP RDY INV PBIAS ZCD ZCD AC EMI FILTER RDY (TO FLYBACK) BF ON OFF VOUT (TO FLYBACK) 1 2 3 R5 R6 C4 C5 R7 R8 R9 R10 R11 D6 D7 Q3 Q4 Q5 L1 D8 C6 C7 NB NAUX VIN RZCD RCS J1 0V VDS tREStOFF tON TS 0V VAUX 0V VZCD 0.65V 0A IL 0V VGS VIN VOUT 2x(VIN – VOUT) 1.4V t ZCD Delay (150ns) NAUX NB x (VOUT – VIN) NAUX NB x VIN 1.5V IL(PK) • Constant on-time, variable frequency • Switching period, TS = tOFF + tRES + tON • Inductor current switches from 0A (ZCS) • VDS - ZVS→VOUT<2×VIN - Valley switch→otherwise • Boost follower modes set by J1
  • 16. 16 BCM, PFC Design Boost Follower Operation Time (ms) Voltage(V) 0 20 40 60 80 100 120 140 160 50 100 150 200 250 300 350 400 450 0 500 180 200 VOUT=465V 250V<VOUT<475V 85VRMS<VAC<308VRMS • Rectified AC shown for 85 VRMS<VAC<308 VRMS • J1 boost follower setting: - ON: 250 V<VOUT<460 V - OFF: VOUT = 465 V - OPEN: VOUT = 250 V • Flyback DC-DC handles ~2:1 input range instead of ~4:1
  • 17. 17 BCM, PFC Design Boost Follower Design Procedure 1. Set VOUT divider: 𝑅5 = 𝑉𝑅𝐸𝐹 𝐼2 = 2.5𝑉 150𝜇𝐴 = 16.7𝑘Ω 𝑅4 = 𝑅5 × 𝑉𝑂1 − 𝑉𝑅𝐸𝐹 𝑉𝑅𝐸𝐹 = 16.7𝑘Ω × 250𝑉 − 2.5𝑉 2.5𝑉 = 1.65𝑀Ω 2. Boost follower ON for VAC >150 VRMS: 𝐼1 = 0𝐴, 𝑓𝑜𝑟 𝑉𝐴𝐶 < 150𝑉𝑅𝑀𝑆 3. Set Vb≈2 V when VAC =308 VRMS: 𝑉𝑐𝑡𝑟𝑙 = 𝑉𝑏 − 𝑉𝑏𝑒 = 2𝑉 − 0.7𝑉 = 1.3𝑉 5. Set VAC divider: R1 R2 Vf Vbe R3 R4 R5 1 3 COMP INV VREF (2.5V) FL7930C 85VRMS<VAC<308VRMS VO1=250VDC VO2=475VDC Vctrl Vb I1 I2 R6 C1 I3 I4 4. Set I4≈1 mA@√2 × 308 VRMS, solve R2: 𝑅2 = 𝑉𝑏 + 𝑉𝑓 𝐼4 = 2𝑉 + 0.5𝑉 1𝑚𝐴 = 2.5𝑘Ω 𝑅1 = 𝑅2 × 2 × 𝑉𝐴𝐶(𝑀𝐴𝑋) − 𝑉𝑏 + 𝑉𝑓 𝑉𝑏 + 𝑉𝑓 = 2.5𝑘Ω × 2 × 308𝑉𝑅𝑀𝑆 − 2𝑉 + 0.5𝑉 2𝑉 + 0.5𝑉 = 433𝑘Ω 𝐼1 = 𝐼2 × 𝑉𝑂2 𝑉𝑂1 − 1 = 150µA × 475V 250V − 1 = 135μA, 𝑓𝑜𝑟 𝑉𝐴𝐶 = 308𝑉𝑅𝑀𝑆 𝑅3 = 𝑉𝑐𝑡𝑟𝑙 𝐼1 = 1.3𝑉 135𝜇𝐴 = 9.53𝑘Ω
  • 18. 18 BCM, PFC Design Boost Follower Design Procedure (Cont.) 6. Verify Vctrl over 85 VRMS<VAC<308 VRMS: R1 R2 Vf Vbe R3 R4 R5 1 3 COMP INV VREF (2.5V) FL7930C 85VRMS<VAC<308VRMS VO1=250VDC VO2=475VDC Vctrl Vb I1 I2 R6 C1 I3 I4 𝑉𝑐𝑡𝑟𝑙 𝑉𝐴𝐶 = 𝑅2 𝑅1 + 𝑅2 × 2 × 𝑉𝐴𝐶 − 𝑉𝑓 + 𝑉𝑏𝑒 VAC (VRMS) Vctrl (mV) I1 (µA) I2 (µA) 85 0 0 150 150 19 2 150 160 95 10 150 308 1287 135 150
  • 19. 19 𝐼𝐿(𝑃𝐾) = 4 × 𝑃𝑂𝑈𝑇 𝜂 × 2 × 𝑉𝐴𝐶(𝑀𝐼𝑁) = 4 × 144𝑊 0.95 × 2 × 85𝑉𝑅𝑀𝑆 = 5𝐴 𝑃𝐾 𝐿 = 𝜂 × 2 × 𝑉𝐴𝐶(𝑀𝐼𝑁) 2 4 × 𝐹 𝑀𝐼𝑁 × 𝑃𝑂𝑈𝑇 × 1 + 2 × 𝑉𝐴𝐶(𝑀𝐼𝑁) 𝑉𝑂𝑈𝑇 − 2 × 𝑉𝐴𝐶(𝑀𝐼𝑁) = 0.9 × 2 × 160𝑉𝑅𝑀𝑆 2 4 × 45𝑘𝐻𝑧 × 144𝑊 × 1 + 2 × 160𝑉𝑅𝑀𝑆 250𝑉 − 2 × 160𝑉𝑅𝑀𝑆 = 168𝜇𝐻 ≅ 170𝜇𝐻 1. Peak inductor current: 2. Inductor value (POUT Max +20% Margin = 144 W): 3. Maximum on-time: 𝑡 𝑂𝑁(𝑀𝐴𝑋) = 𝐿 × 𝐼𝐿(𝑃𝐾) 2 × 𝑉𝐴𝐶(𝑀𝐼𝑁) = 170𝜇𝐻 × 5𝐴 𝑃𝐾 2 × 85𝑉𝑅𝑀𝑆 = 7𝜇𝑠 < 35𝜇𝑠 (𝐹𝐿7930 𝑡 𝑂𝑁 𝑀𝐴𝑋 ) (6) (1) NB=41 NA=3 (10) (9) Core: EFD30, Wurth Custom PN 750313579 Winding Pins (S→F) Wire Layers Turns Boost 6→1 40/38, Served Litz 2 41 AUX 9→10 2/38, Bifilar 1 3 BCM, PFC Design Power Stage, Inductor Calculation
  • 20. 20 4. Output capacitor: ≥ 144𝑊 250𝑉 × 2 × π × 50𝐻𝑧 × (0.05 × 250𝑉) = 150𝜇𝐹 • Holdup not typically required for LED • COUT calculated based upon maximum allowable output ripple voltage, ΔVOUT = 5%×VOUT(MIN) • VOUT(MAX)= 460 V→need COUT rated for 500 V • To maintain low-profile: - COUT = 2 x 330 µF, 250 V aluminum radial leaded capacitors in series BCM, PFC Design Power Stage, Capacitor Calculation 𝐶 𝑂𝑈𝑇 ≥ 𝑃𝑂𝑈𝑇 𝑉𝑂𝑈𝑇(𝑀𝐼𝑁) × 2𝜋 × 𝐹𝐿(𝑀𝐼𝑁) × ΔV 𝑂𝑈𝑇
  • 21. 21 Two-Switch Flyback Design CC CVFB FAN6300H 1 2 3 4 5 6 7 8 NC HV VDD GATEGND CS FB DET FAN7382 1 2 3 4 5 6 7 8 HO VB VS LOCOM LIN HIN VCCPBIAS VIN R1 R2 R3 Q1 Q2 D1 D2 D3 D4D5 ACIN R4 C1 VA VLED VHS C2 C3 (FROM PFC) (FROM PFC) RDY PBIAS
  • 22. 22 0V VDS 0A IDS tftOFF tON TS 0A ID VAVA 0V 0V VDET 0V VIN PBIAS VIN+VHS VGS(HS) VGS(LS) 0.7V 5µs 2.5V VO OVP IDET(SOURCE)>30µA tDELAY=200ns VRO 2 VRO 2 VIN 2 VIN 2 • Quasi-resonant, variable frequency • HS and LS MOSFETs switch synchronously • Switching period, TS = tOFF + tf + tON • Inductor current switches from 0 A (ZCS) every switching cycle • VDS - Valley switching - Extended valley switching • Gate turn-on - IDET>30 µA→delay 200 ns→turn-on • VDET>2.5 V→OVP (latching) Two-Switch Flyback Design Key Switching Waveforms
  • 23. 23 FAN7382 1 2 3 4 5 6 7 8 HO VB VS LOCOM LIN HIN VCCPBIAS VIN R1 R2 R3 Q1 Q2 D1 D2 D4D5 VA VHS C2 C3 DETPWM (FROM PFC) 0V 0V 0V PBIAS VHS UVLO VGS(HS) VGS(LS) • FAN7382 HVIC • HIN and LIN shorted • Q1 and Q2 MOSFETs switch synchronously…but • During start-up - HO not switching - LO switching charges C2 only when HO not switching • During steady-state - C2 charged from VHS Two-Switch Flyback Design Gate Drive Operation
  • 24. 24 1. Transformer turns ratio: 2. Primary magnetizing inductance: 3. Primary current: 𝑛 = 𝑉𝐼𝑁 𝑀𝐼𝑁 × 𝐷 𝑀𝐴𝑋 1 − 𝐹 𝑀𝐼𝑁 × 𝑡𝑓 − 𝐷 𝑀𝐴𝑋 × 1 𝑉𝑂 + 𝑉𝑓 = 250𝑉 × 0.45 1 − 50𝑘𝐻𝑧 × 600𝑛𝑠 − 0.45 × 1 60𝑉 + 2𝑉 = 3.48 𝐿 𝑀 = 𝑉𝐼𝑁(𝑀𝐼𝑁) × 𝐷 𝑀𝐴𝑋 2 2 × 𝑃𝑂 𝑛 × 𝐹 𝑀𝐼𝑁 = 250𝑉 × 0.45 2 2 × 100𝑊 0.9 × 50𝑘𝐻𝑧 = 1.14𝑚𝐻 ≈ 1𝑚𝐻 𝐼 𝐷𝑆(𝑃𝐾) = 𝑉𝐼𝑁(𝑀𝐼𝑁) × 𝐷 𝑀𝐴𝑋 𝐿 𝑀 × 𝐹 𝑀𝐼𝑁 = 250𝑉 × 0.45 1.14𝑚𝐻 × 50𝑘𝐻𝑧 = 2𝐴 𝑃𝐾 𝐼 𝐷𝑆(𝑅𝑀𝑆) = 𝐷 𝑀𝐴𝑋 3 × 𝐼 𝐷𝑆(𝑃𝐾) = 0.45 3 × 2𝐴 𝑝𝑘 = 775𝑚𝐴 𝑅𝑀𝑆 𝑡𝑓 = 𝜋 × 𝐿 𝑀 × 𝐶 𝑂𝑆𝑆 2 tf: • Estimate tf to start • Calculate tf after power stage design complete Two-Switch Flyback Design Transformer Calculations
  • 25. 25 4. Area-product core size estimate: 5. Choose EER28L, calculate primary turns: 6. Secondary turns: 𝐴 𝑒 × 𝐴 𝑤 = 𝑃𝑂 × 108 × 𝐹𝐾 2 × 𝐹 𝑀𝐼𝑁 × 𝐵 𝑃𝐾 × 𝑊𝐹 × 𝐶𝐷 × 𝑈𝐹 = 100𝑊 × 108 × 1 2 × 50𝑘𝐻𝑧 × 3000𝐺 × 0.25 × 350 × 1 = 0.38𝑐𝑚2 𝑐𝑚2 Where: FK = Cooling Factor (1=no cooling, 0.3=100 CFM) BPK = AC Flux Density (Gauss) WF = Window Factor (<1, practical<0.5) CD = Current Density (250<CD<550, CM/A) UF = Magnetization (1=single-end, 2=double-end) Low-profile ferrite core choices 𝑁𝑃 = 𝐿 𝑀 × 𝐼 𝐷𝑆(𝑃𝐾) × 108 𝐵 𝑃𝐾 × 𝐴 𝑒 = 1𝑚𝐻 × 2𝐴 𝑃𝐾 × 108 3000𝐺 × 0.81𝑐𝑚2 = 82𝑇 𝑁𝐿𝐸𝐷 = 𝑁𝑃 𝑛 = 82𝑇 3.7 = 22𝑇 𝑁𝐴 = 𝑁𝐿𝐸𝐷 × 𝑉𝐷𝐸𝑇 𝑉𝑂 + 𝑉𝑓 = 22𝑇 × 12𝑉 60𝑉 + 2𝑉 = 4𝑇 𝑁 𝐻𝑆 = 𝑁𝐿𝐸𝐷 × 𝑉𝐻𝑆 𝑉𝑂 + 𝑉𝑓 = 22𝑇 × 8𝑉 60𝑉 + 2𝑉 = 3𝑇 →Regulated secondary (TDK High Flux Ferrite Materials) Two-Switch Flyback Design Transformer Calculations (Cont.) Core Ae Aw AwAe Height EFD30 0.69 cm2 0.63 cm2 0.44 cm2cm2 14 mm EER28L 0.81 cm2 0.97 cm2 079 cm2cm2 25 mm
  • 26. 26 7. EER28L transformer winding structure: 1 NP(2-3)=38T NLED=22T 4 3 11,12 9,10 NHS(1-2)=3T 2 5 6 NP(3-4)=44T NDET(6-5)=4T Winding Pins (S→F) Wire Layers Turns ½ Primary 2→3 15/38, Served Litz 1 38 Secondary (LED) 9→11 30/38, Served Litz 1 22 Secondary (LED) 10→12 30/38, Served Litz 1 22 ½ Primary 3→4 15/38, Served Litz 1+ 44 Secondary (DET) 6→5 2/38, Bifilar 1 4 Secondary (HS) 2→1 2/38, Bifilar 1 3 EER28L ferrite core Two-Switch Flyback Design Transformer Winding Structure
  • 27. 27 • Can be used with any power topology • Constant current, U1a - Set V-, initially to ~200 mV - ILED through R12 will reach -200 mV - U1a output goes high→regulates ILED - ILED regulates CC as long as VLED<50 V • Constant voltage, U1b - Set R16, R17 divider to 2.5 V when VLED = 50 V - For VLED≥50 V, U1b output goes high→regulates CV LED Load Control Design CC-CV Single-String Control VL SBIAS 2.5VREF FB R12 R13 R14 R15 R16 R17 R18 R19 R20R21 R22 D8 D9 30V<VLED<50V C8 C9 ILED=2A U1a U1b FAN4274 FAN4274 FOD817A U2 VAO
  • 29. 29 • Constant current, ICHx - ICHx sensed by RSx (FBx) - FBx compared to VADIM/10 - 4 V<VADIM<5 V for full brightness - FBx>1 V for 20 µs→OCP (latching) for string x • Constant voltage, VLED - Qx drain sensed by CHx - CHx compared to Gm amplifier, 1 V reference - Gm amplifier output drives FB pin - Regulates VLED to minimum value to maintain Qx drain to 1 V • Over Voltage Regulation (OVR) - Compares VLED to 1.42 V reference - VLED set point>1.42 V→FB proportionally pulled low - ICHx is reduced, VLED clamped to OVR set voltage level RSx VADIM/10 1V Vf VDS VS Gm OVR DCDC OUT FB CMP FB CHx OUTx FBxFAN7346 ICHx 1.42V ILED 50mV<VREF(LED)<400mV Qx VLED VF VF VF VF (NOTE: One of four LED strings shown) LED Load Control Design CC-CV 4-Channel, Control Block Diagram
  • 30. 30 Power Board Schematic PFC, Boost Follower Enable, Inrush Limit BOOST FOLLOWER 1. OFF = 450 V 2. ON = BF 3. OPEN = 250 V
  • 31. 31 Power Board Schematic 2-Switch Flyback, PWM Dimmers
  • 32. 32 Power Board Schematic High-Voltage Flyback Bias Power Supply • 85 VRMS<VAC<308 VRMS • Primary referenced, PBIAS~15 V, 0.5 A • Secondary referenced, SBIAS = 12 V, 0.5 A
  • 33. 33 Controller Daughter Card Schematic Single String CC-CV LED Controller • Sources current into optocoupler anode (OPTO_A) • Constant LED current set to 2 A • Constant LED voltage set to 50 V
  • 34. 34 Controller Daughter Card Schematic 4-Channel LED Controller • Sinks current through optocoupler cathode (OPTO_C) • Constant LED current set to 350 mA • OVR set to 62 V PDIM 1. OFF = 5 V 2. ON = PWM DIM
  • 35. 35 Power Board Dimensions 228.6 mm (9 in) 76.2 mm (3 in) 25 mm (0.99 in)
  • 36. 36 Power Board Partitioning 1 2 3 4 5 6 7 1. AC input, EMI filter, inrush current limiting 2. Flyback bias regulator 3. BCM PFC 4. 2-switch, quasi-resonant, flyback converter 5. Removable controller card (4-Channel Controller Shown) 6. PWM dimmer circuits 7. LED output terminal block
  • 37. 37 LED CC-CV Controller Cards OR 4-Channel, 50 V, 350 mA per Channel Single Channel, 50 V, 2 A J19 J23
  • 38. 38 • VIN = 120 VAC • VOUT = 450 V vs. boost follower • POUT = 120 W = 100% • Δη = 1.8%, @ 20% POUT • ηPK = 97%, @ 90% POUT BCM PFC Measured Efficiency & PF • VIN = 120 VAC, 230 VAC • VOUT = 450 V • POUT = 120 W = 100% • PF = 0.994 • LED power is constant so PFC should operate within 50%<POUT<90% Δƞ=1.8%, @20% POUT LED Power Range
  • 39. 39 • Measured - 80 VRMS<VAC<308 VRMS - POUT = 120 W BCM PFC, Boost Follower Mode Measured vs. Predicted • Predicted - 80 VRMS<VAC<308 VRMS - VOUT(BF) tracks VAC >150 VRMS when boost follower is used - Downstream DC-DC converter designed for 250 V<VIN<460 V time (ms) Voltage(V) 0 20 40 60 80 100 120 140 160 50 100 150 200 250 300 350 400 450 0 500 180 200 VOUT=465V 250V<VOUT<475V 85VRMS<VAC<308VRMS
  • 40. 40 • VIN = step 115 VRMS to 300 VRMS • VOUT(BF) = 250 V to 450 V • POUT = 60 W BCM PFC Boost Follower Voltage Tracking CH1 = VIN(AC), CH2 = VOUT(BF) • VIN = step 300 VRMS to 115 VRMS • VOUT(BF) = 450 V to 250 V • POUT = 60 W
  • 41. 41 2-Switch Flyback CH1 = VGS(HO), CH2 = VGS(LO), CH3 = V(CBOOT) • Boost Follower Benefit - η = 94.75% peak @ 300 VDC - VIN = VOUT(BF) = 250 V to 470 V - 250 VIN corresponds to 120 VAC - Without boost follower, VIN = 450 V for 85 VRMS<VAC<308 VRMS • FAN7382 Gate Drive Start-Up 94.02%, 250V 93.34%, 450V Δη=0.68% Δη=1.41%
  • 42. 42 2-Switch Flyback CH1 = VDS(LO), CH3 = VGS(LO) • Extended valley switching - VIN = VOUT(BF) = 250 V - D = 11% - fS = 68 kHz - POUT = 24 W (Dim, 60 V, 4 x 100 mA) • VDS valley switching on first valley - VIN = VOUT(BF)=250 V - D = 42% - fS = 63kHz - POUT = 85 W (60 V, 4 x 350 mA)
  • 43. 43 System Performance CH1 = PBIAS, CH2 = RDY, CH3 = VLED, CH4 = VOUT(PFC) • Shut-Down - RDY LOW, stops PFC and 2-switch flyback - RDY HIGH, starts 2-SW flyback - VLED slowly discharges - POUT = 70 W (LED Load) • Start-Up - PBIAS HIGH, starts PFC - RDY HIGH, starts 2-switch flyback - VLED monotonic soft-start - POUT = 70 W (LED Load)
  • 44. 44 System Performance CH1 = VIN(AC), CH2 = IIN(AC) • VIN(AC) = 300 VRMS - PF = 0.915 - POUT = 85 W (LED load) • VIN(AC) = 85 VRMS - PF = 0.994 - POUT = 85 W (LED load)
  • 45. 45 • Inrush current limiting - NTC R7 and R12 limit inrush to 3.18 A during startup - RDY signal (12 V) applied to U1-3, comparator output is HIGH, relay shorts across R7 + R12 to maintain high efficiency during steady state operation - Relay shorting time can be further adjusted by R16, C10 - Relay short is removed during power supply turn-off System Performance CH1 = VIN(AC), CH2 = IIN(AC), CH3 = VLED
  • 46. 46 System Performance CH1 = VIN(AC), CH2 = IIN(AC), CH3 = VLED • Inrush circuit enabled - VIN(AC) = 120 VRMS - POUT = 70 W (LED load) - IPK = 3.18 APK - 79.2% reduction • Inrush circuit disabled - VIN(AC) = 120 VRMS - POUT = 70 W (LED load) - IPK = 15.25 APK
  • 47. 47 • PWM Dimming “chops” LED DC current • FPWM = 250 Hz • DCH1 = DCH2 = 50%, DCH3 = 10%, DCH4 = 100% • ILEDCH1 = ILEDCH2 = 35 mA • ILEDCH3 = 176 mA • ILEDCH4 = 350 mA • η = 87.02% • PF =.971 during dimming System Performance CH1=PWMCH3, CH2=PWMCH1_CH2, CH3=ILEDCH3, CH4=ILEDCH1_CH2 • 2,on-board PWM dimmers • PDIM1 controls channels 1, 2 • PDIM2 control channels 3, 4 • FPWM = 250 Hz, 1%<D<99.9% • VPWM = 5 V • Set J17, J21 to “OFF” to disable PWM dimming or apply external PWM dimming signal
  • 48. 48 System Performance Dimming • FAN7346 analog dimming - All four strings dim simultaneously - 0.5 V<VADIM<4 V - 12% minimum dimming - Cannot dim to 0% (full-off) due to minimum internal analog dimming voltage clamped at 0.5 V • FAN7346 PWM Dimming - PWM dim each LED string independently - 2 V<VDIM(PWM)<5 V - 100 Hz<FPWM<500 Hz - PWM dimming is linear from 0% (barely on) to 100% (full brightness)
  • 49. 49 System Performance EN61000-3-2, Class C (PIN>25 W) • VIN(AC) = 115 VRMS - VOUT(PFC) = 250 V - POUT = 85.41 W (60 V, 4×350 mA) - η = 91.05% - THD = 8.91% - Passes EN61000-3-2,Class C • VIN(AC) = 230 VRMS - VOUT(PFC) = 400 V - POUT = 86.2 W (60 V, 4×350 mA) - η = 91.51% - THD = 21.52% - Passes EN61000-3-2,Class C
  • 50. 50 System Performance Efficiency • POUT comparison - POUT = 70 W vs. 85 W - η>90% over entire range for 85 W<POUT<100 W - Both cases shown operating with PFC boost follower • Boost follower comparison - Greater benefit at low-line - ~1.2% overall efficiency improvement at low-line - 91.8% peak efficiency includes EMI filter and bias supply
  • 51. 51 System Performance Power Factor & CC-CV • System PF • PF>90% for 85 W<POUT<100 W • Peak PF = .996 for low-line • Fixed 450 V and boost follower PFC output shows identical PF • CC-CV • OVR set to ~52 V for 50 V, 4 x 350 mA (70 W) operation to meet 50 V specification • VLED(MIN) = 31 V
  • 52. 52 Summary • High-power, industrial LED lighting requirements were reviewed • Several power solutions for CC-CV LED load control were introduced • 100 W, dual-stage, QR flyback, LED driver was designed - Wide AC input voltage range - High efficiency - Configurable for single-string or 4-string CC-CV LED operation • Techniques for maximizing efficiency were verified