6 months/weeks training in Vlsi,jalandhar

Contents• About Cadbridge semiconductor
• IC & Classification
• VLSI introduction & objective
• VLSI design flow
• VLSI application
• VLSI companies in India
• How can we placed in cadbrige semiconductor
• IEEE paper implemented , improved & work on by me.
• Conclusion

Cadbridge semiconductor
• CADBRIDGE SEMICONDUCTOR is a emerging company in
electronics field.
• Corporate office - greater Noida .
• Branch office - jalander ( Panjab) , jaipur ( Rajasthan)
introduction
Vision
• To support a multicultural environment and make it our
business to hire, inspire and develop the very best people in the
industry, worldwide.

Area of work
Work on
• Memories
• PCB Design
• Digital security lock
• Robots
• Image processing
• MATLAB
• ARM KIT
• AVR KIT
Fature project
• FPGA Board design
• CPLD Board design
• DSP KIT Design
• microcontroller
Arm kit Avr kit
products

Integrated Circuits(ICs)
What is Integrated Circuit?
Integrated Circuits contains several transistors
fabricated on a single chip.

Classification of Integrated Circuits
Size classification( historical )
 <100 SSI 1963
100-3000 MSI 1970
3000 – 30000 LSI 1975
 30000 – 1000000 VLSI 1980
 > 1000000 ULSI 1990

VLSI introduction : Objectives
introduction :
• A VLSI (Very Large Scale Integration) system integrates millions of
“electronic components” in a small area (few mm2  few cm2).
Objectives:
design “efficient” VLSI systems that has:
• Circuit Speed (high )
• Power consumption ( low )
• Design Area ( low )

Vlsi design flow
1. idea (need) 2. specifications3. design architecture 4. RTL
coding
5. RTL
Verification
6. Synthesis7.Foundry8.IC Chip

1. Ideas
• Microprocessor
• Microcontroller
• Memories
• Printer
• Mobile
• Digital security lock
Any thing we needs chip

This is the crucial step as it will affect the
future of the product. Here, vendors may
feedback from potential customers on
looking for
• Instruction set
• Interface (I/O pins)
• Organization of the system
• Functionality of each unit in the system, and
communicate it to other units.
2.Specifications

3. Design architecture
• This is where the main work starts. With the
help of the specification sheet the target IC’s
architecture is decided and a layout for same
is created by design engineers
using EDA tools.
EDA Tools :
• Synopsys – astro
• activehdl
• Xilinx - ise design suite
• Cadence - encounter digital ic design

4. RTL coding
RTL - register transfer level.
• This implies that the VHDL/VERILOG
code written based on the architecture
describes how data is transformed as
it is passed from register to register.
RTL coding tools
• xilinx ise,
• Vim,
• Emacs,
• conTEXT,
• HDL TurboWriter

VHDL
• Not case sensitive.
• Difficult to learn.
• Based on pascal & ada.
• Strongly typed.
VERILOG
• Case sensitive.
• Easy to learn.
• Based on c.
• Not strongly typed.
HDL – Hardware Description
Language
ƒ
A programming language that can
describe the
functionality and timing of the
hardware.
Types of HDL
• VHDL ( Very high speed integrated circuit Hardware
Description Language)
• VERILOG
• SYSTEM VERILOG
Difference

5. RTL Verification
RTL simulation and verification is one of the
important step. This ensures that the design is
logically correct and without major timing errors.
It is advantageous to perform this step, especially
in the early stages of the design.
RTL verification
tools •
Modelsi
m
• Finsim
• Verilog - XL
• TestBuilder
• Xilinx ise

6. synthesis
This is where the design now start to get physical.
Logic synthesis is a process by which the desired
circuit behavior i.e. Register Transistor Level is
turned into a design in terms of logic gates which
drives the circuit or architecture.
Synthesis tools/kit• FPGA
(Altera,digiland,xilinx)
• CPLD ( altera , digiland )

FPGA KIT
Field programmable gate array (FPGA)
• It is a IC which can be be programmable by user to
capture the logic.
• Capable to capturing 100,000 designed gates.

7.Foundry
The design is sent for Fabrication for
mass production to foundry .

How can we placed in CAD BRIDGE
o DIGITAL ELECTRONICS
o VERILOG (VLSI)
o MATLAB
o FPGA
o IMAGE PROCCESING
o EMBEDDED SYSTEM
o PLC SCADA
o ANTEENA
o POWER ELECTRONICS
o Wireless communication
FULL TIMEPART TIME
WORKING
TYPES
Knowledge about any following area

IEEE Research paper I have
implemented
• Area-Efficient 3-Input Decimal Adders
Using Simplified Carry and Sum Vectors.
• A review of clock gating techniques.
• A Pipelined 8to 10 bit Encoder
for a High speed Transmission.
• VLSI implementation of adders for High speed ALU.

IEEE Research paper I have
improved
• Design of High Speed Area Optimized
Binary Coded Decimal Digit Adder and
Multiplier .
• Area-Efficient 3-Input Decimal Adders
Using Simplified Carry and Sum
Vectors .
• VLSI implementation of
adders for High speed
ALU.

Research paper on which I am
working
• Area and Power Efficient Viterbi Decoder for
Storage.
• VHDL design of lossy DWT based image
compression technique for video
conferencing.
• Faster and Energy-Efficient Signed
Multipliers.
• FPGA IMPLEMENTATION OF LOW POWER
PIPELINED 32-BIT RISC PROCESSOR .

Vlsi is suitabale for fabrication of larger number
of components on a single chip.
VHDL/VERILOG is used for digital circuit
designing and to validate the design and check the
design specification.
CONCLUSION

6 months/weeks training in Vlsi,jalandhar

Recommended

Recommended

More Related Content

What's hot

What's hot (20)

Similar to 6 months/weeks training in Vlsi,jalandhar

Similar to 6 months/weeks training in Vlsi,jalandhar (20)

More from deepikakaler1

More from deepikakaler1 (20)

Recently uploaded

Recently uploaded (20)

6 months/weeks training in Vlsi,jalandhar