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Francisco Corea Luna
Francisco Corea Luna

Esquematico macbook

Tecnología
1 de 101
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TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 8 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT 3 B 7 ECN REV BRANCH DRAWING NUMBER REVISION SIZE D PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. DRAWING TITLE THE POSESSOR AGREES TO THE FOLLOWING: Apple Inc. SHEET R DATE D A C THE INFORMATION CONTAINED HEREIN IS THE 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PAGE NOTICE OF PROPRIETARY PROPERTY: A C 3 4 5 6 D B 8 7 6 5 4 2 1 1 2 APPD CK DESCRIPTION OF REVISION TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM DRAWING DESCRIPTION REFERENCE DES BOM OPTION QTY PART NUMBER CRITICAL TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_HEAD REV B RELEASE, 01/31/11 SCHEM,FLYING_DUTCHMAN,MLB,K91F Schematic / PCB #’s ALIASES RESOLVED 1 OF 101 1 OF 132 2010-10-12 50 45 07/12/2010 K91_BEN SMC Support 49 44 07/12/2010 K91_BEN SMC 48 43 04/27/2010 K18_MLB Front Flex Support 46 42 10/08/2010 K91_ERIC External USB Connectors 45 41 11/08/2010 K91_ERIC SATA/IR/SIL Connectors 43 40 06/10/2010 T27_REF FireWire Connector 42 39 06/10/2010 T27_REF FireWire Port & PHY Power 41 38 04/27/2010 K18_MLB FireWire LLC/PHY (FW643) 40 37 05/26/2010 K91_TRINHNI Ethernet Connector 39 36 10/11/2010 K91_ERIC ETHERNET PHY (CAESAR IV) 38 35 10/12/2010 T29_REF T29 Power Support 37 34 10/12/2010 T29_REF T29 Host (2 of 2) 36 33 10/12/2010 T29_REF T29 Host (1 of 2) 35 32 10/08/2010 K91_ERIC SD READER CONNECTOR 34 31 10/08/2010 K91_MARY X19/ALS/CAMERA CONNECTOR 33 30 04/27/2010 K18_MLB FSB/DDR3/FRAMEBUF Vref Margining 32 29 04/27/2010 K18_MLB CPU Memory S3 Support 31 28 06/23/2010 K92_SUMA DDR3 SO-DIMM Connector B 30 27 05/10/2010 K92_SUMA DDR3 Byte/Bit Swaps 29 26 06/23/2010 K92_SUMA DDR3 SO-DIMM Connector A 28 25 07/06/2010 K92_MLB Chipset Support 26 24 10/08/2010 K91_ERIC USB HUBS 25 23 10/17/2010 K91_MLB CPU & PCH XDP 24 22 07/06/2010 K92_MLB PCH DECOUPLING 23 21 04/30/2010 K92_MLB PCH GROUNDS 22 20 07/06/2010 K92_MLB PCH POWER 21 19 10/20/2010 K91_MLB PCH MISC 20 18 07/06/2010 K92_MLB PCH PCI/FLASHCACHE/USB 19 17 07/06/2010 K92_MLB PCH DMI/FDI/GRAPHICS 18 16 10/19/2010 K91_MLB PCH SATA/PCIE/CLK/LPC/SPI 17 15 08/19/2010 K92_MLB CPU DECOUPLING-II 16 14 08/19/2010 K92_MLB CPU DECOUPLING-I 14 13 06/15/2010 K92_SUMA CPU POWER AND GND 13 12 08/03/2010 K92_MLB CPU POWER 12 11 06/15/2010 K92_SUMA CPU DDR3 INTERFACES 11 10 08/03/2010 K92_MLB CPU CLOCK/MISC/JTAG 10 9 06/21/2010 K92_SUMA CPU DMI/PEG/FDI/RSVD 9 8 04/27/2010 K18_MLB Signal Aliases 8 7 04/27/2010 K18_MLB Power Aliases 7 6 04/27/2010 K18_MLB Functional / ICT Test 5 5 05/28/2009 K17_REF BOM Configuration 4 4 MASTER MASTER Revision History 3 3 06/30/2009 K17_REF Power Block Diagram 2 2 06/30/2009 K17_REF System Block Diagram 100 K92_MLB 90 08/09/2010 CPU Constraints 99 K91_MARY 89 08/03/2010 Power Sequencing EG/PCH S0 97 K90I_KIRAN 88 06/25/2010 LCD Backlight Driver 96 K91_MARY 87 08/03/2010 Graphics MUX (GMUX) 95 K91_ERIC 86 10/08/2010 1V0 GPU / 1V5 FB Power Supply 94 T29_REF 85 10/16/2010 DisplayPort/T29 A Connector 93 T29_REF 84 10/16/2010 DisplayPort/T29 A MUXing 92 K92_MLB 83 11/21/2010 Muxed Graphics Support 90 K18_MLB 82 04/27/2010 LVDS Display Connector 89 K91_ERIC 81 12/21/2010 GPU (Whistler) CORE SUPPLY 88 K92_SUMA 80 06/15/2010 Whistler DP PWR/GNDs 87 K92_MLB 79 11/23/2010 Whistler GPIOs & STRAPs 86 K92_MLB 78 12/01/2010 Whistler LVDS/DP/GPIO 85 K92_MLB 77 08/19/2010 GDDR5 Frame Buffer B 84 K92_MLB 76 08/19/2010 GDDR5 Frame Buffer A 82 K92_MLB 75 08/03/2010 Whistler FRAME BUFFER I/F 81 K92_SUMA 74 06/15/2010 Whistler CORE/FB POWER 80 K92_SUMA 73 06/15/2010 Whistler PCI-E 79 K91_MARY 72 07/22/2010 Power Control 1/ENABLE 78 K91_MARY 71 10/14/2010 Power FETs 77 K91_ERIC 70 11/01/2010 Misc Power Supplies 76 K91_ERIC 69 10/08/2010 CPU VCCIO (1.05V) Power Supply 75 K91_ERIC 68 09/22/2010 CPU IMVP7 & AXG VCore Output 74 K91_ERIC 67 10/08/2010 CPU IMVP7 & AXG VCore Regulator 73 K91_ERIC 66 10/08/2010 1.5V DDR3 Supply 72 K91_ERIC 65 10/08/2010 5V / 3.3V Power Supply 71 K91_ERIC 64 10/08/2010 System Agent Supply 70 K91_CHANG 63 07/20/2010 PBus Supply & Battery Charger 69 K91_ERIC 62 10/08/2010 DC-In & Battery Connectors 68 K91_AUDIO 61 09/21/2010 AUDIO: JACK TRANSLATORS 67 K91_AUDIO 60 09/30/2010 AUDIO: JACKS 66 K91_AUDIO 59 07/12/2010 AUDIO: SPEAKER AMP 65 K91_AUDIO 58 07/12/2010 AUDIO: HEADPHONE FILTER 63 K91_AUDIO 57 07/12/2010 AUDIO: LINE INPUT FILTER 62 K91_AUDIO 56 09/30/2010 AUDIO: CODEC/REGULATOR 61 K91_BEN 55 06/08/2010 SPI ROM 59 K91_DINESH 54 08/06/2010 Digital Accelerometer 58 K91_ERIC 53 07/14/2010 WELLSPRING 2 57 K91_ERIC 52 10/08/2010 WELLSPRING 1 56 K18_MLB 51 04/27/2010 Fan Connectors 55 K91_DINESH 50 09/22/2010 Thermal Sensors 54 K91_DINESH 49 10/29/2010 High Side and CPU/AXG Current Sensing 53 K91_DINESH 48 08/16/2010 Voltage & Load Side Current Sensing 52 K18_MLB 47 04/27/2010 SMBus Connections Power Supplies BIST 101 K91_DINESH 08/18/2010 132 DEBUG SENSORS AND ADC 100 K91_DINESH 08/06/2010 130 PCB Rule Definitions 99 K18_MLB 04/27/2010 109 Project Specific Constraints 98 K18_MLB 04/27/2010 108 GPU (Whistler) CONSTRAINTS 97 K92_MLB 08/09/2010 107 SMC Constraints 96 K18_MLB 04/27/2010 106 T29 Constraints 95 T29_REF 10/16/2010 105 Ethernet/FW Constraints 94 K91_ERIC 08/03/2010 104 PCH Constraints 2 93 K92_MLB 08/09/2010 103 PCH Constraints 1 92 K92_MLB 08/09/2010 102 SCHEM,MLB,K91 (.csa) Date Page Sync Contents CRITICAL PCB 1 820-2915 PCBF,MLB,K91 SCHEM,MLB,K91 CRITICAL SCH 1 051-8620 51 K18_MLB 46 04/27/2010 LPC+SPI Debug Connector 1 1 MASTER MASTER Table of Contents Memory Constraints 91 K18_MLB 04/27/2010 101 TITLE=MLB ABBREV=DRAWING LAST_MODIFIED=Mon Jan 31 12:49:37 2011 Contents Page Date (.csa) Sync Contents Page (.csa) Sync Date
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 POWER SUPPLY PG 63 DC/BATT TEMP SENSOR J6950 U4900 PG 23 SPI Boot ROM U6100 XDP CONN J2500,J2550 J2900 DIMM PG 26,28 J3100 PG 16 DDR3-1067/1333MHZ 2 DIMMS RTC DMI PG 17 PG 44 PG 51 PG 44 POWER SENSE FAN CONN AND CONTROL J5650,5660 Fan CONNECTION SMBUS PG 47 PG 63 SPEATKER TRACKPAD/KEYBOARD U6610,6620,6630 SPEATKER Ser ADC PG 44 SMC BSB B,0 J3402 U4900 Prt PG 55 PG 46 U3600 CAMERA PG 33 PG 33 PG 41 PG 31 EXTERNAL B EXTERNAL C J4501 J4610 PG 34 PG 31 PG 53 BLUETOOTH EXTERNAL A J5713 J3401 J4600 USB HUB 2 PG 33 HUB 1 USB PG 34 U3700 LPC + SPI CONN Port80,serial J5100 PG 19 Misc SPI PG 16 LPC PG 16 PWR 10 11 13 12 9 8 6 5 4 7 3 2 1 0 CTRL PG 17 (UP TO 14 DEVICES) PG 18 USB AUDIO PG 56 DIMM PG 26,28 U6201 AMP PG 59 PG 60 FILTER PG 58 AUDIO CONN PG 57 J6700,J6750 LINE TIN FILTER PG 16 PG 16 SMB HDA J3500 PG 37 CONN (UP TO 16 LINES) SDCARD READER COUGAR-POINT U1800 2.X GHZ INTEL CPU SANDY BRIDGE INTEL MOBILE PG 9 PG 17 FDI PG 19 GPIO GRAPHICS AMD WHISTLER U8000 PG 73 U2700 CLOCK SATA3.0/6(GB/S) SATA3.0/6(GB/S) SATA2.0/3(GB/S) SATA2.0/3(GB/S) SATA2.0/3(GB/S) SATA2.0/3(GB/S) BUFFER PG 16 CLK 4 5 SATA 2 3 PG 16 1 0 DP OUT RGB OUT HDMI OUT LVDS OUT DVI OUT PG 18 TMDS OUT PCI PG 18 PG 24 PG 41 CK5G05 CONN SATA J4501 ODD PG 41 SATA CONN J4500 HDD PG 83 DP MUX XP25-5G PG 84 JTAG PCI-E PG 16 PEG PG 16 PG 16 BCM57765 GB PG 36 E-NET CONN PG 37 E-NET J4000 U3900 PG 38 PG 40 CONN FIREWIRE FW643 PG 83 DDC MUX PG 86 GMUX U4100 J4310 PG 31 AirPort J3401 MINI DP PORT LCD PANEL U9600 U9320 U9370 J9400 IR (RESERVATION) CODEC HEADPHONE SYNC_DATE=06/30/2009 SYNC_MASTER=K17_REF System Block Diagram 2 OF 132 2 OF 101
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 (PAGE 82) PP3V3_S0_PWRCTL P1V8S0_PGOOD P5V3V3_PGOOD AC ADAPTER CHGR_BGATE VIN U6200 PM_SLP_S4_L PM_SLP_S5_L PM_SLP_S3_L SMC_ONOFF_L RSMRST_PWRGD (PAGE 45) SLP_S4_L(P94) SLP_S3_L(P93) U4900 SLP_S5_L(P95) H8S2117 PWRGD(P12) RSMRST_IN(P13) PWR_BUTTON(P90) ALL_SYS_PWRGD PP4V5_AUDIO_ANALOG (PAGE 9~14) SMC CPU U1000 U2850 PM_PCH_PWRGD PS_PWRGD U1800 (PAGE 70) SMC_RESET_L ISL95870 1.05V PGOOD VOUT SMC AVREF SUPPLY (PAGE 45) REF3333 VOUT CPUVTTS0_PGOOD R7640 A PROCPWRGD DRAMPWROK SMC_TPAD_RST_L SMC_ONOFF_L PLTRST# RES* P17(BTN_OUT) SYSRST(PA2) IMVP_VR_ON(P16) 99ms DLY PP3V3_S5_AVREF_SMC (P64) RESET* VCCCPUPWRGD SM_DRAMPWROK PWRBTN# SYS_RERST# (PAGE 16~21) RSMRST# COUGAR_POINT PPCPUVTT_S0 SMC_CPU_FSB_ISENSE RSMRST_OUT(P15) ACPRESENT SMC_RESET_L PM_RSMRST_L CPUIMVP_VR_ON PM_SYSRST_L PM_PWRBTN_L SMC_ADAPTER_EN PLT_RERST_L CPU_PWRGD PM_MEM_PWRGD PM_PWRBTN_L EN FW_PWR_EN U4202 TPS22924 (PAGE 39) U5001 PP3V3_S5_SMC PP1V0_FW_FWPHY DELAY DELAY RC RC DELAY RC DELAY RC CPUVTTS0_EN P1V5CPU_EN P1V8S0_EN P1V2S0_EN R7978 U1800 (PAGE 16~21) SLP_S3#(P12) SLP_S4#(H7) DELAY DELAY RC RC MOBILE (PAGE 44) P60 SMC (PAGE 86) U4900 PL32A SMC_PM_G2_EN COUGAR-POINT SLP_S5#(E4) RC DELAY XP25-5 EG_RAIL4_EN PB18A GMUX U9600 PB17A PB17B PB16B (9 TO 12.6V) 3S2P J6950 EG_RAIL2_EN EG_RAIL3_EN EG_RAIL1_EN PPVBATT_G3H_CONN PM_SLP_S3_L PM_SLP_S5_L PM_SLP_S4_L PM_ALL_GPU_PGOOD P3V3S3_EN DDRREG_EN P5VS3_EN PM_SLP_S3_L_R PBUSVSENS_EN P3V3S0_EN P5VS0_EN && SMC_ADAPTER_EN&&PM_SLP_S3_L BKLT_PLT_RST_L LCD_BKLT_NO Q4260 BKLT_EN ENA (PAGE 87) U9701 PFWBOOST LP8550 VIN VOUT P3V3S5_EN P1V1GPU_EN P3V3GPU_EN GPUVCORE_EN Q7055 P1V5FB_EN PPVBAT_G3H_CHGR_R P1V0GPU_EN U9500 Q9806 EN2 ISL6236 EN1 VIN P5VS3_EN 1.503V(R/H) (PAGE 85) P3V3S5_EN 1.003V(L/H) POK2 EN2 EN1 VOUT2 POK1 VOUT1 A R5413 (PAGE 64) IN J6900 DCIN(16.5V) 6A FUSE F6905 K91 POWER SYSTEM ARCHITECTURE SMC_DCIN_ISENSE SMC_RESET_L A VIN R7020 PP18V5_DCIN_CONN BATTERY CHARGER PBUS SUPPLY/ U7000 ISL6259HRTZ R6990 VOUT SMC_BATT_ISENSE PPVBAT_G3H R7050 A 8A FUSE F7040 SMC_GPU_1V8_ISENSE PP1V5_GPU_REG TPS51125 P1V5FB_PGOOD P1V0GPU_PGOOD P5V3V3_PGOOD PPVOUT_S0_LCDBKLT PP1V0_S0GPU_REG (PAGE 65) PGOOD PPBUS_G3H D6990 P1V8_S0_EN U7201 Q7830 Q7870 Q7810 P3V3GPU_EN PP3V3_S3 PP3V3_S0_FET P3V3S0_EN EN P3V3S3_EN P1V2ENET_EN PP3V3_S0GPU EN U7760 (PAGE 70) PGOOD VOUT ISL8014A VIN VIN ISL8014A U7720 (PAGE 70) VOUT PGOOD PP1V2_ENET P1V2ENET_PGOOD P1V8S0_PGOOD PP1V8_S0 EN (PAGE 39) TPS22924 U4201 PP3V3_FW_FWPHY P1V8FB_EN FW_PWR_EN ON Q7922 VIN SLG5AP020 U7880 G VIN 5V 3.3V (R/H) (L/H) P1V5CPU_EN VREG5 VOUT1 VOUT2 ON SLG5AP020 DDRVTT_EN DDRREG_EN PP5V_S3 PP3V3_S5 VIN U7801 G PP1V5_S3 PP3V3_S5 S3 S5 SMC_CPU_HI_ISENSE (PAGE 66) U7300 P1V5S0FET_GATE Q7801 TPS51116 1.5V 0.75V CPUIMVP7_VR_ON R5388/U5388 A VIN PP5V_S3_DDRREG PP1V5_S3RS0 PGOOD VOUT1 VLDOIN VOUT2 Q7860 DDRREG_PGOOD PPVTT_S0_DDR_LDO PPDDR_S3_REG PP5V_S0 P5VS0_EN A VR_ON VIN CPU VCORE (PAGE 67) U7400 ISL95831 PGOOD VOUT PP1V8_S0 PM_SLP_S3_L&&WOL_EN||SMC_ADAPTER_EN P1V2S0_EN PP1V2_S0 P1V8GPUIFPXFET_GATE Q7850 PP3V3_ENET CPUIMVP7_AXG_PGOOD R7350 SMC_DDR_ISENSE A SMC_CPU_ISENSE PP1V05_S0 PP1V5_S0 V4MON V3MON TRST = 200mS (PAGE 72) U7971 RST* V2MON PP3V3_S0 PP1V8_GPUIFPX PP3V3_S0 VCC S0PGOOD_PWROK ISL88042IRTJJZ PP3V3_S0_PWRCTL PM_SLP_S4_L PM_SLP_S5_L PM_SLP_S3_L SMC_ONOFF_L RSMRST_PWRGD Q7880 ALL_SYS_PWRGD PP3V3_S0 EN PP1V5_S3 4.5V MAX8840 PM_ALL_GPU_PGOOD U7980 VOUT V U5440 V SMC_CPU_DDR_VSENSE PPVCORE_S0_CPU SMC_CPU_VSENSE PP4V5_AUDIO_ANALOG U2850 PM_PCH_PWRGD PPBUS_G3H PP5V_S3_GFXIMVP6_VDD GPUVCORE_EN SMC_PBUS_VSENSE VR_ON VDD V Q5315 GPU VCORE ISL6263C VIN U8900 PGOOD VOUT U6990 3.425V G3HOT ENABLE PM6640 (PAGE 62) SMC_GPU_ISENSE U5410 A GPUVCORE_PGOOD V PP3V42_G3H PPVCORE_GPU SMC_GPU_VSENSE CPUVTTS0_EN U5000 (PAGE 45) PP5V_S0_CPUVTTS0 EN VIN NCP303LSN SMC PWRGD U7600 (PAGE 70) SMC_RESET_L VIN ISL95870 1.05V PGOOD VOUT SMC AVREF SUPPLY (PAGE 45) REF3333 VOUT CPUVTTS0_PGOOD SYNC_DATE=06/30/2009 SYNC_MASTER=K17_REF Power Block Diagram 3 OF 132 3 OF 101
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 Revision History SYNC_MASTER=MASTER SYNC_DATE=MASTER 4 OF 132 4 OF 101
TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM DESCRIPTION REFERENCE DES BOM OPTION QTY PART NUMBER CRITICAL TABLE_ALT_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM DESCRIPTION REFERENCE DES BOM OPTION QTY PART NUMBER CRITICAL TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM BOM OPTIONS BOM GROUP TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 BOM OPTIONS BOM NAME BOM NUMBER TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM K91 BOM GROUPS Module Parts Alternate Parts EFI ROM BOM Variants (Primary) Bar Code Labels / EEEE #’s - | (Alternate) SMC PSOC ETHERNET ROM Programmables - All Builds PCBA,MLB,K91F,DG64 639-1468 K91_COMMON,SODIMM:FOXCONN,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DG64 PCBA,MLB,K91F,DG65 639-1469 K91_COMMON,SODIMM:FOXCONN,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DG65 PCBA,MLB,K91F,DL86 639-1970 K91_COMMON,SODIMM:HYBRID,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL86 K91_COMMON,SODIMM:HYBRID,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL81 639-1973 PCBA,MLB,K91F,DL81 K91_COMMON,SODIMM:MOLEX,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL7W 639-1956 PCBA,MLB,K91F,DL7W SYNC_DATE=05/28/2009 BOM Configuration SYNC_MASTER=K17_REF ALL Diodes alt for Rohm 376S0859 376S0977 U6201 AUDIO CODEC OLD REV IS ALTERNATE FOR NEW REV 353S3199 ALL 353S2592 335S0550 add 4K byte as alternative to 2K 335S0777 ALL NXP alternate for pin diodes ALL 371S0652 371S0679 138S0671 138S0673 ALL Taiyo Yuden alt for Murata 10 uF caps ALL 152S0796 Dale/Vishay/TDK alt for Cyntec 152S0685 ALL Taiyo Yuden alt for Samsung 138S0638 138S0681 138S0648 Samsung / Murata alt for Taiyo Yuden 138S0652 ALL 138S0691 Murata alt to Samsung cap ALL 138S0676 ROHM alt to Toshiba N-FET ALL 376S0972 376S0612 IC,EEPROM,SERIAL,8KB,SOIC 335S0777 CRITICAL U3690 T29ROM:BLANK 1 Sanyo alt to Kemet ALL 128S0264 128S0257 ST Micro alt to LT ALL 353S3085 353S1658 ALL 155S0457 MAG LAYERS ALT TO MURATA 155S0329 ALL 152S0896 MAG LAYERS ALT TO CYNTEC 152S0518 Panasonic alt to Sanyo ALL 128S0303 128S0282 Fairchild wafer option ALL 353S2805 353S2603 ALL 376S0855 376S0613 Diodes alt to Toshiba dual N-FET IC,SMC,DEVELOPMENT-DVT,K91 CRITICAL 1 U4900 SMC_PROG:DVT 341S2864 1 CRITICAL IC,SMC,DEVELOPMENT-PROTO2,K91 U4900 SMC_PROG:PROTO2 341S2994 IC,SMC,DEVELOPMENT-PROTO1,K91 U4900 341S2935 SMC_PROG:PROTO1 CRITICAL 1 IC,SMC,DEVELOPMENT-PVT,K91 CRITICAL U4900 1 SMC_PROG:PVT 341S2867 335S0740 64 MBIT SPI SERIAL DUAL I/O FLASH BOOTROM_BLANK 1 CRITICAL U6100 337S4033 U1000 CPU:2_3GHZ CRITICAL 1 IC,CPU,SNB,SR00U,PRQ,D2,2.3,45W,4+2,1.30,8M,BGA 1 U4900 SMC_BLANK CRITICAL IC,SMC,HS8/2117,9MMX9MM,TLP 338S0895 IC,GPU ROM,K91/F,K92,BLANK U8701 GPUROM:BLANK 1 CRITICAL 335S0724 IC,GPU ROM,K91/F,K92,PROG 1 GPUROM:PROG CRITICAL U8701 341S2957 IC,MCU,32B,LPC1112A,16KB/2KB,HVQFN25 U9330 T29MCU:BLANK CRITICAL 337S3997 1 IC,EFI,ROM,PROTO0, K90/K90I/K91/K91F/K92 1 U6100 CRITICAL 341S2893 BOOTROM_PROG:PROTO0 341S2830 CRITICAL U9600 IC,CPLD,LATTICE,GMUX,K91/K91F 1 GMUX_PROG 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL80] EEEE:DL80 1 CRITICAL 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7Y] EEEE:DL7Y 1 CRITICAL [EEEE_DL7W] EEEE:DL7W 1 826-4393 CRITICAL LBL,P/N LABEL,PCB,28MM X 6 MM 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7V] EEEE:DL7V CRITICAL 1 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7R] 1 EEEE:DL7R CRITICAL 826-4393 [EEEE_DL7Q] 826-4393 1 CRITICAL EEEE:DL7Q LBL,P/N LABEL,PCB,28MM X 6 MM 639-1574 PCBA,MLB,K91,DHMW K91_COMMON,SODIMM:FOXCONN,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DHMW 639-1960 PCBA,MLB,K91,DL7Y K91_COMMON,SODIMM:MOLEX,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DL7Y K91_COMMON,SODIMM:HYBRID,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DL7Q 639-1945 PCBA,MLB,K91,DL7Q K91_COMMON ALTERNATE,COMMON,K91_COMMON1,K91_COMMON2,K91_PROGPARTS,K91_PROGPARTS1,UVGLUE_K91_K91F,K91_PVT CPUMEM_S0,SMC_DEBUG_YES,HUB1_2NONREM,HUB2_2NONREM,USBHUB_2513B K91_COMMON1 K91_COMMON2 GPUVID_1P11V,KB_BL,T29:YES,ENET_SD:B0,T29BST:Y,SDRV_PD,SDRVI2C:MCU,T29_DP_HPD:ALL_OR K91_PVT BMON:PROD,VREFMRGN_NOT,XDP,XDP_CPU_BPM,BKLT:PROD,ISNS_ON:NO,LPCPLUS_R:YES K91_PROGPARTS GMUX_PROG,IR_PROG,TPAD_PROG:PVT,ENETROM_PROG:PVT,T29ROM:PROG,T29MCU:PROG SMC_PROG:PVT,BOOTROM_PROG:PVT K91_PROGPARTS1 K91_DEVEL:PVT SNB_CPT_XDP,LPCPLUS_CONN:YES,LPCPLUS_R:YES SNB_CPT_XDP XDP,XDP_CONN,XDP_CPU_BPM,XDP_PCH 1 IC,T29 EEPROM,PVT,K9x T29ROM:PROG U3690 CRITICAL 341S3129 K91_COMMON,SODIMM:HYBRID,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DL80 639-1959 PCBA,MLB,K91,DL80 IC,EFI,ROM,PROTO1, K90/K90I/K91/K91F/K92 341S2934 CRITICAL U6100 BOOTROM_PROG:PROTO1 1 K91_DEVEL:ENG SNB_CPT_XDP,BMON:ENG,GMUX_JTAG_CONN,VREFMRGN,LPCPLUS_CONN:YES,LPCPLUS_R:YES,BKLT:ENG,S0PGOOD_ISL,CPURIPPLE_ENG,IMVPISNS_ENG,ISNS_ON:YES,DEBUG_ADC,DIGI_MIC 338S0945 U3600 IC,ASSP,LIGHTRIDGE,S LHAJ,PRQ,FCBGA,15X15MM CRITICAL 1 T29:YES 725-1479 UV_GLUE_K91_K91F UVGLUE_K91_K91F 1 CRITICAL MLB LOCTITE UV EB CPU,PCH,T29,GPU,K91 CRITICAL J2900 516-0246 SODIMM:FOXCONN 1 CONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,FOXCONN CONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,MOLEX 516S0805 SODIMM:MOLEX J3100 1 CRITICAL 1 516-0245 SODIMM:MOLEX CONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,MOLEX CRITICAL J2900 516S0805 J3100 1 SODIMM:HYBRID CONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,MOLEX CRITICAL J2900 516-0246 1 CRITICAL CONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,FOXCONN SODIMM:HYBRID IC,FLASH,SERIAL,SPI,1MBIT,2V7,8P,SOIC 335S0663 1 ENETROM_BLANK CRITICAL U3990 1 U3990 341S3096 CRITICAL IC,ENET ROM,1MBIT,DVT,PVT,K90i/K91x ENETROM_PROG:PVT IC,ENET,1MBITFLASH,CIV REV01,K90i/K91/K92 1 CRITICAL ENETROM_PROG:EVT 341S3026 U3990 341S2685 IC,ENET,1MBITFLASH,CIV REV01,K74/K75,K40 1 CRITICAL ENETROM_PROG:A0_SD U3990 SODIMM:FOXCONN J3100 516S0806 1 CRITICAL CONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,FOXCONN TPAD_PROG:PROTO2 U5701 CRITICAL IC,TP PSOC,K9x,PROTO2 1 341S3001 1 CRITICAL TPAD_PROG:EVT IC,TP PSOC,K9x,EVT 341S3024 U5701 341S2940 1 CRITICAL TPAD_PROG:PROTO1 U5701 IC,TP PSOC,K9x,PROTO1 IC,EFI,ROM,PVT, K90/K90I/K91/K91F/K92 CRITICAL BOOTROM_PROG:PVT 1 U6100 341S2896 341S2894 CRITICAL BOOTROM_PROG:EVT 1 U6100 IC,EFI,ROM,EVT, K90/K90I/K91/K91F/K92 1 CRITICAL U5701 341S2902 TPAD_PROG:PROTO0 IC,TP PSOC,K9x,PROTO0 1 341S3099 IC,TP PSOC,K9x,DVT,PVT CRITICAL TPAD_PROG:PVT U5701 IC,SMC,DEVELOPMENT-EVT,K91 U4900 1 SMC_PROG:EVT CRITICAL 341S2861 U1000 1 337S4031 CPU:2_0GHZ CRITICAL IC,CPU,SNB,SR030,PRQ,D2,2.0,45W,4+2,1.20,6M,BGA IC,PCH,COUGARPOINT,SLH9D,PRQ,BD82HM65 U1800 337S4029 CRITICAL 1 337S3936 U8000 IC,GPU,AMD,WHISTLER,962FCBGA,40NM,ES 1 GPU:WHISTLER CRITICAL 1 337S4032 U1000 CPU:2_2GHZ CRITICAL IC,CPU,SNB,SR00W,PRQ,D2,2.2,45W,4+2,1.30,6M,BGA K91_COMMON,SODIMM:MOLEX,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DL7R PCBA,MLB,K91,DL7R 639-1953 337S3979 CRITICAL IC,GPU,AMD,SEYMOUR,M2 LP,ES1,962BGA 1 GPU:SEYMOUR U8000 K91_COMMON,SODIMM:MOLEX,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL88 PCBA,MLB,K91F,DL88 639-1976 PCBA,MLB,K91F,DG67 639-1471 K91_COMMON,SODIMM:FOXCONN,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DG67 639-1974 PCBA,MLB,K91F,DL87 K91_COMMON,SODIMM:HYBRID,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL87 PCBA,MLB,K91F,DL83 639-1972 K91_COMMON,SODIMM:HYBRID,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL83 [EEEE_DG63] CRITICAL 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM EEEE:DG63 1 [EEEE_DG66] EEEE:DG66 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM 1 CRITICAL IC,PROGRMD,LPC1112A,T29 PORT MCU,PVT,HVQFN25 341S3128 T29MCU:PROG CRITICAL U9330 1 SMC_PROG:PROTO0 U4900 IC,SMC,DEVELOPMENT-PROTO0,K91 1 CRITICAL 341S2854 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7T] 1 EEEE:DL7T CRITICAL 826-4393 341S2973 U3990 1 CRITICAL ENETROM_PROG:B0_SD IC,ENET,1MBITFLASH,CIV REV01,K60/K62 1 [EEEE_DL89] EEEE:DL89 826-4393 CRITICAL LBL,P/N LABEL,PCB,28MM X 6 MM LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL88] CRITICAL 1 826-4393 EEEE:DL88 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL85] CRITICAL 826-4393 EEEE:DL85 1 353S3055 IC,PI3VEDP212,X2 DISPLAYPORT 2:1 MUX,QFN CRITICAL 1 U9390 IC,SGRAM,GDDR5,64MX32,3.6GBPS,M-DIE,HF U8400,U8450,U8500,U8550 FB_1G_HYNIX CRITICAL 333S0572 4 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL84] 1 CRITICAL 826-4393 EEEE:DL84 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL82] CRITICAL 1 826-4393 EEEE:DL82 LBL,P/N LABEL,PCB,28MM X 6 MM 826-4393 [EEEE_DHMV] 1 CRITICAL EEEE:DHMV [EEEE_DHMW] LBL,P/N LABEL,PCB,28MM X 6 MM 826-4393 EEEE:DHMW CRITICAL 1 BOOTROM_PROG:DVT 1 CRITICAL U6100 341S2895 IC,EFI,ROM,DVT, K90/K90I/K91/K91F/K92 [EEEE_DL83] CRITICAL 1 EEEE:DL83 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL86] CRITICAL 1 EEEE:DL86 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL81] CRITICAL 1 826-4393 EEEE:DL81 157S0055 ALL 157S0058 Delta alt to TDK Magnetics LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DG67] 826-4393 CRITICAL 1 EEEE:DG67 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DG64] CRITICAL 1 EEEE:DG64 826-4393 [EEEE_DDKG] LBL,P/N LABEL,PCB,28MM X 6 MM 826-4393 EEEE:DDKG 1 CRITICAL [EEEE_DG65] CRITICAL 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM 1 EEEE:DG65 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL87] CRITICAL 1 EEEE:DL87 IC,SDRAM,GDDR5,32MX32,1.25GHz,A-DIE1.35V U8400,U8450,U8500,U8550 CRITICAL FB_512_HYNIX 333S0564 4 333S0543 U8500,U8550 FB_256_SAMSUNG CRITICAL 2 IC,SGRAM,GDDR5,32MX32.1.25GHz,E-DIE,HF IC,SDRAM,GDDR5,32MX32,1.25GHz,A-DIE1.35V 333S0564 CRITICAL FB_256_HYNIX 2 U8500,U8550 IC,SGRAM,GDDR5,64MX32,3.6GBPS,C-DIE,HF CRITICAL FB_1G_SAMSUNG 333S0571 4 U8400,U8450,U8500,U8550 IC,EFI,ROM,PROTO2, K90/K90I/K91/K91F/K92 U6100 CRITICAL 1 BOOTROM_PROG:PROTO2 341S2991 1 IR,ENCORE II,CY7C63833-LFXC IR_PROG U4800 CRITICAL 341S2384 IC,PLD,LATTICE,LFXP2-5E-5,132 BALL CSBGA GMUX_BLANK U9600 1 CRITICAL 336S0042 639-1470 PCBA,MLB,K91F,DG66 K91_COMMON,SODIMM:FOXCONN,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DG66 PCBA,MLB,K91F,DL82 639-1971 K91_COMMON,SODIMM:MOLEX,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL82 1 343S0534 IC,ASIC,GBIT ETHNET&SD CTRLR,686 QFN8X8,B0 CRITICAL U3900 ENET_SD:B0 K91_COMMON,SODIMM:FOXCONN,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DHMV 639-1573 PCBA,MLB,K91,DHMV 639-1954 PCBA,MLB,K91F,DL7T K91_COMMON,SODIMM:MOLEX,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL7T IC,SGRAM,GDDR5,32MX32.1.25GHz,E-DIE,HF FB_512_SAMSUNG 333S0543 U8400,U8450,U8500,U8550 CRITICAL 4 IC,FW643-E,1394B PHY/OHCI LINK/PCI-E,12 1 CRITICAL 338S0753 U4100 IC,ASIC,GBIT ETHNET&SD CTRLR,686 QFN8X8,A0 1 CRITICAL U3900 ENET_SD:A0 343S0494 085-1901 K91/K91F DEVELOPMENT BOM K91_DEVEL:ENG 5 OF 132 5 OF 101
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 NC NO_TESTs NO_TEST J6995 (BAT LED CONN) J5800 (IPD FLEX CONN) J6950 (BAT CONN) NC NO_TESTs NC NO_TESTs J6950 (MAIN BATT CONN) J6950 (BIL CABLE CONN) Functional Test Points J6900 (DC POWER CONN) J6781 & J6782 (SPEAKERS CONN) J5650 (LEFT FAN CONN) POWER RAILS NO_TEST=TRUE FUNC_TEST per Fan 2 TP needed J3401 & J3402 (AIRPORT/BT/CAMERA CONN) 3 TPs per Fan NO_TEST FUNC_TEST J9000 (LVDS CONN) NC NO_TESTs NO_TEST CPU NO_TESTs NO_TEST 3 TPs 6 TPs NO_TEST ICT Test Points FUNC_TEST PCH ALIASES 5 TPs FUNC_TEST 5 TPs J4500 (SATA ODD CONN) J4501 (SATA HDD CONN) 4 TPs J5713 (KEY BOARD CONN) 2 TPs J5815 (KBD BACKLIGHT CONN) J5660 (RIGHT FAN CONN) J6780 (MIC CONN) USB PORTS I1000 I1001 I1002 I1003 I1004 I1005 I1006 I1007 I1008 I1009 I1010 I1011 I1012 I1013 I1014 I1015 I1016 I1017 I1018 I1019 I1020 I1021 I1022 I1024 I1025 I1026 I1027 I1028 I1029 I1031 I1032 I1033 I1034 I1035 I1038 I1039 I1040 I1042 I1043 I1044 I1050 I1051 I1052 I1053 I1054 I1055 I1056 I1057 I1058 I1059 I1060 I1061 I1062 I1063 I1064 I1065 I1066 I1086 I1088 I1089 I1090 I1092 I1093 I1094 I1095 I1096 I1097 I1098 I1099 I1100 I1101 I1102 I1103 I1104 I1105 I1106 I1107 I1108 I1109 I1110 I1111 I1112 I1113 I1114 I1115 I1116 I1117 I1118 I1119 I1120 I1121 I1122 I1123 I1124 I1125 I1126 I1127 I1128 I1129 I1130 I1131 I1132 I1134 I1135 I1136 I1137 I1140 I1141 I1142 I1143 I1145 I1146 I1149 I1150 I1151 I1152 I1156 I1160 I1161 I1273 I1288 I1292 I1297 I1436 I1437 I1438 I1439 I1440 I1441 I1442 I1443 I1464 I1477 I1478 I1479 I1480 I1481 I1482 I1483 I1484 I1485 I1486 I1487 I1488 I1489 I1490 I1491 I1492 I1493 I1494 I1495 I1496 I1497 I1498 I1508 I1509 I1510 I1513 I1514 I1515 I1516 I1517 I1518 I1519 I1520 I1521 I1522 I1523 I1524 I1525 I1526 I1527 I1528 I1529 I1530 I1531 I1532 I1533 I1534 I1535 I1536 I1537 I1539 I1540 I1541 I1542 I1543 I1544 I1545 I1546 I1547 I1548 I1549 I1550 I1551 I1552 I1553 I1554 I1555 I1556 I1557 I1558 I1559 I1560 I1561 I1562 I1563 I1564 I1565 I1566 I1567 I1568 I1569 I1570 I1571 I1572 I1573 I1574 I1575 I1576 I1577 I1578 I1579 I1580 I1581 I1582 I1583 I1584 I1585 I1586 I1587 I1588 I1589 I1590 I1591 I1592 I1593 I1594 I1595 I1596 I1598 I1599 I1600 I1601 I1602 I1603 I1604 I1605 I1606 I1607 I1610 I1611 I1612 I1613 I1614 I1615 I1616 I1617 I1618 I1619 I1620 I1621 I1622 I1623 I1624 I1625 I1626 I1627 I1628 I1629 I1630 I1631 I1632 I1633 I1634 I1635 I1636 I1637 I1638 I1639 I1640 I1641 I1642 I1643 I1644 I1645 I557 I558 I559 I600 I602 I603 I604 I605 I606 I607 I610 I611 I612 I613 I614 I615 I616 I617 I618 I620 I621 I623 I624 I625 I626 I627 I636 I637 I638 I639 I640 I709 I714 I720 I722 I723 I724 I725 I726 I727 I728 I729 I730 I731 I732 I733 I734 I735 I737 I738 I739 I740 I741 I742 I743 I744 I751 I752 I756 I760 I761 I762 I763 I764 I765 I766 I767 I768 I769 I770 I771 I772 I774 I989 I990 I991 I992 I993 I994 I995 I996 I997 I998 SYNC_MASTER=K18_MLB Functional / ICT Test SYNC_DATE=04/27/2010 TRUE PP3V3_S0 TRUE PP5V_S0 PP5V_S0 TRUE PP3V3_S0 TRUE TRUE PP5V_S0 PP1V8_S0 TRUE TRUE MEM_A_SA<1..0> TRUE MEM_A_DQS_N<7..0> MEM_A_DQS_P<7..0> TRUE FB_A0_DQ<31..0> TRUE TRUE FB_A0_WCLK_P<1..0> FB_B1_DBI_L<3..0> TRUE TRUE FB_B1_WCLK_P<1..0> FB_A0_A<8..0> TRUE FB_A0_EDC<3..0> TRUE FB_A0_DBI_L<3..0> TRUE FB_A1_DQ<31..0> TRUE FB_A1_ABI_L TRUE FB_A0_ABI_L TRUE FB_B1_WCLK_N<1..0> TRUE TRUE FB_B1_A<8..0> TRUE FB_B0_DBI_L<3..0> TRUE FB_B1_ABI_L TRUE FB_A0_WCLK_N<1..0> TRUE MAKE_BASE=TRUE NC_SATA_E_R2D_CN TRUE MEM_B_A<15..0> MAKE_BASE=TRUE TRUE NC_SMC_P41 PP3V3_S0GPU TRUE Z2_CLKIN TRUE PP0V75_S0_DDRVTT TRUE SMC_LID_R TRUE TRUE SPI_ALT_CS_L TRUE SPI_ALT_MISO NC_SATA_D_R2D_CN MAKE_BASE=TRUE NC_SATA_D_R2D_CP TRUE TRUE MAKE_BASE=TRUE NC_SATA_E_D2RP TRUE FB_B0_ABI_L TRUE FB_B0_DQ<31..0> TRUE MEM_A_CS_L<1..0> MEM_A_CLK_P<1..0> TRUE TRUE MEM_A_CKE<1..0> NC_LVDS_EG_BKL_PWM MEM_A_BA<2..0> TRUE MEM_A_CLK_N<1..0> TRUE MEM_A_ODT<1..0> TRUE MAKE_BASE=TRUE TRUE NC_PCIE_CLK100M_PE4P TP_LVDS_IG_BKL_PWM NC_SMC_BS_ALRT_L TRUE MEM_B_SA<1..0> NC_LVDS_IG_CTRL_CLK NC_CRT_IG_VSYNC NC_CRT_IG_DDC_CLK TRUE SMC_NMI TRUE WS_KBD7 TP_LVDS_IG_B_CLKP TRUE MEM_B_DQS_N<7..0> TRUE MEM_B_DQ<63..0> TRUE MEM_B_ODT<1..0> MAKE_BASE=TRUE TRUE NC_PCIE_CLK100M_PE7P MAKE_BASE=TRUE NC_LVDS_IG_BKL_PWM TRUE MEM_B_CKE<1..0> TRUE NC_SMC_BS_ALRT_L TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE NC_LVDS_IG_B_CLKN TRUE MAKE_BASE=TRUE TRUE NC_LVDS_EG_BKL_PWM MEM_B_BA<2..0> TRUE TRUE MEM_B_RAS_L TRUE MEM_B_CAS_L TRUE MEM_B_WE_L NC_PCIE_CLK100M_PE6N NC_PCIE_CLK100M_PE5P NC_PCIE_CLK100M_PE5N MAKE_BASE=TRUE NC_PCIE_CLK100M_PE6N TRUE NC_PCIE_CLK100M_PE6P TRUE MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE NC_PSOC_P1_3 TRUE MAKE_BASE=TRUE NC_SATA_B_D2RN TRUE MAKE_BASE=TRUE NC_SATA_B_D2RP NC_GPU_MIOA_DE MAKE_BASE=TRUE TRUE NC_GPU_GSTATE<1> MAKE_BASE=TRUE TRUE NC_SDVO_INTP LPC_FRAME_L TRUE LPC_AD<0..3> TRUE TP_ISSP_SCLK_P1_1 TRUE BKLT_EN TRUE TRUE BI_MIC_P BI_MIC_N TRUE TRUE FAN_RT_PWM TRUE FAN_RT_TACH FAN_LT_TACH TRUE SMBUS_SMC_BSA_SCL TRUE SMBUS_SMC_A_S3_SCL TRUE TRUE PSOC_SCLK PP18V5_S4 TRUE USB_LT2_N TRUE TRUE PP3V3_S3 TRUE USB2_LT1_P TRUE PP3V42_G3H TRUE WS_KBD1 TRUE WS_KBD2 TRUE WS_KBD3 TRUE WS_KBD4 TRUE WS_KBD6 WS_KBD11 TRUE TRUE WS_KBD8 TRUE WS_KBD15_CAP TRUE SATA_HDD_D2R_C_N TRUE SPKRCONN_S_OUT_N SMBUS_SMC_A_S3_SDA TRUE TRUE SATA_ODD_D2R_UF_P SATA_ODD_D2R_UF_N TRUE TRUE PP5V_S0_HDD_FLT SATA_ODD_R2D_N TRUE SATA_ODD_D2R_C_N TRUE TRUE SATA_ODD_R2D_P SATA_ODD_D2R_C_P TRUE TRUE SMC_ODD_DETECT PP5V_SW_ODD TRUE SATA_HDD_R2D_N TRUE TRUE SATA_HDD_D2R_C_P TRUE SPKRCONN_R_OUT_N TRUE USB_LT2_P NC_LPC_DREQ0_L MAKE_BASE=TRUE TP_GPU_GSTATE<0> TP_GPU_MIOA_D<9..0> TP_CPU_RSVD<2..1> TRUE MAKE_BASE=TRUE NC_SATA_E_R2D_CP NC_LPC_DREQ0_L NC_HDA_SDIN2 TRUE MAKE_BASE=TRUE TP_CPU_RSVD<65..62> TP_CPU_RSVD<27..26> TRUE SMC_TCK SMC_RX_L TRUE SMC_TDO TRUE SMC_TMS TRUE SMC_TRST_L TRUE NC_PCH_LVDS_VBG TRUE MAKE_BASE=TRUE NC_CRT_IG_HSYNC TRUE MAKE_BASE=TRUE NC_CRT_IG_HSYNC NC_CRT_IG_RED TP_ISSP_SDATA_P1_0 TRUE SMC_ONOFF_L TRUE SMC_MD1 TRUE SPKRCONN_L_OUT_P TRUE TRUE SPKRCONN_R_OUT_P TRUE SPKRCONN_S_OUT_P SPKRCONN_L_OUT_N TRUE TRUE PP5V_S5 LVDS_CONN_A_DATA_N<2> TRUE LVDS_CONN_A_CLK_F_P TRUE LVDS_CONN_A_CLK_F_N TRUE LVDS_CONN_B_DATA_P<1> TRUE LVDS_CONN_B_DATA_N<1> TRUE PP3V42_G3H TRUE TRUE LVDS_CONN_A_DATA_N<0> TRUE NC_SMC_FAN_3_TACH NC_SMC_FAN_3_CTL TRUE NC_FW643_AVREG MAKE_BASE=TRUE TRUE NC_TP_CPU_RSVD<65..62> NC_TP_CPU_RSVD<43..32> MAKE_BASE=TRUE TRUE TRUE MAKE_BASE=TRUE NC_CRT_IG_GREEN TRUE MAKE_BASE=TRUE NC_CRT_IG_DDC_CLK MAKE_BASE=TRUE NC_SDVO_INTP TRUE NC_SDVO_STALLN TRUE MAKE_BASE=TRUE TP_DP_IG_D_MLP<3..0> NC_DP_IG_D_CTRL_DATA MAKE_BASE=TRUE NC_DP_IG_D_CTRL_DATA TRUE NC_DP_IG_C_MLP<3..0> MAKE_BASE=TRUE TRUE NC_DP_IG_C_CTRL_DATA TRUE MAKE_BASE=TRUE NC_FW643_AVREG MAKE_BASE=TRUE TRUE NC_ESTARLDO_EN TRUE TRUE NC_FW2_TPAN NC_FW2_TPAP TRUE NC_FW2_TPBIAS TRUE NC_FW2_TPBP TRUE TRUE NC_FW2_TPBN TRUE NC_SMC_FAN_2_CTL TRUE NC_SMC_FAN_2_TACH TRUE SMC_KDBLED_PRESENT_L KBDLED_ANODE TRUE TRUE PPVOUT_S0_LCDBKLT TRUE NC_SMC_BS_ALRT_L LPCPLUS_RESET_L TRUE LPC_CLK33M_LPCPLUS TRUE TRUE LPC_SERIRQ PM_CLKRUN_L TRUE PP3V3_SW_LCD TRUE LVDS_CONN_B_DATA_N<2> TRUE TP_CPU_RSVD<58..45> TP_CPU_RSVD<43..32> TP_CPU_RSVD<24..15> LCD_BKLT_PWM TRUE TRUE LED_RETURN_6 TRUE LED_RETURN_4 TRUE LVDS_CONN_B_CLK_F_N TRUE LVDS_CONN_B_CLK_F_P LVDS_CONN_B_DATA_P<2> TRUE LVDS_CONN_A_DATA_P<2> TRUE LVDS_CONN_A_DATA_N<1> TRUE LVDS_DDC_DATA TRUE LED_RETURN_5 TRUE LPCPLUS_GPIO TRUE PP18V5_DCIN_FUSE TRUE TRUE MAKE_BASE=TRUE NC_TP_CPU_RSVD<58..45> LVDS_DDC_CLK TRUE LED_RETURN_3 TRUE TRUE WS_KBD5 NC_CRT_IG_GREEN NC_CRT_IG_DDC_DATA TP_CPU_RSVD_NCTF<8..5> LVDS_CONN_A_DATA_P<0> TRUE TRUE SATA_HDD_R2D_P PP3V3_S5_AVREF_SMC TRUE USB2_LT1_N TRUE TRUE WS_KBD13 SMC_RESET_L TRUE TRUE WS_KBD16_NUM TRUE LPC_PWRDWN_L TRUE SMC_TDI MAKE_BASE=TRUE TRUE NC_TP_CPU_RSVD<2..1> WS_KBD10 TRUE NC_CLINK_CLK TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE TRUE NC_CLINK_DATA NC_CLINK_RESET_L MAKE_BASE=TRUE TRUE NC_PCIE_CLK100M_PEBP TP_DP_IG_C_MLP<3..0> MAKE_BASE=TRUE TRUE NC_TP_CPU_RSVD<24..15> TRUE MAKE_BASE=TRUE NC_TP_CPU_RSVD<27..26> TRUE MAKE_BASE=TRUE NC_CRT_IG_BLUE MAKE_BASE=TRUE TRUE NC_CRT_IG_RED NC_SATA_F_D2RN TRUE NC_CRT_IG_VSYNC MAKE_BASE=TRUE NC_DP_IG_C_AUXP TRUE MAKE_BASE=TRUE NC_DP_IG_C_CTRL_DATA NC_DP_IG_C_CTRL_CLK NC_DP_IG_C_HPD NC_FW643_TDI TRUE MAKE_BASE=TRUE NC_TP_CPU_RSVD_NCTF<8..5> NC_SDVO_TVCLKINN NC_SDVO_TVCLKINP NC_SDVO_STALLN NC_SDVO_STALLP NC_CLINK_DATA NC_CLINK_RESET_L MAKE_BASE=TRUE TRUE NC_PCIE_CLK100M_PEBN NC_GPU_MIOA_DE NC_SDVO_TVCLKINN TRUE MAKE_BASE=TRUE NC_DP_IG_C_AUXN TRUE MAKE_BASE=TRUE NC_DP_IG_C_MLN<3..0> TRUE MAKE_BASE=TRUE NC_ALS_GAIN TRUE NC_FW0_TPAP TRUE NC_FW0_TPBP TRUE TRUE NC_FW0_TPBN MAKE_BASE=TRUE NC_FW643_TDI TRUE NC_DP_IG_C_HPD TRUE MAKE_BASE=TRUE NC_DP_IG_C_CTRL_CLK MAKE_BASE=TRUE TRUE NC_DP_IG_D_CTRL_CLK TRUE MAKE_BASE=TRUE NC_DP_IG_D_AUXN NC_SATA_E_R2D_CN TRUE WS_KBD9 WS_LEFT_OPTION_KBD TRUE NC_PCH_LVDS_VBG TRUE FAN_LT_PWM PP5V_S3_ALSCAMERA_F TRUE PP3V3_WLAN TRUE TRUE WS_KBD12 TRUE WS_KBD14 TRUE WS_KBD17 TRUE WS_KBD19 WS_KBD23 TRUE TRUE PP5V_S3_RTUSB_B_F PCIE_AP_D2R_N TRUE TRUE PP3V3_FW_FWPHY SMBUS_SMC_A_S3_SCL TRUE PSOC_MOSI TRUE WS_CONTROL_KBD TRUE LVDS_CONN_A_DATA_P<1> TRUE LVDS_CONN_B_DATA_P<0> TRUE LVDS_CONN_B_DATA_N<0> TRUE Z2_DEBUG3 TRUE LED_RETURN_1 TRUE LED_RETURN_2 TRUE PCIE_AP_R2D_N TRUE TRUE PCIE_AP_R2D_P WIFI_EVENT_L TRUE AP_CLKREQ_Q_L TRUE TRUE PCIE_CLK100M_AP_CONN_P PCIE_CLK100M_AP_CONN_N TRUE PCIE_WAKE_L TRUE SYS_DETECT_L TRUE AP_RESET_CONN_L TRUE SMBUS_SMC_A_S3_SDA TRUE PP5V_S3_IR_R TRUE TRUE PP5V_S3_RTUSB_A_F NC_DP_IG_D_AUXN MAKE_BASE=TRUE TRUE NC_DP_IG_D_AUXP TRUE MAKE_BASE=TRUE NC_DP_IG_D_CTRL_CLK MAKE_BASE=TRUE TRUE NC_CRT_IG_DDC_DATA NC_CRT_IG_BLUE PM_SYSRST_L TRUE MAKE_BASE=TRUE NC_GPU_GSTATE<0> TRUE NC_SDVO_INTN NC_DP_IG_D_HPD NC_DP_IG_C_AUXN NC_DP_IG_C_AUXP TP_DP_IG_C_MLN<3..0> NC_DP_IG_D_HPD TRUE MAKE_BASE=TRUE NC_DP_IG_D_MLN<3..0> MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE NC_SDVO_TVCLKINP TRUE NC_SDVO_STALLP MAKE_BASE=TRUE TRUE NC_GPU_MIOA_D<9..0> MAKE_BASE=TRUE TRUE NC_GPU_BUFRST_L MAKE_BASE=TRUE TRUE TRUE MAKE_BASE=TRUE NC_SDVO_INTN TRUE NC_DP_IG_D_MLP<3..0> MAKE_BASE=TRUE TP_DP_IG_D_MLN<3..0> NC_DP_IG_D_AUXP TRUE NC_HDA_SDIN3 MAKE_BASE=TRUE NC_LVDS_IG_B_CLKP MAKE_BASE=TRUE TRUE TP_LVDS_IG_B_CLKN NC_GPU_BUFRST_L TRUE NC_SATA_F_D2RN MAKE_BASE=TRUE NC_SATA_F_D2RP TRUE SYS_LED_ANODE_R TRUE SPI_ALT_MOSI TRUE WS_KBD20 TRUE WS_KBD21 TRUE WS_KBD22 WS_LEFT_SHIFT_KBD TRUE CONN_USB2_BT_N TRUE USB_CAMERA_CONN_N TRUE USB_CAMERA_CONN_P TRUE PP1V0_FW_FWPHY TRUE PP18V5_S3 TRUE SYS_LED_ANODE TRUE IR_RX_OUT TRUE NC_HDA_SDIN1 PP1V05_S0 TRUE T29_D2R_P<1..0> TRUE PM_SLP_S3_L TRUE T29_D2R_N<1..0> TRUE PP1V05_S0GPU TRUE T29_D2R_C_N<1..0> TRUE TRUE T29DPA_ML_P<3..0> TRUE SPI_ALT_CLK WS_KBD_ONOFF_L TRUE NC_PCIE_CLK100M_PE4P NC_PCIE_CLK100M_PE4N PP1V05_S5 TRUE TRUE DP_T29SNK0_AUXCH_N DP_T29SNK0_ML_C_P<3..0> TRUE DP_T29SNK0_ML_N<3..0> TRUE TRUE BI_MIC_SHIELD TRUE CONN_USB2_BT_P SMBUS_SMC_0_S0_SCL TRUE TRUE SMBUS_SMC_0_S0_SDA Z2_BOOST_EN TRUE PP1V8R1V55_S0GPU_ISNS TRUE TRUE DP_T29SNK0_AUXCH_C_P TRUE T29DPA_ML_N<3..0> DP_T29SNK1_ML_P<3..0> TRUE NC_PCIE_CLK100M_PE7N NC_PCIE_CLK100M_PE7N TRUE MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE NC_SATA_B_R2D_CN MAKE_BASE=TRUE TRUE NC_SATA_B_R2D_CP TRUE FB_A1_A<8..0> FB_A1_EDC<3..0> TRUE FB_A1_WCLK_N<1..0> TRUE TRUE FB_B1_EDC<3..0> TRUE FB_B1_DQ<31..0> TRUE FB_B0_WCLK_P<1..0> TRUE FB_B0_WCLK_N<1..0> TRUE FB_B0_EDC<3..0> TRUE FB_B0_A<8..0> TRUE MEM_B_DQS_P<7..0> TRUE MEM_B_CS_L<1..0> TRUE MEM_B_CLK_P<1..0> MEM_B_CLK_N<1..0> TRUE TRUE MEM_A_DQ<63..0> TRUE MEM_A_A<15..0> TRUE MEM_A_CAS_L TRUE MEM_A_RAS_L TRUE MEM_A_WE_L TRUE FB_A1_WCLK_P<1..0> FB_A1_DBI_L<3..0> TRUE MAKE_BASE=TRUE TRUE NC_SATA_F_D2RP MAKE_BASE=TRUE NC_SATA_F_R2D_CN TRUE MAKE_BASE=TRUE TRUE NC_SATA_F_R2D_CP TRUE WS_KBD18 TRUE T29_R2D_C_P<1..0> T29_R2D_P<1..0> TRUE TRUE DP_T29SNK0_AUXCH_C_N DP_T29SNK0_ML_C_N<3..0> TRUE DP_T29SNK0_ML_P<3..0> TRUE PPVCORE_GPU TRUE TRUE PPDCIN_G3H TRUE DP_T29SNK1_ML_C_P<3..0> PSOC_MISO TRUE MAKE_BASE=TRUE TRUE NC_SATA_D_D2RN MAKE_BASE=TRUE TRUE NC_SATA_D_D2RP NC_PSOC_P1_3 NC_SATA_B_D2RN NC_SATA_B_D2RP NC_SATA_B_R2D_CN NC_SATA_B_R2D_CP DP_T29SNK1_AUXCH_P TRUE DP_T29SNK1_AUXCH_C_N TRUE TRUE DP_T29SNK1_AUXCH_C_P DP_T29SNK1_AUXCH_N TRUE DP_T29SNK1_ML_C_N<3..0> TRUE PP3V3_S3 TRUE PP3V3_S5 TRUE PP1V8R1V55_S0GPU_ISNS_R TRUE DP_SDRVA_ML_C_P<2> TRUE TRUE DP_SDRVA_ML_N<2> TRUE DP_SDRVA_ML_P<2> TRUE DP_SDRVA_ML_N<0> TP_DP_T29SRC_AUXCH_CN TRUE TP_DP_T29SRC_AUXCH_CP TRUE TP_DP_T29SRC_ML_CN<3..0> TRUE TP_DP_T29SRC_ML_CP<3..0> TRUE DP_SDRVA_ML_C_N<0> TRUE DP_SDRVA_ML_C_P<0> TRUE PP3V42_G3H TRUE TRUE PPBUS_G3H TRUE DP_SDRVA_ML_P<0> DP_SDRVA_ML_C_N<2> TRUE PPVCORE_S0_GFX TRUE TRUE TP_T29_PCIE_RESET0_L TP_T29_PCIE_RESET1_L TRUE SMC_TX_L TRUE TRUE SPIROM_USE_MLB T29_D2R_C_P<1..0> TRUE T29_R2D_N<1..0> TRUE PP1V8_GPUIFPX TRUE TRUE PP3V3_ENET Z2_KEY_ACT_L TRUE TRUE PP5V_S3 PICKB_L TRUE PSOC_F_CS_L TRUE Z2_RESET TRUE Z2_MOSI TRUE PPVTTDDR_S3 TRUE TRUE TP_FW643_VAUX_ENABLE PCIE_AP_D2R_P TRUE T29_R2D_C_N<1..0> TRUE NC_SATA_D_D2RN NC_SATA_D_R2D_CP NC_SATA_E_D2RP PPVP_FW TRUE TRUE PPVCORE_S0_CPU Z2_SCLK TRUE Z2_MISO TRUE Z2_CS_L TRUE Z2_HOST_INTN TRUE PPVBAT_G3H_CONN TRUE TP_FW643_VBUF TRUE TP_SMC_P24 TRUE NC_CLINK_CLK FDI_LSYNC<1..0> TRUE TP_USB_HUB1_PRTPWR1 TRUE FDI_INT TRUE TRUE FDI_FSYNC<1..0> FDI_DATA_P<1> TRUE TRUE TP_USB_HUB1_OCS1 TRUE TP_USB_HUB2_PRTPWR1 TRUE TP_FW643_TDO TRUE TP_FW643_TMS TRUE MAKE_BASE=TRUE NC_SATA_E_D2RN TRUE MAKE_BASE=TRUE NC_SATA_D_R2D_CN MAKE_BASE=TRUE TRUE NC_PCI_PME_L NC_PCI_PME_L MAKE_BASE=TRUE NC_PCI_CLK33M_OUT3 TRUE NC_PCI_CLK33M_OUT3 NC_PCIE_CLK100M_PE5P MAKE_BASE=TRUE TRUE NC_PCIE_CLK100M_PE7P DP_T29SNK1_ML_N<3..0> TRUE PP1V5_S3RS0 TRUE PP1V5_S3 TRUE PP1V2_S0 TRUE PP1V2_ENET TRUE ADAPTER_SENSE TRUE TRUE SMBUS_SMC_BSA_SDA SMC_BIL_BUTTON_L TRUE SMBUS_SMC_BSA_SCL TRUE SMBUS_SMC_BSA_SDA TRUE NC_PCIE_CLK100M_PE6P NC_GPU_GSTATE<1> TRUE MAKE_BASE=TRUE NC_PCIE_CLK100M_PE4N MAKE_BASE=TRUE NC_PCIE_CLK100M_PE5N TRUE TRUE T29DPA_D2R1_AUXCH_P TP_USB_HUB2_OCS1 TRUE TRUE TP_SMC_PF5 TRUE TP_DC_TEST_A62 TRUE TP_DC_TEST_D65 TP_FW643_TCK TRUE TRUE DC_TEST_BH3_BJ2 DC_TEST_BH1_BG2 TRUE NC_SATA_F_R2D_CP TRUE TP_SMC_P10 TRUE TP_P7_7 TRUE TP_PSOC_SCL TP_PSOC_SDA TRUE TRUE TP_FW643_SE TRUE TP_FW643_SDA TRUE TP_FW643_JASI_EN TRUE TP_FW643_FW620_L TRUE TP_FW643_CE TRUE TP_FW643_SM TRUE TP_FW643_OCR10_CTL TRUE TP_FW643_NAND_TREE TRUE TP_FW643_SCIFMC TRUE TP_FW643_SCIFDOUT TRUE TP_FW643_SCIFDAIN TRUE TP_FW643_SCIFCLK TRUE DMI_S2N_N<1> TRUE FDI_DATA_N<1> TRUE DMI_S2N_P<1> NC_HDA_SDIN1 TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE TRUE NC_LVDS_IG_CTRL_CLK NC_HDA_SDIN2 NC_LVDS_IG_CTRL_DATA NC_LVDS_IG_CTRL_DATA TRUE MAKE_BASE=TRUE NC_HDA_SDIN3 TP_AUD_GPIO_2 TRUE TRUE TP_AUD_GPIO_1 TP_AUD_LO1_L_N TRUE TRUE TP_AUD_LO1_L_P TRUE TP_SPI_DESCRIPTOR_OVERRIDE_L TP_BKL_FAULT TRUE TRUE CPUIMVP_BOOT1 TP_XDPPCH_HOOK2 TRUE TRUE TP_XDPPCH_HOOK3 TRUE TP_GMUX_PL6B PM_RSMRST_L TRUE TRUE CPUIMVP_BOOT2 DP_T29SNK0_AUXCH_P TRUE TRUE CPUIMVP_UGATE2 TRUE TP_1V05_S0_PCH_VCCAPLLEXP TRUE T29_D2R1_BIAS TRUE T29DPA_D2R1_AUXCH_N TRUE TP_T29_PCIE_RESET3_L TRUE TP_T29_PCIE_RESET2_L TRUE NC_PCIE_CLK100M_PEBP MAKE_BASE=TRUE NC_PCIE_CLK100M_PEBN TP_SMC_P41 NC_SATA_E_R2D_CP NC_SATA_E_D2RN NC_SATA_D_D2RP NC_SATA_F_R2D_CN TRUE GND TRUE GND TRUE GND GND TRUE TRUE GND TRUE GND GND TRUE GND TRUE TRUE GND TRUE GND TRUE GND TRUE GND GND TRUE 7 OF 132 6 OF 101 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 7 14 17 20 22 25 70 71 87 26 11 26 27 91 11 26 27 91 75 76 97 75 76 97 75 77 97 75 77 97 75 76 97 75 76 97 75 76 97 75 76 97 75 76 97 75 76 97 75 77 97 75 77 97 75 77 97 75 77 97 6 16 11 28 91 52 53 7 26 28 29 66 62 46 46 6 16 6 16 6 16 75 77 97 75 77 97 11 26 91 11 26 91 11 26 91 6 11 26 91 11 26 91 6 8 18 6 28 6 18 6 17 6 17 44 46 52 8 18 11 27 28 91 11 27 28 91 11 28 91 6 19 11 28 91 6 6 11 28 91 11 28 91 11 28 91 11 28 91 6 19 6 16 6 16 6 52 6 6 6 6 6 17 16 44 46 87 93 16 44 46 87 93 8 52 60 61 60 61 51 51 51 6 44 47 62 63 96 6 31 44 47 53 54 96 52 53 53 42 98 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 42 98 6 7 25 42 44 45 46 47 52 62 63 72 52 52 52 52 52 52 52 52 41 92 59 60 98 6 31 44 47 53 54 96 41 92 41 92 41 41 92 41 41 92 41 41 44 41 41 92 41 92 59 60 98 42 98 6 16 6 16 6 16 6 16 44 45 46 42 44 45 46 44 45 46 44 45 46 44 46 6 18 6 17 6 17 6 17 8 52 44 45 52 44 46 59 60 98 59 60 98 59 60 98 59 60 98 7 53 65 71 82 83 97 82 97 82 97 82 83 97 82 83 97 6 7 25 42 44 45 46 47 52 62 63 72 82 83 97 44 45 44 45 6 38 6 17 6 17 6 17 6 17 6 17 6 17 17 6 17 6 38 38 40 38 40 38 40 38 40 38 40 44 45 44 45 53 53 8 82 88 100 6 25 46 87 93 25 46 93 16 44 46 17 44 46 82 82 83 97 87 88 82 88 82 88 82 97 82 97 82 83 97 82 83 97 82 83 97 82 83 82 88 19 46 62 82 83 82 88 52 6 17 6 17 82 83 97 41 92 44 45 42 98 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II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 3.3V Rails Chipset "VCore" Rails 5V Rails FireWire Rails "GPU" Rails Backlight Rails ENET Rails 1.8V/1.5V/1.2V/1.05V Rails 2A max supply T29 Rails For PCH RTC Power G3H Rails Power Aliases SYNC_DATE=04/27/2010 SYNC_MASTER=K18_MLB PP3V3_S0 MIN_NECK_WIDTH=0.075 mm VOLTAGE=3.3V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.5 MM PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 MIN_NECK_WIDTH=0.2 MM MAKE_BASE=TRUE VOLTAGE=3.3V MIN_LINE_WIDTH=0.4 MM PP3V3_T29 PP1V05_T29 VOLTAGE=15V MAKE_BASE=TRUE PP15V_T29 MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM PP1V05_T29 VOLTAGE=1.05V MAKE_BASE=TRUE PP3V3_T29 PP3V3_T29 PP3V3_T29 PP3V3_T29 PP15V_T29 PP5V_S0 PP5V_S0 PP15V_T29 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP1V05_T29 PP3V3_T29 MAKE_BASE=TRUE PP5V_S0 VOLTAGE=5V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM PP3V3_S0 MAKE_BASE=TRUE VOLTAGE=3.3V MIN_LINE_WIDTH=0.50MM PP3V3_S3 MIN_NECK_WIDTH=0.20MM PP3V3_S3 PP3V3_S3 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S4 PP3V3_S5 MIN_LINE_WIDTH=0.3 MM VOLTAGE=0.75V MAKE_BASE=TRUE PPVTTDDR_S3 MIN_NECK_WIDTH=0.2 MM PP3V3_S5 PP5V_S0 PP5V_S0 PP5V_S0 MAKE_BASE=TRUE VOLTAGE=3.3V PP3V3_S4 MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM PP3V3_S4 PP3V3_SUS PP3V3_SUS PP3V3_SUS PP3V3_SUS PP5V_S3 PP3V3_S0 PP3V3_S0 PP1V05_SUS MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM VOLTAGE=1.05V MAKE_BASE=TRUE PPVIN_S5_HS_OTHER_ISNS PPVIN_S5_HS_COMPUTING_ISNS PPBUS_G3H PPBUS_G3H PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PPVIN_S5_HS_GPU_ISNS MIN_NECK_WIDTH=0.25 mm MIN_LINE_WIDTH=0.6 mm VOLTAGE=12.8V MAKE_BASE=TRUE PPVIN_S5_HS_OTHER_ISNS PPDCIN_G3H MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM VOLTAGE=1.0V MAKE_BASE=TRUE PP1V0_FW_FWPHY PP3V3_FW_FWPHY PP1V0_FW_FWPHY PP3V3_ENET PPVIN_S5_HS_OTHER_ISNS MIN_LINE_WIDTH=0.6 MM PPDCIN_G3H MIN_NECK_WIDTH=0.25 MM MAKE_BASE=TRUE VOLTAGE=18.5V PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP5V_S3 PP5V_S3 PP5V_S0 PP3V3_SUS PP3V3_SUS PP3V3_SUS PP3V3_SUS PP3V3_S4 PP1V05_S0 PP1V05_SUS PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H PPVIN_S5_HS_COMPUTING_ISNS MIN_LINE_WIDTH=0.6 mm MAKE_BASE=TRUE VOLTAGE=12.8V MIN_NECK_WIDTH=0.25 mm PPVIN_S5_HS_COMPUTING_ISNS PPDCIN_G3H PPVIN_S5_HS_COMPUTING_ISNS PPVIN_S5_HS_COMPUTING_ISNS MIN_NECK_WIDTH=0.25 mm MIN_LINE_WIDTH=0.6 mm MAKE_BASE=TRUE VOLTAGE=12.8V PPVIN_S5_HS_GPU_ISNS PPVIN_S5_HS_COMPUTING_ISNS PPVIN_S5_HS_GPU_ISNS PPVIN_S5_HS_COMPUTING_ISNS PPVIN_S5_HS_GPU_ISNS VOLTAGE=3.42V MAKE_BASE=TRUE PPVRTC_G3H MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM VOLTAGE=5V MAKE_BASE=TRUE PP5V_S5 MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM PP5V_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V2_S0 MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.2V MAKE_BASE=TRUE PP5V_S0 PP5V_S0 PP1V05_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP1V8_S0 PP1V8_S0 PP1V8_S0 PP1V8_S0 PP1V8_S0 PP1V8_S0 PP1V8_S0 PPVCCSA_S0_REG PPVCCSA_S0_REG MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.5V MAKE_BASE=TRUE PP1V8_S0 MIN_NECK_WIDTH=0.2 MM MAKE_BASE=TRUE PPVCCSA_S0_REG MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=0.9V MIN_NECK_WIDTH=0.2 MM VOLTAGE=3.3V MIN_LINE_WIDTH=0.6 MM PP3V3_ENET MAKE_BASE=TRUE PP1V2_ENET PP1V8_S0_CPU_VCCPLL_R MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.5V PP1V5_S3RS0_CPUDDR PP1V5_S0 PP1V5_S0 VOLTAGE=1.5V MIN_NECK_WIDTH=0.2 MM PP1V5_S0 MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE PP1V5_S0 PP1V5_S3RS0_CPUDDR PP1V5_S3RS0_CPUDDR PP1V5_S3 PP1V5_S3 PP1V5_S3 PP1V8_S0_CPU_VCCPLL_R MAKE_BASE=TRUE VOLTAGE=1.8V MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM PP5V_S5 PP3V42_G3H PP3V42_G3H PP1V5_S3_CPU_VCCDQ PP1V05_S0_CPU_VCCPQE PP3V3_ENET VOLTAGE=12.8V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.25 mm PPBUS_SW_BKL MIN_LINE_WIDTH=0.6 mm PPBUS_SW_BKL PP1V0_S0GPU_ISNS PP1V0_S0GPU MAKE_BASE=TRUE VOLTAGE=1.0V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM PP1V5_S0GPU_ISNS MAKE_BASE=TRUE VOLTAGE=1.5V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM PP1V5_GPU_REG VOLTAGE=1.5V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE PP1V8_S0GPU_ISNS VOLTAGE=1.8V MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE MIN_NECK_WIDTH=0.15 MM PP1V8_GPUIFPX VOLTAGE=1.8V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.15 MM MIN_LINE_WIDTH=0.6 MM PP1V8_GPUIFPX PP1V5_GPU_REG PP1V5_S0GPU_ISNS PP3V3_S0GPU PP3V3_S0GPU PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V5_S0GPU_ISNS PP1V5_S0GPU_ISNS PP1V0_S0GPU PP1V8_S0GPU_ISNS PP1V0_S0GPU PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.0V MAKE_BASE=TRUE PPVCORE_GPU PPVCORE_GPU MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.0V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.25 MM VOLTAGE=1.25V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM PPVCORE_S0_CPU MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM PPVCORE_S0_AXG PPVCORE_S0_CPU PPVCORE_S0_AXG PPVCORE_S0_AXG PP1V5_S3_CPU_VCCDQ MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.5V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM PP1V05_S0_CPU_VCCPQE MAKE_BASE=TRUE VOLTAGE=1.05V PP3V3_FW_FWPHY VOLTAGE=1.2V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE PP1V2_ENET PP3V3_ENET PP3V3_ENET PP1V2_ENET PP1V2_S0 PP1V5_S0GPU_ISNS PP3V42_G3H PPVRTC_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PPDCIN_G3H PPVRTC_G3H PP5V_S5 PP5V_S5 PP5V_S5 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V8_S0GPU_ISNS PP1V8_GPUIFPX PP3V3_S0GPU PP3V3_S0GPU MAKE_BASE=TRUE VOLTAGE=3.3V MIN_NECK_WIDTH=0.10MM MIN_LINE_WIDTH=0.3 MM PP3V3_S0GPU PP3V3_S0GPU PP3V3_S0GPU PP3V3_S0GPU PP1V8_S0GPU_ISNS PP1V5_GPU_REG PP1V5_S0GPU_ISNS PPVCORE_S0_CPU PPVP_FW MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM MAKE_BASE=TRUE VOLTAGE=12.8V PPVP_FW PPVP_FW PP1V0_FW_FWPHY VOLTAGE=3.3V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.4 MM PP3V3_FW_FWPHY MIN_NECK_WIDTH=0.2 MM PPVP_FW PP3V42_G3H PP3V3_S5 PP1V05_S0 PP5V_SUS PP5V_S3 MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE VOLTAGE=5V PP3V42_G3H PP0V75_S0_DDRVTT PP0V75_S0_DDRVTT PPVCORE_GPU PPVTTDDR_S3 PP1V05_SUS PP0V75_S0_DDRVTT PP0V75_S0_DDRVTT PP1V8_S0GPU_ISNS PP1V5_S3 VOLTAGE=1.5V MAKE_BASE=TRUE PP1V5_S3 MIN_LINE_WIDTH=0.2 mm MIN_NECK_WIDTH=0.17 mm PP1V5_S3RS0_CPUDDR PP1V5_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V2_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP5V_S3 PP5V_SUS PP1V5_S3 PP1V5_S3 MIN_NECK_WIDTH=0.17 mm MAKE_BASE=TRUE VOLTAGE=0.75V MIN_LINE_WIDTH=2 mm PP0V75_S0_DDRVTT PP3V42_G3H PP3V42_G3H PP3V42_G3H PP5V_S3 PP5V_S3 PP1V8_S0 PP3V42_G3H MAKE_BASE=TRUE VOLTAGE=3.42V MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM PP5V_SUS MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=5V MAKE_BASE=TRUE PP5V_S5 PP5V_S3 PP5V_S3 PP5V_S3 PP5V_S3 MIN_NECK_WIDTH=0.25 mm VOLTAGE=12.8V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 mm PPBUS_G3H PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP5V_S0 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S3 PP5V_S3 PP5V_S3 PP5V_S3 MIN_NECK_WIDTH=0.2 MM VOLTAGE=3.3V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM PP3V3_S5 MIN_LINE_WIDTH=0.6 MM VOLTAGE=3.3V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM PP3V3_SUS PP1V05_S0 MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.05V MIN_NECK_WIDTH=0.2 MM 8 OF 132 7 OF 101 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 7 16 19 25 33 34 35 87 7 34 35 7 8 35 85 7 34 35 7 16 19 25 33 34 35 87 7 16 19 25 33 34 35 87 7 16 19 25 33 34 35 87 7 16 19 25 33 34 35 87 7 8 35 85 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 7 8 35 85 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 7 34 35 7 16 19 25 33 34 35 87 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 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61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 7 49 81 86 7 49 65 6 7 48 62 63 6 7 38 39 6 7 38 39 40 6 7 38 39 6 7 25 36 70 72 7 49 65 6 7 48 62 63 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 7 16 17 18 19 20 22 45 70 71 72 7 16 17 18 19 20 22 45 70 71 72 7 16 17 18 19 20 22 45 70 71 72 7 16 17 18 19 20 22 45 70 71 72 7 45 52 53 71 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 7 23 70 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 7 49 64 66 67 68 69 7 49 64 66 67 68 69 6 7 48 62 63 7 49 64 66 67 68 69 7 49 64 66 67 68 69 7 49 81 86 7 49 64 66 67 68 69 7 49 81 86 7 49 64 66 67 68 69 7 49 81 86 6 7 53 65 71 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 70 87 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 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71 100 7 86 100 7 74 75 76 77 100 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 75 76 77 100 7 74 75 76 77 100 7 86 100 7 74 78 80 100 7 86 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 6 7 48 74 81 6 7 48 74 81 6 7 12 14 48 68 101 7 12 13 15 48 68 6 7 12 14 48 68 101 7 12 13 15 48 68 7 12 13 15 48 68 7 12 15 7 10 12 14 6 7 38 39 40 6 7 36 70 6 7 25 36 70 72 6 7 25 36 70 72 6 7 36 70 7 74 75 76 77 100 6 7 25 42 44 45 46 47 52 62 63 72 7 16 17 20 25 6 7 25 42 44 45 46 47 52 62 63 72 6 7 25 42 44 45 46 47 52 62 63 72 6 7 25 42 44 45 46 47 52 62 63 72 6 7 25 42 44 45 46 47 52 62 63 72 6 7 48 62 63 7 16 17 20 25 6 7 53 65 71 6 7 53 65 71 6 7 53 65 71 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 7 74 78 80 100 6 7 71 100 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 7 74 78 80 100 7 86 100 7 74 75 76 77 100 6 7 39 40 6 7 39 40 6 7 39 40 6 7 38 39 6 7 38 39 40 6 7 25 42 44 45 46 47 52 62 63 72 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 7 22 71 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 25 42 44 45 46 47 52 62 63 72 6 7 26 28 29 66 6 7 26 28 29 66 6 7 48 74 81 6 7 30 66 7 23 70 6 7 26 28 29 66 6 7 26 28 29 66 7 74 78 80 100 6 7 26 28 29 66 71 6 7 26 28 29 66 71 7 16 20 22 25 41 56 70 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 70 87 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 29 31 41 42 43 45 65 66 71 81 100 7 22 71 6 7 26 28 29 66 71 6 7 26 28 29 66 71 6 7 26 28 29 66 6 7 25 42 44 45 46 47 52 62 63 72 6 7 25 42 44 45 46 47 52 62 63 72 6 7 25 42 44 45 46 47 52 62 63 72 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 14 17 20 22 25 70 71 87 6 7 25 42 44 45 46 47 52 62 63 72 7 22 71 6 7 53 65 71 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 7 16 17 18 19 20 22 45 70 71 72 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101
II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 Short (IO Row) EMI pogo pins Tall EMI pogo pins Keyboard / IPD Conn Protect Thermal Module Holes GPU signals GMUX ALIASES Heat spreader mounting boss for T29 router Heat spreader mounting boss for PCH Left Speaker Holes Unused PEG signals Frame Holes CPU signals T29 / GMUX JTAG Signals T29 Signals Through PEG Unused T29 Ports Digital Ground Fan Holes SM XW0901 1 2 SM XW0902 1 2 SM XW0903 1 2 STDOFF-4.0OD1.85H-SM SH0920 1 STDOFF-4.0OD1.85H-SM SH0923 1 STDOFF-4.0OD2.23H-SM SH0921 1 STDOFF-4.0OD2.23H-SM SH0922 1 MF-LF 2 1 R0916 1/16W 402 5% 10K 5% 1/16W 2 1 402 MF-LF R0915 10K 1/8W MF-LF 805 R0950 T29BST:N 0 5% 1 2 C0905 10% 2 201 0.01UF 10V 1 X5R R0921 MF 51 1/20W 2 201 5% 1 0.01UF C0901 10% 10V X5R 1 2 201 X5R C0902 0.01UF 2 10V 201 10% 1 R0922 51 5% 1/20W 201 2 1 MF 2 10V 201 10% 1 X5R 0.01UF C0903 R0923 201 1/20W 5% 2 1 MF 51 C0904 0.01UF 2 10V 201 10% 1 X5R R0924 201 2 1 5% MF 1/20W 51 C0906 0.01UF X5R 201 2 10V 10% 1 201 R0926 2 1 MF 1/20W 51 5% 10% 10V 0.01UF 2 1 201 X5R C0907 201 R0927 1 2 5% MF 51 1/20W C0908 0.01UF 2 X5R 1 10% 10V 201 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0984 1 3R2P5 ZT0990 1 3R2P5 ZT0960 1 SL-3.1X2.7-6CIR-NSP ZT0950 TH 1 1 3R2P5 ZT0940 3R2P5 ZT0915 1 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0986 1 STDOFF-4.5OD.98H-1.1-3.48-TH 1 ZT0981 ZT0985 1 STDOFF-4.5OD.98H-1.1-3.48-TH SH0917 SM 1 1.4DIA-SHORT-SILVER-K99 SM SH0901 1 1.4DIA-SHORT-SILVER-K99 SM SH0912 1 1.4DIA-SHORT-SILVER-K99 SM SH0910 1 1.4DIA-SHORT-SILVER-K99 SM SH0911 1 1.4DIA-SHORT-SILVER-K99 SM SH0913 1 1.4DIA-SHORT-SILVER-K99 POGO-2.0OD-3.5H-K86-K87 1 SH0903 SM POGO-2.0OD-3.5H-K86-K87 1 SM SH0916 POGO-2.0OD-3.5H-K86-K87 1 SH0902 SM POGO-2.0OD-3.5H-K86-K87 1 SM SH0900 POGO-2.0OD-3.5H-K86-K87 SM 1 SH0904 SM SH0914 1 1.4DIA-SHORT-SILVER-K99 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0991 1 ZT0988 STDOFF-4.5OD.98H-1.1-3.48-TH 1 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0989 1 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0987 1 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0980 1 4.0OD1.85H-M1.6X0.35 ZT0952 1 4.0OD1.85H-M1.6X0.35 ZT0953 1 STDOFF-4.0OD3.0H-TH ZT0934 1 ZT0935 1 STDOFF-4.0OD3.0H-TH STDOFF-4.5OD.98H-1.1-3.48-TH ZT0930 1 NOSTUFF R09031 402 10K 5% 2 MF-LF 1/16W 2 1 R0904 NOSTUFF 10K 5% 1/16W MF-LF 402 1/16W R0901 4.7K 2 402 MF-LF 5% 1 NOSTUFF MF-LF 402 5% 1/16W 10K 1 2 R0913 1/16W 402 5% MF-LF 1 2 10K NOSTUFF R0914 SYNC_MASTER=K18_MLB SYNC_DATE=04/27/2010 Signal Aliases T29_A_BIAS_R DP_IG_DDC_DATA MAKE_BASE=TRUE MAKE_BASE=TRUE DP_IG_HPD MAKE_BASE=TRUE DP_IG_DDC_CLK DP_IG_AUX_CH_N TP_DP_IG_B_MLP<3..0> DP_A_BIAS0 DP_A_BIAS2 DP_IG_DDC_DATA NC_PCH_CLKOUT_DPN TRUE MAKE_BASE=TRUE DP_IG_AUX_CH_P TP_DP_IG_B_MLN<3..0> DP_IG_DDC_CLK GND GND TRUE MAKE_BASE=TRUE NC_PCIE_CLK100M_EXCARD_N TP_SMC_EXCARD_PWR_EN PEG_R2D_C_P<7..0> MAKE_BASE=TRUE MAKE_BASE=TRUE JTAG_ISP_TDO PPBUS_G3H NC_PCIE_EXCARD_D2R_P T29_LSEO_LSOE2 DP_IG_HPD NO_TEST=TRUE NC_DPB_EG_AUX_CHP MAKE_BASE=TRUE NO_TEST=TRUE NC_DPB_EG_MLP<3..0> MAKE_BASE=TRUE DPB_EG_ML_N<3..0> NO_TEST=TRUE NC_DPB_EG_AUX_CHN MAKE_BASE=TRUE NC_DPB_EG_DDC_DATA NC_PCIE_EXCARD_R2D_C_N TRUE MAKE_BASE=TRUE NC_DP_IG_MLP<3..0> MAKE_BASE=TRUE NO_TEST=TRUE NO_TEST=TRUE NC_DPB_EG_MLN<3..0> MAKE_BASE=TRUE NO_TEST=TRUE NC_DPB_EG_DDC_CLK MAKE_BASE=TRUE DP_EG_AUXCH_N FW643_WAKE_L NC_DPB_EG_DDC_DATA NO_TEST=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE TRUE NC_PCH_GPIO65_CLKOUTFLEX1 NC_DP_IG_MLN<3..0> MAKE_BASE=TRUE NO_TEST=TRUE LCD_BKLT_EN DP_EG_AUXCH_P NC_DPB_EG_DDC_CLK NC_DPB_EG_AUX_CHN JTAG_ISP_TCK USB_T29A_P TRUE MAKE_BASE=TRUE NC_PCH_GPIO64_CLKOUTFLEX0 USB_T29A_N MAKE_BASE=TRUE USB_SDCARD_N MAKE_BASE=TRUE USB_SDCARD_P USB_EXTC_P USB_EXTC_N =PEG_R2D_C_P<7..0> MAKE_BASE=TRUE JTAG_ISP_TCK NC_PCH_GPIO65_CLKOUTFLEX1 NC_RT_GAIN_TP NO_TEST=TRUE MAKE_BASE=TRUE NC_PCIE_EXCARD_D2R_P MAKE_BASE=TRUE TRUE NC_USB_HUB2_OCS4 MAKE_BASE=TRUE USB_SDCARD_P USB_SDCARD_N PP3V3_S3 NC_FSB_CLK133M_PCHP MAKE_BASE=TRUE GMUX_VSYNC T29_LSEO_LSOE3 MAKE_BASE=TRUE PM_ALL_GPU_PGOOD TP_LVDS_MUX_SEL_EG NO_TEST=TRUE MAKE_BASE=TRUE =PEG_D2R_N<15..12> =PEG_D2R_P<15..12> TP_LVDS_IG_B_CLKN MAKE_BASE=TRUE MAKE_BASE=TRUE TP_LVDS_IG_B_CLKP T29_LSEO_LSOE2 MAKE_BASE=TRUE NO_TEST=TRUE NC_PEG_R2D_C_N<15..12> JTAG_ISP_TDO NC_PEG_R2D_C_P<15..12> NO_TEST=TRUE MAKE_BASE=TRUE NO_TEST=TRUE NC_LVDS_IG_A_DATAN<3> MAKE_BASE=TRUE MAKE_BASE=TRUE NC_LVDS_IG_A_DATAP<3> NO_TEST=TRUE NC_PEG_D2R_N<15..12> NO_TEST=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE PCIE_T29_R2D_C_N<3..0> NO_TEST=TRUE MAKE_BASE=TRUE NC_T29_D2RN<3..2> NC_T29_R2D_CP<3..2> NO_TEST=TRUE MAKE_BASE=TRUE GND NC_USB_HUB1_OCS4 MAKE_BASE=TRUE MAKE_BASE=TRUE NC_GPU_XTALOUT NO_TEST=TRUE NC_PCIE_CLK100M_EXCARD_N T29_R2D_C_P<3..2> T29_LSEO_LSOE3 MAKE_BASE=TRUE NO_TEST=TRUE JTAG_ISP_TDI MAKE_BASE=TRUE MAKE_BASE=TRUE PEG_D2R_P<7..0> =PEG_R2D_C_N<7..0> NC_LVDS_IG_B_DATAN<3> NO_TEST=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE FW643_WAKE_L T29_D2R_P<3..2> PEX_CLKREQ_L GND GND MAKE_BASE=TRUE EG_RESET_L LVDS_IG_BKL_ON MAKE_BASE=TRUE MAKE_BASE=TRUE PEG_D2R_N<7..0> =PEG_D2R_P<7..0> NO_TEST=TRUE NC_FSB_CLK133M_PCHN MAKE_BASE=TRUE NO_TEST=TRUE NC_FSB_CLK133M_PCHP MAKE_BASE=TRUE T29_D2R_N<3..2> NC_SW_GAIN_TP NO_TEST=TRUE MAKE_BASE=TRUE JTAG_ISP_TDI TP_LVDS_MUX_SEL_EG NC_T29_R2D_CN<3..2> MAKE_BASE=TRUE NO_TEST=TRUE TP_SMC_EXCARD_PWR_EN MAKE_BASE=TRUE NC_PCIE_EXCARD_D2R_N NC_PCIE_EXCARD_R2D_C_P NC_PCIE_EXCARD_R2D_C_N =PEG_D2R_N<11..8> TP_CPU_VTT_SELECT GFXIMVP_VID<0..6> CPUIMVP_VID<0..6> MAKE_BASE=TRUE TP_CPU_VTT_SELECT MAKE_BASE=TRUE PEG_CLKREQ_L GND_CHASSIS_AUDIO_JACK MAKE_BASE=TRUE PEX_CLKREQ_L PPVOUT_S0_LCDBKLT MAKE_BASE=TRUE MEMVTT_EN MAKE_BASE=TRUE MAKE_BASE=TRUE CPU_VID<0..6> GFX_VID<0..6> MAKE_BASE=TRUE =PEG_R2D_C_P<15..12> =PEG_D2R_P<11..8> =PEG_R2D_C_P<11..8> LVDS_IG_BKL_ON PEG_CLKREQ_L GMUX_VSYNC LVDS_IG_PANEL_PWR =PEG_R2D_C_N<15..12> MAKE_BASE=TRUE NC_PEG_D2R_P<15..12> NO_TEST=TRUE NC_LVDS_IG_B_DATAP<3> NO_TEST=TRUE MAKE_BASE=TRUE NC_LVDS_IG_B_DATAN<3> MEMVTT_EN NC_USB_HUB2_OCS4 TP_LVDS_IG_B_CLKP NC_LVDS_IG_B_DATAP<3> NC_LVDS_IG_A_DATAN<3> NC_LVDS_IG_A_DATAP<3> TP_LVDS_IG_BKL_PWM TP_LVDS_IG_B_CLKN MAKE_BASE=TRUE PEG_R2D_C_N<7..0> MAKE_BASE=TRUE NO_TEST=TRUE NC_T29_D2RP<3..2> MAKE_BASE=TRUE PCIE_T29_D2R_N<3..0> GND NC_PCH_GPIO64_CLKOUTFLEX0 PP5V_S0_AUDIO_AMP_R PP5V_S0 GND PM_ALL_GPU_PGOOD JTAG_ISP_TCK T29_LSEO_LSOE2 NO_TEST=TRUE MAKE_BASE=TRUE T29_LSEO_LSOE3 PP3V3_S3 NC_FSB_CLK133M_PCHN PP5V_S0_AUDIO_AMP_L FW_PLUG_DET_L MAKE_BASE=TRUE LVDS_IG_PANEL_PWR MAKE_BASE=TRUE NC_SW_GAIN_TP MAKE_BASE=TRUE TP_LVDS_IG_BKL_PWM NC_GPU_XTALOUT NC_USB_HUB1_OCS4 PP3V3_S3 EG_RESET_L =PEG_D2R_N<7..0> =PEG_R2D_C_N<11..8> MAKE_BASE=TRUE PCIE_T29_R2D_C_P<3..0> PCIE_T29_D2R_P<3..0> MAKE_BASE=TRUE T29_R2D_C_N<3..2> TRUE MAKE_BASE=TRUE NC_PCIE_EXCARD_D2R_N DP_EG_AUXCH_P MAKE_BASE=TRUE MAKE_BASE=TRUE DP_EG_AUXCH_N FW_PLUG_DET_L MAKE_BASE=TRUE PM_ENET_EN MAKE_BASE=TRUE DP_IG_AUX_CH_N NC_PEG_B_CLKRQ_L_GPIO56 TRUE MAKE_BASE=TRUE DP_IG_AUX_CH_P MAKE_BASE=TRUE NC_PCH_GPIO66_CLKOUTFLEX2 TRUE MAKE_BASE=TRUE NC_PCH_GPIO67_CLKOUTFLEX3 TRUE MAKE_BASE=TRUE NC_RT_GAIN_TP NC_LT_GAIN_TP NC_PCH_GPIO67_CLKOUTFLEX3 NC_PCIE_CLK100M_EXCARD_P TP_ISSP_SDATA_P1_0 NC_PCIE_EXCARD_R2D_C_P TRUE MAKE_BASE=TRUE NC_PCIE_CLK100M_EXCARD_P MAKE_BASE=TRUE TRUE PM_ENET_EN PPVOUT_S0_LCDBKLT MAKE_BASE=TRUE TP_ISSP_SDATA_P1_0 T29_A_BIAS_R T29_A_BIAS_R T29_A_BIAS_R NC_PCIECLKRQ4_L_GPIO26 MAKE_BASE=TRUE TRUE NC_PCIECLKRQ4_L_GPIO26 T29_A_BIAS_R2D_N1 NC_PCH_CLKOUT_DPP TRUE MAKE_BASE=TRUE T29_A_BIAS_D2R_P1 NC_PEG_B_CLKRQ_L_GPIO56 T29_A_BIAS_R PP5V_S0_AUDIO PP5V_S0_AUDIO MAKE_BASE=TRUE NO_TEST=TRUE NC_LT_GAIN_TP MAKE_BASE=TRUE NC_PCH_GPIO66_CLKOUTFLEX2 T29_A_BIAS_R2D_P0 T29_A_BIAS_R2D_N0 T29_A_BIAS_R2D_P1 GND T29_A_BIAS_R T29_A_BIAS_D2R_N1 DPB_EG_ML_P<3..0> NC_DPB_EG_AUX_CHP TP_ISSP_SCLK_P1_1 GND GND TP_ISSP_SCLK_P1_1 MAKE_BASE=TRUE NC_PCH_CLKOUT_DPN NC_PCH_CLKOUT_DPP PP15V_T29 MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.095 mm VOLTAGE=0V GND 9 OF 132 8 OF 101 8 85 8 17 79 83 8 17 83 8 17 79 83 8 17 83 92 84 84 8 17 79 83 8 16 8 17 83 92 8 17 79 83 8 16 93 8 73 90 8 19 33 87 6 7 35 39 48 49 62 63 88 8 16 8 33 8 17 83 8 8 8 8 16 17 8 8 78 83 97 8 38 39 8 8 16 17 87 88 8 78 83 97 8 8 8 19 23 33 87 24 92 8 16 24 92 8 24 8 24 24 92 24 92 9 8 19 23 33 87 8 16 8 8 16 8 24 8 24 8 24 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 8 8 87 88 8 33 8 73 81 86 87 89 8 87 6 8 18 6 8 18 8 33 9 8 19 33 87 9 8 18 92 8 18 92 9 33 93 33 33 8 24 8 8 16 93 95 8 19 33 87 73 90 9 8 18 8 38 39 95 8 79 87 8 73 87 8 18 87 73 90 9 8 8 95 8 8 19 33 87 8 87 33 8 8 16 8 16 8 16 8 90 8 90 8 16 87 60 8 79 87 6 8 82 88 100 8 29 66 90 90 8 18 87 8 16 87 8 87 88 8 18 87 9 8 18 8 18 8 29 66 8 24 6 8 18 8 18 8 18 92 8 18 92 6 8 18 6 8 18 73 90 33 9 33 93 8 16 59 6 7 22 41 46 51 53 64 67 68 69 71 72 86 88 101 8 73 81 86 87 89 8 19 23 33 87 8 33 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 8 59 8 19 39 8 18 87 8 6 8 18 8 8 24 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 8 73 87 9 9 33 93 9 33 93 95 8 16 8 78 83 97 8 19 39 8 8 17 83 92 8 8 17 83 92 8 16 8 16 8 8 8 16 8 16 93 6 8 52 8 16 8 16 93 8 6 8 82 88 100 6 8 52 8 85 8 85 8 85 8 8 84 8 16 85 8 8 85 8 56 8 56 8 8 16 84 84 84 8 85 85 8 6 8 52 6 8 52 8 16 8 16 7 35 85
IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT EDP_HPD EDP_COMPIO EDP_ICOMPO EDP_AUX* EDP_AUX EDP_TX_3 EDP_TX_2 EDP_TX_1 EDP_TX_0 EDP_TX_3* EDP_TX_2* EDP_TX_1* EDP_TX_0* DMI_TX_3* FDI1_LSYNC FDI0_LSYNC FDI_TX_3 FDI0_FSYNC FDI1_FSYNC FDI_INT FDI_TX_1 FDI_TX_0 FDI_TX_2 FDI_TX_3* FDI_TX_2* FDI_TX_1* DMI_TX_1* DMI_TX_2* DMI_TX_0 DMI_TX_2 DMI_TX_1 DMI_TX_3 FDI_TX_0* DMI_RX_2* DMI_RX_0 DMI_RX_1 DMI_RX_2 DMI_RX_3 DMI_TX_0* DMI_RX_3* DMI_RX_1* DMI_RX_0* PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RX_2* PEG_RX_0* PEG_RX_1* PEG_RX_3* PEG_RX_4* PEG_RX_5* PEG_RX_7* PEG_RX_6* PEG_RX_8* PEG_RX_9* PEG_RX_10* PEG_RX_12* PEG_RX_11* PEG_RX_14* PEG_RX_13* PEG_RX_15* PEG_RX_0 PEG_RX_1 PEG_RX_3 PEG_RX_2 PEG_RX_4 PEG_RX_6 PEG_RX_5 PEG_RX_7 PEG_RX_8 PEG_RX_10 PEG_RX_9 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 PEG_TX_1* PEG_TX_2* PEG_TX_0* PEG_TX_3* PEG_TX_4* PEG_TX_5* PEG_TX_7* PEG_TX_6* PEG_TX_10* PEG_TX_8* PEG_TX_9* PEG_TX_11* PEG_TX_12* PEG_TX_13* PEG_TX_14* PEG_TX_15* PEG_TX_1 PEG_TX_0 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_6 PEG_TX_5 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_14 PEG_TX_13 PEG_TX_15 FDI_TX_4* FDI_TX_5* FDI_TX_6* FDI_TX_7* FDI_TX_4 FDI_TX_5 FDI_TX_6 FDI_TX_7 (SYM 1 OF 11) DMI EMBEDDED DISPLAY PORT PCI EXPRESS BASED INTERFACE SIGNALS INTEL FLEXIBLE DISPLAY INTERFACE SIGNALS RSVD_96 RSVD_95 RSVD_94 RSVD_93 RSVD_92 RSVD_91 RSVD_90 RSVD_97 RSVD_38 RSVD_39 RSVD_40 RSVD_36 RSVD_41 RSVD_42 RSVD_43 RSVD_45 RSVD_44 RSVD_48 RSVD_49 RSVD_50 RSVD_47 RSVD_46 RSVD_53 RSVD_52 RSVD_51 RSVD_55 RSVD_54 RSVD_57 RSVD_59 RSVD_60 RSVD_58 RSVD_56 RSVD_61 RSVD_63 RSVD_62 RSVD_65 RSVD_64 RSVD_66 RSVD_67 RSVD_69 RSVD_70 RSVD_68 RSVD_71 RSVD_72 RSVD_79 RSVD_80 RSVD_81 RSVD_78 RSVD_82 RSVD_83 RSVD_84 RSVD_86 RSVD_85 RSVD_89 RSVD_88 RSVD_87 CFG_4 CFG_3 CFG_2 CFG_1 CFG_0 CFG_9 CFG_8 CFG_7 CFG_6 CFG_5 CFG_14 CFG_13 CFG_12 CFG_11 CFG_10 CFG_15 CFG_16 CFG_17 RSVD_1 RSVD_5 RSVD_6 RSVD_4 RSVD_3 RSVD_2 RSVD_10 RSVD_11 RSVD_9 RSVD_8 RSVD_7 RSVD_15 RSVD_16 RSVD_14 RSVD_13 RSVD_12 RSVD_20 RSVD_19 RSVD_18 RSVD_17 RSVD_25 RSVD_26 RSVD_24 RSVD_22 RSVD_23 RSVD_31 RSVD_30 RSVD_29 RSVD_28 RSVD_27 RSVD_32 RSVD_33 RSVD_34 RSVD_35 (5 OF 11) RESERVED OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN BI BI NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 CFG [7] :PEG DEFER TRAINING 1 = (DEFAULT) IMMEDIATELY AFTER xxRESETB 0 = WAIT FOR BIOS (IPU) 10K PU disables eDP HPD FOR SANDYBRIDGE PROCESSOR (IPU) (IPU) (IPU) (IPU) (IPU) Intel is investigating processor driven VREF_DQ generation. (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (DDR_VREF0) (DDR_VREF1) (THERMDA) (THERMDC) NOTE: This connection is to support the same. (IPU) CFG [4] :eDP ENABLE/DISABLE 1 = DISABLED 0 = ENABLED CFG [3] :PCIE x4 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED CFG [2] :PCIE x16 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED CFG [6:5] :PCIE BIFURCATION 11 = 1 X16 (DEFAULT) 10 = 2 X8 01 = RSVD 00 = X8, X4, X4 CPU_CFG<4> should be pulled down to enable EDP These can be Placed close to J2500 and Only for debug access 17 90 6 17 90 17 90 17 90 17 90 6 17 90 17 90 17 90 17 90 17 90 17 90 17 90 17 90 17 90 17 90 17 90 8 8 8 8 8 8 33 93 8 33 93 8 33 93 8 33 93 8 8 8 8 8 8 8 8 8 8 8 8 8 33 93 8 33 93 8 33 93 8 8 8 8 33 93 8 8 8 8 8 8 8 8 8 8 33 93 8 33 93 8 33 93 8 8 8 8 8 8 8 8 33 93 8 8 8 8 8 8 8 8 33 93 8 8 8 8 8 33 93 8 33 93 8 33 93 8 24.9 1/16W 402 MF-LF 1% R1010 1 2 OMIT MOBILE-REV1 SANDY-BRIDGE BGA U1000 N8 N10 T9 R10 R6 R8 U8 U10 N2 N4 R2 R4 P3 P1 T5 U6 AE4 AE2 AC2 AE8 AB1 AG4 AG2 AF3 AF1 AF7 AE6 AG8 AG6 AC8 AB7 AA2 AB3 AD9 W6 V7 W10 W8 Y9 AA8 AA10 AC10 U2 U4 W4 W2 V3 V1 AA6 Y5 G2 H1 F3 G22 F23 K23 H23 F11 H11 K11 J12 F9 E8 H9 G10 H7 J8 G6 F7 K21 H21 F19 H19 K19 J20 H17 G18 K15 K17 G14 F15 J16 H15 K13 H13 C22 A22 D23 B23 B13 D13 C10 A10 D11 B11 B9 D9 D7 B7 F13 E12 A18 C18 B21 D21 D19 B19 F21 E20 C14 A14 B17 D17 D15 B15 F17 E16 OMIT MOBILE-REV1 BGA SANDY-BRIDGE U1000 B57 D57 F55 K55 F57 E58 H57 H55 D53 K57 B55 A54 A58 D55 C56 E54 J54 G56 BB17 AW46 BG26 BB25 BG34 BH35 BJ34 BF35 BF41 BH43 BJ42 AY17 BF43 AW50 BB57 BF63 AD5 AH5 AJ6 BF3 BG4 BD29 BD19 AY45 AY41 BG62 BB43 D49 B53 G52 G64 BD33 AJ10 BE6 AA4 AC4 AC6 C52 D3 C4 C24 D25 BC30 B25 K47 H47 F5 K9 H5 L10 G4 K7 K5 BE32 M9 L6 J2 L2 P7 M5 J4 L4 N6 G48 AW42 K49 H49 J50 AY13 BB13 BA48 BB15 AY15 AW14 BD13 BA16 BE16 BD15 BC14 BF19 BH19 BC42 BF21 BH21 BF23 BH23 BF25 BH25 BJ22 BG22 1% MF-LF 402 1/16W 1K R1020 1 2 1% 1/16W MF-LF 402 1K R1022 1 2 NOSTUFF MF-LF 5% 0 1/16W 402 R1021 1 2 NOSTUFF 402 1/16W MF-LF 5% 0 R1023 1 2 17 90 6 17 90 17 90 17 90 17 90 17 90 17 90 17 90 17 90 6 17 90 17 90 17 90 17 90 17 90 17 90 17 90 6 17 90 6 17 90 6 17 90 6 17 90 6 17 90 PLACE_NEAR=U1000.AB1:12.7mm MF-LF 24.9 402 1% 1/16W R1030 1 2 10K 1/16W 1% 402 MF-LF R1031 1 2 50 98 50 98 1/16W MF-LF 5% 402 1K NOSTUFF R1047 1 2 NOSTUFF 1K 1/16W 5% 402 MF-LF R1046 1 2 1/16W 5% 402 MF-LF 1K R1045 1 2 EDP 402 1K MF-LF 1/16W 5% R1044 1 2 NOSTUFF 5% 1/16W 402 MF-LF 1K R1042 1 2 1/16W MF-LF 5% 402 1K NOSTUFF R1040 1 2 1/16W MF-LF 5% 402 1K NOSTUFF R1041 1 2 1/16W MF-LF 5% 402 1K NOSTUFF R1043 1 2 1/16W MF-LF 5% 402 1K NOSTUFF R1049 1 2 CPU DMI/PEG/FDI/RSVD CPU_EDP_COMP TP_EDP_TX_N<2> CPU_CFG<7> CPU_CFG<16> CPU_CFG<3> CPU_CFG<1> CPU_CFG<0> CPU_CFG<6> NC_PEG_R2D_C_P<14> CPU_CFG<5> TP_EDP_AUX_N TP_EDP_TX_N<3> TP_EDP_TX_N<1> FDI_DATA_N<2> FDI_DATA_N<6> FDI_DATA_P<5> CPU_CFG<2> CPU_CFG<5> CPU_CFG<6> CPU_CFG<8> CPU_CFG<7> NC_PEG_D2R_P<12> =PEG_D2R_P<3> CPU_MEM_VREFDQ_B PCIE_T29_D2R_P<2> =PEG_D2R_P<4> =PEG_D2R_P<1> =PEG_D2R_P<2> CPU_MEM_VREFDQ_A =PEG_R2D_C_N<4> FDI_DATA_P<3> PCIE_T29_R2D_C_P<1> =PEG_R2D_C_P<7> NC_PEG_D2R_N<13> FDI_DATA_P<4> DMI_N2S_P<0> PCIE_T29_R2D_C_N<0> =PEG_R2D_C_N<6> CPU_THERMD_N CPU_THERMD_P PCIE_T29_R2D_C_N<1> =PEG_R2D_C_N<3> NC_PEG_R2D_C_N<14> =PEG_R2D_C_P<2> =PEG_R2D_C_N<7> FDI_DATA_P<7> FDI_DATA_N<5> FDI_DATA_N<0> NC_PEG_R2D_C_N<15> TP_EDP_AUX_P NC_PEG_D2R_P<13> PCIE_T29_R2D_C_N<3> PCIE_T29_D2R_P<1> PCIE_T29_D2R_P<3> PCIE_T29_R2D_C_P<2> NC_PEG_R2D_C_N<12> =PEG_R2D_C_P<4> NC_PEG_R2D_C_P<12> NC_PEG_D2R_P<14> =PEG_R2D_C_P<0> =PEG_R2D_C_N<2> PCIE_T29_R2D_C_N<2> CPU_CFG<1> CPU_CFG<10> CPU_CFG<4> =PEG_R2D_C_P<1> FDI_DATA_N<1> DMI_S2N_P<1> =PEG_D2R_P<6> PP0V75_S3_MEM_VREFDQ_B DMI_S2N_P<3> DMI_N2S_N<1> NC_PEG_R2D_C_P<15> PP0V75_S3_MEM_VREFDQ_A DMI_N2S_N<0> DMI_N2S_P<1> DMI_N2S_P<2> DMI_N2S_P<3> FDI_DATA_N<3> FDI_DATA_N<7> FDI_DATA_P<6> FDI_DATA_P<2> FDI_DATA_P<1> FDI_DATA_P<0> DMI_N2S_N<3> DMI_S2N_P<0> DMI_S2N_N<0> CPU_CFG<12> CPU_CFG<16> CPU_CFG<9> CPU_CFG<0> CPU_CFG<17> PCIE_T29_R2D_C_P<0> =PEG_R2D_C_N<5> CPU_CFG<15> CPU_CFG<14> CPU_CFG<13> CPU_CFG<11> =PEG_R2D_C_P<3> =PEG_R2D_C_P<5> =PEG_R2D_C_P<6> PCIE_T29_R2D_C_P<3> NC_PEG_R2D_C_P<13> CPU_CFG<2> CPU_CFG<4> FDI_DATA_N<4> DMI_N2S_N<2> DMI_S2N_N<3> DMI_S2N_N<1> DMI_S2N_P<2> NC_PEG_D2R_N<14> =PEG_D2R_P<5> =PEG_D2R_P<0> NC_PEG_D2R_N<15> PCIE_T29_D2R_N<0> PCIE_T29_D2R_N<1> PCIE_T29_D2R_N<2> PCIE_T29_D2R_N<3> =PEG_D2R_N<7> NC_PEG_D2R_N<12> DMI_S2N_N<2> NC_PEG_R2D_C_N<13> TP_EDP_TX_N<0> CPU_CFG<3> =PEG_D2R_N<4> =PEG_D2R_N<0> CPU_PEG_COMP NC_PEG_D2R_P<15> =PEG_R2D_C_N<0> =PEG_R2D_C_N<1> FDI_LSYNC<1> PP1V05_S0 FDI_INT FDI_FSYNC<1> FDI_FSYNC<0> PCIE_T29_D2R_P<0> PP1V05_S0 =PEG_D2R_N<1> =PEG_D2R_N<2> =PEG_D2R_N<3> =PEG_D2R_N<5> =PEG_D2R_N<6> FDI_LSYNC<0> TP_EDP_TX_P<0> TP_EDP_TX_P<1> TP_EDP_TX_P<2> TP_EDP_TX_P<3> CPU_EDP_HPD =PEG_D2R_P<7> 10 OF 132 9 OF 101 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 23 90 9 23 90 9 23 90 23 90 9 23 90 28 30 26 30 23 9 23 90 23 90 9 23 90 23 90 23 23 23 23 90 9 23 90 9 23 90 9 23 90 90 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101
BI BI BI BI BI IN IN OUT IN IN OUT OUT BI DDR3 MISC PWR MGMT JTAG & BPM CLOCKS THERMAL (2 OF 11) PROC_SELECT* PROC_DETECT* SM_RCOMP_2 SM_RCOMP_1 SM_RCOMP_0 SM_VREF SM_DRAMRST* SM_DRAMPWROK PM_SYNC PREQ* TMS TRST* TDI TDO DBR* BPM_0* BPM_1* BPM_2* BPM_3* BPM_4* BPM_5* BPM_6* BPM_7* TCK PRDY* BCLK_ITP BCLK_ITP* UNCOREPWRGOOD RESET* THERMTRIP* CATERR* PECI PROCHOT* BCLK BCLK* DPLL_REF_CLK DPLL_REF_CLK* NC OUT BI IN OUT IN IN IN OUT IN IN IN IN IN OUT BI BI BI II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 Unused eDP CLK (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPD) (IPU) (IPU) (IPU) (IPU) (IPU) R1120 and R1121 are Intel recommended values 23 90 23 90 23 90 23 90 23 90 PLACE_NEAR=U1800.AY11:157mm MF-LF 402 1/16W 5% 10K R1111 1 2 17 29 90 19 23 90 29 16 90 16 90 17 90 19 90 19 44 90 1/16W MF-LF 1% 402 75 R11261 2 SANDY-BRIDGE OMIT BGA MOBILE-REV1 U1000 D5 C6 K63 K65 C62 D61 E62 F63 D59 F61 F59 G60 H53 H61 AJ4 AJ2 F53 K53 J62 H65 B59 AH9 H51 K51 AY25 BE24 BJ46 BG46 BF45 BJ44 J58 K61 K59 F51 H59 H63 C60 PLACE_NEAR=U1000.BF45:12.7mm 1/16W 200 402 MF-LF 1% R1114 1 2 PLACE_NEAR=U1000.BG46:12.7mm MF-LF 1/16W 402 25.5 1% R1113 1 2 402 1/16W MF-LF 140 1% PLACE_NEAR=U1000.BJ46:12.7mm R1112 1 2 90 1/16W 402 5% MF-LF 68 R1101 1 2 NOSTUFF 402 MF-LF 1/16W 100 1% PLACE_NEAR=U1000.BJ44:2.54mm R11301 2 NOSTUFF MF-LF 402 1/16W 100 1% PLACE_NEAR=U1000.BJ44:2.54mm R11311 2 NOSTUFF X5R 402 PLACE_NEAR=U1000.BJ44:2.54mm 10% 0.1UF 16V C1130 1 2 MF-LF 402 1K 5% 1/16W R1141 1 2 1K 5% 1/16W MF-LF 402 R1140 1 2 402 5% 56 1/16W MF-LF R1103 1 2 45 67 90 NOSTUFF 1K 201 1/20W MF 5% R11001 2 23 90 23 90 23 90 23 90 23 90 23 90 23 90 PLACE_NEAR=R1121.2:1mm 1/16W 1% 402 MF-LF 200 R11201 2 PLACE_NEAR=U1000.AY25:51.562mm 402 1% MF-LF 1/16W 130 R1121 1 2 16 90 16 90 17 90 5% 1/16W NOSTUFF 402 MF-LF 51 R1104 1 2 1% 402 43.2 MF-LF 1/16W R1125 1 2 23 25 201 1/20W MF NOSTUFF 1K 5% R1102 1 2 23 25 90 23 90 23 90 23 90 CPU CLOCK/MISC/JTAG PP1V05_S0 CPU_CATERR_L CPU_DDR_VREF CPU_SM_RCOMP<0> PM_MEM_PWRGD_R CPU_PWRGD PM_SYNC PLT_RESET_LS1V1_L CPU_PROCHOT_R_L CPU_PECI PP1V05_S0 CPU_SM_RCOMP<2> PLT_RST_CPU_BUF_L XDP_BPM_L<7> XDP_BPM_L<6> XDP_BPM_L<4> XDP_BPM_L<3> XDP_BPM_L<2> PP1V5_S3RS0_CPUDDR PM_THRMTRIP_L CPU_PROC_SEL_L XDP_BPM_L<0> XDP_CPU_PRDY_L PP1V5_S3RS0_CPUDDR XDP_BPM_L<1> XDP_DBRESET_L XDP_CPU_TDO XDP_CPU_TRST_L XDP_CPU_PREQ_L ITPCPU_CLK100M_N XDP_CPU_TMS XDP_CPU_TCK XDP_CPU_TDI XDP_BPM_L<5> CPU_PROCHOT_L PP1V05_S0 DMI_CLK100M_CPU_N DMI_CLK100M_CPU_P PP1V05_S0_CPU_VCCPQE ITPCPU_CLK100M_P DPLL_REF_CLK_L DPLL_REF_CLK CPU_MEM_RESET_L PM_MEM_PWRGD CPU_SM_RCOMP<1> 11 OF 132 10 OF 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 7 10 13 15 29 71 72 7 10 13 15 29 71 72 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 7 12 14
BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT SA_CAS* SA_RAS* SA_WE* SA_DQ_63 SA_DQ_62 SA_DQ_61 SA_DQ_60 SA_DQ_59 SA_DQ_58 SA_DQ_57 SA_BS_2 SA_BS_1 SA_BS_0 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_56 SA_DQ_55 SA_DQ_54 SA_DQ_53 SA_DQ_52 SA_DQ_51 SA_DQ_50 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_36 SA_DQ_32 SA_DQ_33 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_34 SA_DQ_35 SA_DQ_26 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_9 SA_DQ_8 SA_DQ_7 SA_DQ_6 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_0 SA_CK_1 SA_CK_0 SA_CKE_1 SA_CKE_0 SA_CK_1* SA_CK_0* SA_CS_1* SA_CS_0* SA_ODT_1 SA_ODT_0 SA_DQS_0* SA_DQS_1* SA_DQS_2* SA_DQS_3* SA_DQS_4* SA_DQS_5* SA_DQS_6* SA_DQS_7* SA_DQS_0 SA_DQS_1 SA_DQS_3 SA_DQS_2 SA_DQS_5 SA_DQS_4 SA_DQS_6 SA_DQS_7 SA_MA_0 SA_MA_1 SA_MA_3 SA_MA_2 SA_MA_5 SA_MA_4 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_11 SA_MA_10 SA_MA_12 SA_MA_14 SA_MA_13 SA_MA_15 MEMORY CHANNEL A (SYM 3 OF 11) SB_CK_1* SB_DQ_33 SB_CAS* SB_RAS* SB_WE* SB_BS_0 SB_BS_1 SB_BS_2 SB_CK_0 SB_CK_0* SB_CK_1 SB_CKE_0 SB_CKE_1 SB_DQ_0 SB_DQ_1 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_2 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_3 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_4 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_5 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_6 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_CS_0* SB_CS_1* SB_ODT_1 SB_ODT_0 SB_DQS_0* SB_DQS_1* SB_DQS_2* SB_DQS_3* SB_DQS_4* SB_DQS_5* SB_DQS_6* SB_DQS_7* SB_DQS_0 SB_DQS_2 SB_DQS_1 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_7 SB_DQS_6 SB_MA_1 SB_MA_0 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_8 SB_MA_7 SB_MA_10 SB_MA_11 SB_MA_9 SB_MA_13 SB_MA_12 SB_MA_15 SB_MA_14 (SYM 4 OF 11) MEMORY CHANNEL B OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 26 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 28 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 SANDY-BRIDGE MOBILE-REV1 BGA OMIT U1000 BA36 BC38 BB19 BE44 BB31 BA32 AW34 AY33 BC18 BD17 BD41 BD45 AL6 AL8 AV7 AY5 AT5 AR6 AW6 AT9 BA6 BA8 BG6 AY9 AP7 AW8 BB7 BC8 BE4 AW12 AV11 BB11 BA12 BE8 BA10 AM5 BD11 BE12 BB49 AY49 BE52 BD51 BD49 BE48 BA52 AY51 AK7 BC54 AY53 AW54 AY55 BD53 BB53 BE56 BA56 BD57 BF61 AL10 BA60 BB61 BE60 BD63 BB59 BC58 AW58 AY59 AL60 AP61 AN10 AW60 AY57 AN60 AR60 AM9 AR10 AR8 AN6 AN8 AU8 AU6 BD5 BC6 BC10 BD9 BB51 BC50 BD55 BB55 BD61 BD59 AV61 AU60 BD27 BA28 AW38 AW22 BA20 BB45 BE20 AW18 BB27 AW26 BB23 BA24 AY21 BD21 BC22 BB21 BB41 BC46 BE36 BA44 BGA MOBILE-REV1 SANDY-BRIDGE OMIT U1000 BJ38 BD37 AY29 BH39 BF33 BH33 BF37 BH37 BD25 BJ26 BE40 BH41 AL4 AK3 BA4 BB1 AV1 AU2 BA2 BB3 BC2 BF7 BF11 BJ10 AP3 BC4 BH7 BH11 BG10 BJ14 BG14 BF17 BJ18 BF13 BH13 AR2 BH17 BG18 BH49 BF47 BH53 BG50 BF49 BH47 BF53 BJ50 AL2 BF55 BH55 BJ58 BH59 BJ54 BG54 BG58 BF59 BA64 BC62 AK1 AU62 AW64 BA62 BC64 AU64 AW62 AR64 AT65 AL64 AM65 AP1 AR62 AT63 AL62 AM63 AR4 AV3 AU4 AN2 AN4 AW4 AW2 BF9 BH9 BH15 BF15 BH51 BF51 BF57 BH57 AY65 AY63 AN64 AN62 BF31 BH31 AY37 BJ30 AW30 BA40 BB29 BE28 BB37 BC34 BF27 BB33 BH27 BG30 BH29 BF29 BG42 BH45 BG38 BF39 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 26 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 26 27 91 6 27 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 28 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 28 91 6 27 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 SYNC_DATE=06/15/2010 CPU DDR3 INTERFACES MEM_B_DQS_N<2> MEM_B_A<15> MEM_B_A<14> MEM_B_A<13> MEM_B_A<12> MEM_B_A<11> MEM_B_A<10> MEM_B_A<9> MEM_B_A<8> MEM_B_A<7> MEM_B_A<6> MEM_B_A<5> MEM_B_A<4> MEM_B_A<3> MEM_B_A<2> MEM_B_A<1> MEM_B_A<0> MEM_B_DQS_P<7> MEM_B_DQS_P<6> MEM_B_DQS_P<5> MEM_B_DQS_P<4> MEM_B_DQS_P<3> MEM_B_DQS_P<2> MEM_B_DQS_P<1> MEM_B_DQS_P<0> MEM_B_DQS_N<7> MEM_B_DQS_N<6> MEM_B_DQS_N<5> MEM_B_DQS_N<4> MEM_B_DQS_N<3> MEM_B_DQS_N<1> MEM_B_DQS_N<0> MEM_B_ODT<1> MEM_B_ODT<0> MEM_B_CS_L<1> MEM_B_CS_L<0> MEM_B_DQ<1> MEM_B_DQ<3> MEM_B_DQ<2> MEM_B_DQ<5> MEM_B_DQ<7> MEM_B_DQ<9> MEM_B_CKE<1> MEM_B_CLK_N<1> MEM_B_CLK_P<1> MEM_B_CKE<0> MEM_B_CLK_N<0> MEM_B_CLK_P<0> MEM_B_WE_L MEM_B_RAS_L MEM_B_CAS_L MEM_B_BA<2> MEM_B_BA<1> MEM_B_DQ<63> MEM_B_DQ<62> MEM_B_DQ<61> MEM_B_DQ<60> MEM_B_BA<0> MEM_B_DQ<59> MEM_B_DQ<58> MEM_B_DQ<57> MEM_B_DQ<56> MEM_B_DQ<55> MEM_B_DQ<54> MEM_B_DQ<53> MEM_B_DQ<52> MEM_B_DQ<51> MEM_B_DQ<50> MEM_B_DQ<49> MEM_B_DQ<48> MEM_B_DQ<47> MEM_B_DQ<46> MEM_B_DQ<45> MEM_B_DQ<44> MEM_B_DQ<43> MEM_B_DQ<42> MEM_B_DQ<41> MEM_B_DQ<40> MEM_B_DQ<39> MEM_B_DQ<38> MEM_B_DQ<37> MEM_B_DQ<36> MEM_B_DQ<35> MEM_B_DQ<34> MEM_B_DQ<33> MEM_B_DQ<32> MEM_B_DQ<31> MEM_B_DQ<30> MEM_B_DQ<29> MEM_B_DQ<28> MEM_B_DQ<27> MEM_B_DQ<26> MEM_B_DQ<25> MEM_B_DQ<24> MEM_B_DQ<23> MEM_B_DQ<22> MEM_B_DQ<21> MEM_B_DQ<20> MEM_B_DQ<19> MEM_B_DQ<18> MEM_B_DQ<17> MEM_B_DQ<16> MEM_B_DQ<15> MEM_B_DQ<14> MEM_B_DQ<13> MEM_B_DQ<12> MEM_B_DQ<11> MEM_B_DQ<10> MEM_B_DQ<8> MEM_B_DQ<6> MEM_B_DQ<4> MEM_B_DQ<0> MEM_A_DQ<61> MEM_A_DQ<60> MEM_A_DQ<59> MEM_A_DQ<56> MEM_A_DQ<54> MEM_A_DQ<53> MEM_A_DQ<38> MEM_A_DQ<24> MEM_A_CLK_P<0> MEM_A_CLK_N<0> MEM_A_A<15> MEM_A_A<13> MEM_A_A<14> MEM_A_A<10> MEM_A_A<11> MEM_A_A<12> MEM_A_A<8> MEM_A_A<9> MEM_A_A<7> MEM_A_A<5> MEM_A_A<6> MEM_A_A<4> MEM_A_A<3> MEM_A_A<2> MEM_A_A<1> MEM_A_A<0> MEM_A_DQS_P<7> MEM_A_DQS_P<6> MEM_A_DQS_P<5> MEM_A_DQS_P<4> MEM_A_DQS_P<3> MEM_A_DQS_P<2> MEM_A_DQS_P<1> MEM_A_DQS_P<0> MEM_A_DQS_N<7> MEM_A_DQS_N<6> MEM_A_DQS_N<5> MEM_A_DQS_N<4> MEM_A_DQS_N<3> MEM_A_DQS_N<2> MEM_A_DQS_N<1> MEM_A_DQS_N<0> MEM_A_ODT<1> MEM_A_ODT<0> MEM_A_CS_L<1> MEM_A_CS_L<0> MEM_A_CKE<1> MEM_A_CLK_N<1> MEM_A_CLK_P<1> MEM_A_CKE<0> MEM_A_DQ<0> MEM_A_DQ<5> MEM_A_DQ<4> MEM_A_DQ<3> MEM_A_DQ<2> MEM_A_DQ<1> MEM_A_DQ<6> MEM_A_DQ<7> MEM_A_DQ<8> MEM_A_DQ<9> MEM_A_DQ<15> MEM_A_DQ<14> MEM_A_DQ<13> MEM_A_DQ<12> MEM_A_DQ<11> MEM_A_DQ<10> MEM_A_DQ<25> MEM_A_DQ<23> MEM_A_DQ<22> MEM_A_DQ<21> MEM_A_DQ<20> MEM_A_DQ<19> MEM_A_DQ<18> MEM_A_DQ<17> MEM_A_DQ<16> MEM_A_DQ<26> MEM_A_DQ<35> MEM_A_DQ<34> MEM_A_DQ<31> MEM_A_DQ<30> MEM_A_DQ<29> MEM_A_DQ<28> MEM_A_DQ<27> MEM_A_DQ<33> MEM_A_DQ<32> MEM_A_DQ<36> MEM_A_DQ<46> MEM_A_DQ<45> MEM_A_DQ<44> MEM_A_DQ<43> MEM_A_DQ<42> MEM_A_DQ<41> MEM_A_DQ<40> MEM_A_DQ<39> MEM_A_DQ<37> MEM_A_DQ<50> MEM_A_DQ<51> MEM_A_DQ<52> MEM_A_DQ<55> MEM_A_DQ<49> MEM_A_DQ<48> MEM_A_DQ<47> MEM_A_BA<0> MEM_A_BA<1> MEM_A_BA<2> MEM_A_DQ<57> MEM_A_DQ<58> MEM_A_DQ<62> MEM_A_DQ<63> MEM_A_WE_L MEM_A_RAS_L MEM_A_CAS_L 12 OF 132 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820-2915.pdf

  • 1. TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 8 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT 3 B 7 ECN REV BRANCH DRAWING NUMBER REVISION SIZE D PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. DRAWING TITLE THE POSESSOR AGREES TO THE FOLLOWING: Apple Inc. SHEET R DATE D A C THE INFORMATION CONTAINED HEREIN IS THE 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. PAGE NOTICE OF PROPRIETARY PROPERTY: A C 3 4 5 6 D B 8 7 6 5 4 2 1 1 2 APPD CK DESCRIPTION OF REVISION TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM DRAWING DESCRIPTION REFERENCE DES BOM OPTION QTY PART NUMBER CRITICAL TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_HEAD REV B RELEASE, 01/31/11 SCHEM,FLYING_DUTCHMAN,MLB,K91F Schematic / PCB #’s ALIASES RESOLVED 1 OF 101 1 OF 132 2010-10-12 50 45 07/12/2010 K91_BEN SMC Support 49 44 07/12/2010 K91_BEN SMC 48 43 04/27/2010 K18_MLB Front Flex Support 46 42 10/08/2010 K91_ERIC External USB Connectors 45 41 11/08/2010 K91_ERIC SATA/IR/SIL Connectors 43 40 06/10/2010 T27_REF FireWire Connector 42 39 06/10/2010 T27_REF FireWire Port & PHY Power 41 38 04/27/2010 K18_MLB FireWire LLC/PHY (FW643) 40 37 05/26/2010 K91_TRINHNI Ethernet Connector 39 36 10/11/2010 K91_ERIC ETHERNET PHY (CAESAR IV) 38 35 10/12/2010 T29_REF T29 Power Support 37 34 10/12/2010 T29_REF T29 Host (2 of 2) 36 33 10/12/2010 T29_REF T29 Host (1 of 2) 35 32 10/08/2010 K91_ERIC SD READER CONNECTOR 34 31 10/08/2010 K91_MARY X19/ALS/CAMERA CONNECTOR 33 30 04/27/2010 K18_MLB FSB/DDR3/FRAMEBUF Vref Margining 32 29 04/27/2010 K18_MLB CPU Memory S3 Support 31 28 06/23/2010 K92_SUMA DDR3 SO-DIMM Connector B 30 27 05/10/2010 K92_SUMA DDR3 Byte/Bit Swaps 29 26 06/23/2010 K92_SUMA DDR3 SO-DIMM Connector A 28 25 07/06/2010 K92_MLB Chipset Support 26 24 10/08/2010 K91_ERIC USB HUBS 25 23 10/17/2010 K91_MLB CPU & PCH XDP 24 22 07/06/2010 K92_MLB PCH DECOUPLING 23 21 04/30/2010 K92_MLB PCH GROUNDS 22 20 07/06/2010 K92_MLB PCH POWER 21 19 10/20/2010 K91_MLB PCH MISC 20 18 07/06/2010 K92_MLB PCH PCI/FLASHCACHE/USB 19 17 07/06/2010 K92_MLB PCH DMI/FDI/GRAPHICS 18 16 10/19/2010 K91_MLB PCH SATA/PCIE/CLK/LPC/SPI 17 15 08/19/2010 K92_MLB CPU DECOUPLING-II 16 14 08/19/2010 K92_MLB CPU DECOUPLING-I 14 13 06/15/2010 K92_SUMA CPU POWER AND GND 13 12 08/03/2010 K92_MLB CPU POWER 12 11 06/15/2010 K92_SUMA CPU DDR3 INTERFACES 11 10 08/03/2010 K92_MLB CPU CLOCK/MISC/JTAG 10 9 06/21/2010 K92_SUMA CPU DMI/PEG/FDI/RSVD 9 8 04/27/2010 K18_MLB Signal Aliases 8 7 04/27/2010 K18_MLB Power Aliases 7 6 04/27/2010 K18_MLB Functional / ICT Test 5 5 05/28/2009 K17_REF BOM Configuration 4 4 MASTER MASTER Revision History 3 3 06/30/2009 K17_REF Power Block Diagram 2 2 06/30/2009 K17_REF System Block Diagram 100 K92_MLB 90 08/09/2010 CPU Constraints 99 K91_MARY 89 08/03/2010 Power Sequencing EG/PCH S0 97 K90I_KIRAN 88 06/25/2010 LCD Backlight Driver 96 K91_MARY 87 08/03/2010 Graphics MUX (GMUX) 95 K91_ERIC 86 10/08/2010 1V0 GPU / 1V5 FB Power Supply 94 T29_REF 85 10/16/2010 DisplayPort/T29 A Connector 93 T29_REF 84 10/16/2010 DisplayPort/T29 A MUXing 92 K92_MLB 83 11/21/2010 Muxed Graphics Support 90 K18_MLB 82 04/27/2010 LVDS Display Connector 89 K91_ERIC 81 12/21/2010 GPU (Whistler) CORE SUPPLY 88 K92_SUMA 80 06/15/2010 Whistler DP PWR/GNDs 87 K92_MLB 79 11/23/2010 Whistler GPIOs & STRAPs 86 K92_MLB 78 12/01/2010 Whistler LVDS/DP/GPIO 85 K92_MLB 77 08/19/2010 GDDR5 Frame Buffer B 84 K92_MLB 76 08/19/2010 GDDR5 Frame Buffer A 82 K92_MLB 75 08/03/2010 Whistler FRAME BUFFER I/F 81 K92_SUMA 74 06/15/2010 Whistler CORE/FB POWER 80 K92_SUMA 73 06/15/2010 Whistler PCI-E 79 K91_MARY 72 07/22/2010 Power Control 1/ENABLE 78 K91_MARY 71 10/14/2010 Power FETs 77 K91_ERIC 70 11/01/2010 Misc Power Supplies 76 K91_ERIC 69 10/08/2010 CPU VCCIO (1.05V) Power Supply 75 K91_ERIC 68 09/22/2010 CPU IMVP7 & AXG VCore Output 74 K91_ERIC 67 10/08/2010 CPU IMVP7 & AXG VCore Regulator 73 K91_ERIC 66 10/08/2010 1.5V DDR3 Supply 72 K91_ERIC 65 10/08/2010 5V / 3.3V Power Supply 71 K91_ERIC 64 10/08/2010 System Agent Supply 70 K91_CHANG 63 07/20/2010 PBus Supply & Battery Charger 69 K91_ERIC 62 10/08/2010 DC-In & Battery Connectors 68 K91_AUDIO 61 09/21/2010 AUDIO: JACK TRANSLATORS 67 K91_AUDIO 60 09/30/2010 AUDIO: JACKS 66 K91_AUDIO 59 07/12/2010 AUDIO: SPEAKER AMP 65 K91_AUDIO 58 07/12/2010 AUDIO: HEADPHONE FILTER 63 K91_AUDIO 57 07/12/2010 AUDIO: LINE INPUT FILTER 62 K91_AUDIO 56 09/30/2010 AUDIO: CODEC/REGULATOR 61 K91_BEN 55 06/08/2010 SPI ROM 59 K91_DINESH 54 08/06/2010 Digital Accelerometer 58 K91_ERIC 53 07/14/2010 WELLSPRING 2 57 K91_ERIC 52 10/08/2010 WELLSPRING 1 56 K18_MLB 51 04/27/2010 Fan Connectors 55 K91_DINESH 50 09/22/2010 Thermal Sensors 54 K91_DINESH 49 10/29/2010 High Side and CPU/AXG Current Sensing 53 K91_DINESH 48 08/16/2010 Voltage & Load Side Current Sensing 52 K18_MLB 47 04/27/2010 SMBus Connections Power Supplies BIST 101 K91_DINESH 08/18/2010 132 DEBUG SENSORS AND ADC 100 K91_DINESH 08/06/2010 130 PCB Rule Definitions 99 K18_MLB 04/27/2010 109 Project Specific Constraints 98 K18_MLB 04/27/2010 108 GPU (Whistler) CONSTRAINTS 97 K92_MLB 08/09/2010 107 SMC Constraints 96 K18_MLB 04/27/2010 106 T29 Constraints 95 T29_REF 10/16/2010 105 Ethernet/FW Constraints 94 K91_ERIC 08/03/2010 104 PCH Constraints 2 93 K92_MLB 08/09/2010 103 PCH Constraints 1 92 K92_MLB 08/09/2010 102 SCHEM,MLB,K91 (.csa) Date Page Sync Contents CRITICAL PCB 1 820-2915 PCBF,MLB,K91 SCHEM,MLB,K91 CRITICAL SCH 1 051-8620 51 K18_MLB 46 04/27/2010 LPC+SPI Debug Connector 1 1 MASTER MASTER Table of Contents Memory Constraints 91 K18_MLB 04/27/2010 101 TITLE=MLB ABBREV=DRAWING LAST_MODIFIED=Mon Jan 31 12:49:37 2011 Contents Page Date (.csa) Sync Contents Page (.csa) Sync Date
  • 2. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 POWER SUPPLY PG 63 DC/BATT TEMP SENSOR J6950 U4900 PG 23 SPI Boot ROM U6100 XDP CONN J2500,J2550 J2900 DIMM PG 26,28 J3100 PG 16 DDR3-1067/1333MHZ 2 DIMMS RTC DMI PG 17 PG 44 PG 51 PG 44 POWER SENSE FAN CONN AND CONTROL J5650,5660 Fan CONNECTION SMBUS PG 47 PG 63 SPEATKER TRACKPAD/KEYBOARD U6610,6620,6630 SPEATKER Ser ADC PG 44 SMC BSB B,0 J3402 U4900 Prt PG 55 PG 46 U3600 CAMERA PG 33 PG 33 PG 41 PG 31 EXTERNAL B EXTERNAL C J4501 J4610 PG 34 PG 31 PG 53 BLUETOOTH EXTERNAL A J5713 J3401 J4600 USB HUB 2 PG 33 HUB 1 USB PG 34 U3700 LPC + SPI CONN Port80,serial J5100 PG 19 Misc SPI PG 16 LPC PG 16 PWR 10 11 13 12 9 8 6 5 4 7 3 2 1 0 CTRL PG 17 (UP TO 14 DEVICES) PG 18 USB AUDIO PG 56 DIMM PG 26,28 U6201 AMP PG 59 PG 60 FILTER PG 58 AUDIO CONN PG 57 J6700,J6750 LINE TIN FILTER PG 16 PG 16 SMB HDA J3500 PG 37 CONN (UP TO 16 LINES) SDCARD READER COUGAR-POINT U1800 2.X GHZ INTEL CPU SANDY BRIDGE INTEL MOBILE PG 9 PG 17 FDI PG 19 GPIO GRAPHICS AMD WHISTLER U8000 PG 73 U2700 CLOCK SATA3.0/6(GB/S) SATA3.0/6(GB/S) SATA2.0/3(GB/S) SATA2.0/3(GB/S) SATA2.0/3(GB/S) SATA2.0/3(GB/S) BUFFER PG 16 CLK 4 5 SATA 2 3 PG 16 1 0 DP OUT RGB OUT HDMI OUT LVDS OUT DVI OUT PG 18 TMDS OUT PCI PG 18 PG 24 PG 41 CK5G05 CONN SATA J4501 ODD PG 41 SATA CONN J4500 HDD PG 83 DP MUX XP25-5G PG 84 JTAG PCI-E PG 16 PEG PG 16 PG 16 BCM57765 GB PG 36 E-NET CONN PG 37 E-NET J4000 U3900 PG 38 PG 40 CONN FIREWIRE FW643 PG 83 DDC MUX PG 86 GMUX U4100 J4310 PG 31 AirPort J3401 MINI DP PORT LCD PANEL U9600 U9320 U9370 J9400 IR (RESERVATION) CODEC HEADPHONE SYNC_DATE=06/30/2009 SYNC_MASTER=K17_REF System Block Diagram 2 OF 132 2 OF 101
  • 3. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 (PAGE 82) PP3V3_S0_PWRCTL P1V8S0_PGOOD P5V3V3_PGOOD AC ADAPTER CHGR_BGATE VIN U6200 PM_SLP_S4_L PM_SLP_S5_L PM_SLP_S3_L SMC_ONOFF_L RSMRST_PWRGD (PAGE 45) SLP_S4_L(P94) SLP_S3_L(P93) U4900 SLP_S5_L(P95) H8S2117 PWRGD(P12) RSMRST_IN(P13) PWR_BUTTON(P90) ALL_SYS_PWRGD PP4V5_AUDIO_ANALOG (PAGE 9~14) SMC CPU U1000 U2850 PM_PCH_PWRGD PS_PWRGD U1800 (PAGE 70) SMC_RESET_L ISL95870 1.05V PGOOD VOUT SMC AVREF SUPPLY (PAGE 45) REF3333 VOUT CPUVTTS0_PGOOD R7640 A PROCPWRGD DRAMPWROK SMC_TPAD_RST_L SMC_ONOFF_L PLTRST# RES* P17(BTN_OUT) SYSRST(PA2) IMVP_VR_ON(P16) 99ms DLY PP3V3_S5_AVREF_SMC (P64) RESET* VCCCPUPWRGD SM_DRAMPWROK PWRBTN# SYS_RERST# (PAGE 16~21) RSMRST# COUGAR_POINT PPCPUVTT_S0 SMC_CPU_FSB_ISENSE RSMRST_OUT(P15) ACPRESENT SMC_RESET_L PM_RSMRST_L CPUIMVP_VR_ON PM_SYSRST_L PM_PWRBTN_L SMC_ADAPTER_EN PLT_RERST_L CPU_PWRGD PM_MEM_PWRGD PM_PWRBTN_L EN FW_PWR_EN U4202 TPS22924 (PAGE 39) U5001 PP3V3_S5_SMC PP1V0_FW_FWPHY DELAY DELAY RC RC DELAY RC DELAY RC CPUVTTS0_EN P1V5CPU_EN P1V8S0_EN P1V2S0_EN R7978 U1800 (PAGE 16~21) SLP_S3#(P12) SLP_S4#(H7) DELAY DELAY RC RC MOBILE (PAGE 44) P60 SMC (PAGE 86) U4900 PL32A SMC_PM_G2_EN COUGAR-POINT SLP_S5#(E4) RC DELAY XP25-5 EG_RAIL4_EN PB18A GMUX U9600 PB17A PB17B PB16B (9 TO 12.6V) 3S2P J6950 EG_RAIL2_EN EG_RAIL3_EN EG_RAIL1_EN PPVBATT_G3H_CONN PM_SLP_S3_L PM_SLP_S5_L PM_SLP_S4_L PM_ALL_GPU_PGOOD P3V3S3_EN DDRREG_EN P5VS3_EN PM_SLP_S3_L_R PBUSVSENS_EN P3V3S0_EN P5VS0_EN && SMC_ADAPTER_EN&&PM_SLP_S3_L BKLT_PLT_RST_L LCD_BKLT_NO Q4260 BKLT_EN ENA (PAGE 87) U9701 PFWBOOST LP8550 VIN VOUT P3V3S5_EN P1V1GPU_EN P3V3GPU_EN GPUVCORE_EN Q7055 P1V5FB_EN PPVBAT_G3H_CHGR_R P1V0GPU_EN U9500 Q9806 EN2 ISL6236 EN1 VIN P5VS3_EN 1.503V(R/H) (PAGE 85) P3V3S5_EN 1.003V(L/H) POK2 EN2 EN1 VOUT2 POK1 VOUT1 A R5413 (PAGE 64) IN J6900 DCIN(16.5V) 6A FUSE F6905 K91 POWER SYSTEM ARCHITECTURE SMC_DCIN_ISENSE SMC_RESET_L A VIN R7020 PP18V5_DCIN_CONN BATTERY CHARGER PBUS SUPPLY/ U7000 ISL6259HRTZ R6990 VOUT SMC_BATT_ISENSE PPVBAT_G3H R7050 A 8A FUSE F7040 SMC_GPU_1V8_ISENSE PP1V5_GPU_REG TPS51125 P1V5FB_PGOOD P1V0GPU_PGOOD P5V3V3_PGOOD PPVOUT_S0_LCDBKLT PP1V0_S0GPU_REG (PAGE 65) PGOOD PPBUS_G3H D6990 P1V8_S0_EN U7201 Q7830 Q7870 Q7810 P3V3GPU_EN PP3V3_S3 PP3V3_S0_FET P3V3S0_EN EN P3V3S3_EN P1V2ENET_EN PP3V3_S0GPU EN U7760 (PAGE 70) PGOOD VOUT ISL8014A VIN VIN ISL8014A U7720 (PAGE 70) VOUT PGOOD PP1V2_ENET P1V2ENET_PGOOD P1V8S0_PGOOD PP1V8_S0 EN (PAGE 39) TPS22924 U4201 PP3V3_FW_FWPHY P1V8FB_EN FW_PWR_EN ON Q7922 VIN SLG5AP020 U7880 G VIN 5V 3.3V (R/H) (L/H) P1V5CPU_EN VREG5 VOUT1 VOUT2 ON SLG5AP020 DDRVTT_EN DDRREG_EN PP5V_S3 PP3V3_S5 VIN U7801 G PP1V5_S3 PP3V3_S5 S3 S5 SMC_CPU_HI_ISENSE (PAGE 66) U7300 P1V5S0FET_GATE Q7801 TPS51116 1.5V 0.75V CPUIMVP7_VR_ON R5388/U5388 A VIN PP5V_S3_DDRREG PP1V5_S3RS0 PGOOD VOUT1 VLDOIN VOUT2 Q7860 DDRREG_PGOOD PPVTT_S0_DDR_LDO PPDDR_S3_REG PP5V_S0 P5VS0_EN A VR_ON VIN CPU VCORE (PAGE 67) U7400 ISL95831 PGOOD VOUT PP1V8_S0 PM_SLP_S3_L&&WOL_EN||SMC_ADAPTER_EN P1V2S0_EN PP1V2_S0 P1V8GPUIFPXFET_GATE Q7850 PP3V3_ENET CPUIMVP7_AXG_PGOOD R7350 SMC_DDR_ISENSE A SMC_CPU_ISENSE PP1V05_S0 PP1V5_S0 V4MON V3MON TRST = 200mS (PAGE 72) U7971 RST* V2MON PP3V3_S0 PP1V8_GPUIFPX PP3V3_S0 VCC S0PGOOD_PWROK ISL88042IRTJJZ PP3V3_S0_PWRCTL PM_SLP_S4_L PM_SLP_S5_L PM_SLP_S3_L SMC_ONOFF_L RSMRST_PWRGD Q7880 ALL_SYS_PWRGD PP3V3_S0 EN PP1V5_S3 4.5V MAX8840 PM_ALL_GPU_PGOOD U7980 VOUT V U5440 V SMC_CPU_DDR_VSENSE PPVCORE_S0_CPU SMC_CPU_VSENSE PP4V5_AUDIO_ANALOG U2850 PM_PCH_PWRGD PPBUS_G3H PP5V_S3_GFXIMVP6_VDD GPUVCORE_EN SMC_PBUS_VSENSE VR_ON VDD V Q5315 GPU VCORE ISL6263C VIN U8900 PGOOD VOUT U6990 3.425V G3HOT ENABLE PM6640 (PAGE 62) SMC_GPU_ISENSE U5410 A GPUVCORE_PGOOD V PP3V42_G3H PPVCORE_GPU SMC_GPU_VSENSE CPUVTTS0_EN U5000 (PAGE 45) PP5V_S0_CPUVTTS0 EN VIN NCP303LSN SMC PWRGD U7600 (PAGE 70) SMC_RESET_L VIN ISL95870 1.05V PGOOD VOUT SMC AVREF SUPPLY (PAGE 45) REF3333 VOUT CPUVTTS0_PGOOD SYNC_DATE=06/30/2009 SYNC_MASTER=K17_REF Power Block Diagram 3 OF 132 3 OF 101
  • 4. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 Revision History SYNC_MASTER=MASTER SYNC_DATE=MASTER 4 OF 132 4 OF 101
  • 5. TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM DESCRIPTION REFERENCE DES BOM OPTION QTY PART NUMBER CRITICAL TABLE_ALT_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM DESCRIPTION REFERENCE DES BOM OPTION QTY PART NUMBER CRITICAL TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM PART NUMBER ALTERNATE FOR PART NUMBER BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM BOM OPTIONS BOM GROUP TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM TABLE_ALT_ITEM II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 BOM OPTIONS BOM NAME BOM NUMBER TABLE_BOMGROUP_HEAD TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM TABLE_BOMGROUP_ITEM K91 BOM GROUPS Module Parts Alternate Parts EFI ROM BOM Variants (Primary) Bar Code Labels / EEEE #’s - | (Alternate) SMC PSOC ETHERNET ROM Programmables - All Builds PCBA,MLB,K91F,DG64 639-1468 K91_COMMON,SODIMM:FOXCONN,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DG64 PCBA,MLB,K91F,DG65 639-1469 K91_COMMON,SODIMM:FOXCONN,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DG65 PCBA,MLB,K91F,DL86 639-1970 K91_COMMON,SODIMM:HYBRID,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL86 K91_COMMON,SODIMM:HYBRID,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL81 639-1973 PCBA,MLB,K91F,DL81 K91_COMMON,SODIMM:MOLEX,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL7W 639-1956 PCBA,MLB,K91F,DL7W SYNC_DATE=05/28/2009 BOM Configuration SYNC_MASTER=K17_REF ALL Diodes alt for Rohm 376S0859 376S0977 U6201 AUDIO CODEC OLD REV IS ALTERNATE FOR NEW REV 353S3199 ALL 353S2592 335S0550 add 4K byte as alternative to 2K 335S0777 ALL NXP alternate for pin diodes ALL 371S0652 371S0679 138S0671 138S0673 ALL Taiyo Yuden alt for Murata 10 uF caps ALL 152S0796 Dale/Vishay/TDK alt for Cyntec 152S0685 ALL Taiyo Yuden alt for Samsung 138S0638 138S0681 138S0648 Samsung / Murata alt for Taiyo Yuden 138S0652 ALL 138S0691 Murata alt to Samsung cap ALL 138S0676 ROHM alt to Toshiba N-FET ALL 376S0972 376S0612 IC,EEPROM,SERIAL,8KB,SOIC 335S0777 CRITICAL U3690 T29ROM:BLANK 1 Sanyo alt to Kemet ALL 128S0264 128S0257 ST Micro alt to LT ALL 353S3085 353S1658 ALL 155S0457 MAG LAYERS ALT TO MURATA 155S0329 ALL 152S0896 MAG LAYERS ALT TO CYNTEC 152S0518 Panasonic alt to Sanyo ALL 128S0303 128S0282 Fairchild wafer option ALL 353S2805 353S2603 ALL 376S0855 376S0613 Diodes alt to Toshiba dual N-FET IC,SMC,DEVELOPMENT-DVT,K91 CRITICAL 1 U4900 SMC_PROG:DVT 341S2864 1 CRITICAL IC,SMC,DEVELOPMENT-PROTO2,K91 U4900 SMC_PROG:PROTO2 341S2994 IC,SMC,DEVELOPMENT-PROTO1,K91 U4900 341S2935 SMC_PROG:PROTO1 CRITICAL 1 IC,SMC,DEVELOPMENT-PVT,K91 CRITICAL U4900 1 SMC_PROG:PVT 341S2867 335S0740 64 MBIT SPI SERIAL DUAL I/O FLASH BOOTROM_BLANK 1 CRITICAL U6100 337S4033 U1000 CPU:2_3GHZ CRITICAL 1 IC,CPU,SNB,SR00U,PRQ,D2,2.3,45W,4+2,1.30,8M,BGA 1 U4900 SMC_BLANK CRITICAL IC,SMC,HS8/2117,9MMX9MM,TLP 338S0895 IC,GPU ROM,K91/F,K92,BLANK U8701 GPUROM:BLANK 1 CRITICAL 335S0724 IC,GPU ROM,K91/F,K92,PROG 1 GPUROM:PROG CRITICAL U8701 341S2957 IC,MCU,32B,LPC1112A,16KB/2KB,HVQFN25 U9330 T29MCU:BLANK CRITICAL 337S3997 1 IC,EFI,ROM,PROTO0, K90/K90I/K91/K91F/K92 1 U6100 CRITICAL 341S2893 BOOTROM_PROG:PROTO0 341S2830 CRITICAL U9600 IC,CPLD,LATTICE,GMUX,K91/K91F 1 GMUX_PROG 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL80] EEEE:DL80 1 CRITICAL 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7Y] EEEE:DL7Y 1 CRITICAL [EEEE_DL7W] EEEE:DL7W 1 826-4393 CRITICAL LBL,P/N LABEL,PCB,28MM X 6 MM 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7V] EEEE:DL7V CRITICAL 1 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7R] 1 EEEE:DL7R CRITICAL 826-4393 [EEEE_DL7Q] 826-4393 1 CRITICAL EEEE:DL7Q LBL,P/N LABEL,PCB,28MM X 6 MM 639-1574 PCBA,MLB,K91,DHMW K91_COMMON,SODIMM:FOXCONN,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DHMW 639-1960 PCBA,MLB,K91,DL7Y K91_COMMON,SODIMM:MOLEX,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DL7Y K91_COMMON,SODIMM:HYBRID,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DL7Q 639-1945 PCBA,MLB,K91,DL7Q K91_COMMON ALTERNATE,COMMON,K91_COMMON1,K91_COMMON2,K91_PROGPARTS,K91_PROGPARTS1,UVGLUE_K91_K91F,K91_PVT CPUMEM_S0,SMC_DEBUG_YES,HUB1_2NONREM,HUB2_2NONREM,USBHUB_2513B K91_COMMON1 K91_COMMON2 GPUVID_1P11V,KB_BL,T29:YES,ENET_SD:B0,T29BST:Y,SDRV_PD,SDRVI2C:MCU,T29_DP_HPD:ALL_OR K91_PVT BMON:PROD,VREFMRGN_NOT,XDP,XDP_CPU_BPM,BKLT:PROD,ISNS_ON:NO,LPCPLUS_R:YES K91_PROGPARTS GMUX_PROG,IR_PROG,TPAD_PROG:PVT,ENETROM_PROG:PVT,T29ROM:PROG,T29MCU:PROG SMC_PROG:PVT,BOOTROM_PROG:PVT K91_PROGPARTS1 K91_DEVEL:PVT SNB_CPT_XDP,LPCPLUS_CONN:YES,LPCPLUS_R:YES SNB_CPT_XDP XDP,XDP_CONN,XDP_CPU_BPM,XDP_PCH 1 IC,T29 EEPROM,PVT,K9x T29ROM:PROG U3690 CRITICAL 341S3129 K91_COMMON,SODIMM:HYBRID,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DL80 639-1959 PCBA,MLB,K91,DL80 IC,EFI,ROM,PROTO1, K90/K90I/K91/K91F/K92 341S2934 CRITICAL U6100 BOOTROM_PROG:PROTO1 1 K91_DEVEL:ENG SNB_CPT_XDP,BMON:ENG,GMUX_JTAG_CONN,VREFMRGN,LPCPLUS_CONN:YES,LPCPLUS_R:YES,BKLT:ENG,S0PGOOD_ISL,CPURIPPLE_ENG,IMVPISNS_ENG,ISNS_ON:YES,DEBUG_ADC,DIGI_MIC 338S0945 U3600 IC,ASSP,LIGHTRIDGE,S LHAJ,PRQ,FCBGA,15X15MM CRITICAL 1 T29:YES 725-1479 UV_GLUE_K91_K91F UVGLUE_K91_K91F 1 CRITICAL MLB LOCTITE UV EB CPU,PCH,T29,GPU,K91 CRITICAL J2900 516-0246 SODIMM:FOXCONN 1 CONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,FOXCONN CONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,MOLEX 516S0805 SODIMM:MOLEX J3100 1 CRITICAL 1 516-0245 SODIMM:MOLEX CONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,MOLEX CRITICAL J2900 516S0805 J3100 1 SODIMM:HYBRID CONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,MOLEX CRITICAL J2900 516-0246 1 CRITICAL CONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,FOXCONN SODIMM:HYBRID IC,FLASH,SERIAL,SPI,1MBIT,2V7,8P,SOIC 335S0663 1 ENETROM_BLANK CRITICAL U3990 1 U3990 341S3096 CRITICAL IC,ENET ROM,1MBIT,DVT,PVT,K90i/K91x ENETROM_PROG:PVT IC,ENET,1MBITFLASH,CIV REV01,K90i/K91/K92 1 CRITICAL ENETROM_PROG:EVT 341S3026 U3990 341S2685 IC,ENET,1MBITFLASH,CIV REV01,K74/K75,K40 1 CRITICAL ENETROM_PROG:A0_SD U3990 SODIMM:FOXCONN J3100 516S0806 1 CRITICAL CONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,FOXCONN TPAD_PROG:PROTO2 U5701 CRITICAL IC,TP PSOC,K9x,PROTO2 1 341S3001 1 CRITICAL TPAD_PROG:EVT IC,TP PSOC,K9x,EVT 341S3024 U5701 341S2940 1 CRITICAL TPAD_PROG:PROTO1 U5701 IC,TP PSOC,K9x,PROTO1 IC,EFI,ROM,PVT, K90/K90I/K91/K91F/K92 CRITICAL BOOTROM_PROG:PVT 1 U6100 341S2896 341S2894 CRITICAL BOOTROM_PROG:EVT 1 U6100 IC,EFI,ROM,EVT, K90/K90I/K91/K91F/K92 1 CRITICAL U5701 341S2902 TPAD_PROG:PROTO0 IC,TP PSOC,K9x,PROTO0 1 341S3099 IC,TP PSOC,K9x,DVT,PVT CRITICAL TPAD_PROG:PVT U5701 IC,SMC,DEVELOPMENT-EVT,K91 U4900 1 SMC_PROG:EVT CRITICAL 341S2861 U1000 1 337S4031 CPU:2_0GHZ CRITICAL IC,CPU,SNB,SR030,PRQ,D2,2.0,45W,4+2,1.20,6M,BGA IC,PCH,COUGARPOINT,SLH9D,PRQ,BD82HM65 U1800 337S4029 CRITICAL 1 337S3936 U8000 IC,GPU,AMD,WHISTLER,962FCBGA,40NM,ES 1 GPU:WHISTLER CRITICAL 1 337S4032 U1000 CPU:2_2GHZ CRITICAL IC,CPU,SNB,SR00W,PRQ,D2,2.2,45W,4+2,1.30,6M,BGA K91_COMMON,SODIMM:MOLEX,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DL7R PCBA,MLB,K91,DL7R 639-1953 337S3979 CRITICAL IC,GPU,AMD,SEYMOUR,M2 LP,ES1,962BGA 1 GPU:SEYMOUR U8000 K91_COMMON,SODIMM:MOLEX,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL88 PCBA,MLB,K91F,DL88 639-1976 PCBA,MLB,K91F,DG67 639-1471 K91_COMMON,SODIMM:FOXCONN,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DG67 639-1974 PCBA,MLB,K91F,DL87 K91_COMMON,SODIMM:HYBRID,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL87 PCBA,MLB,K91F,DL83 639-1972 K91_COMMON,SODIMM:HYBRID,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL83 [EEEE_DG63] CRITICAL 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM EEEE:DG63 1 [EEEE_DG66] EEEE:DG66 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM 1 CRITICAL IC,PROGRMD,LPC1112A,T29 PORT MCU,PVT,HVQFN25 341S3128 T29MCU:PROG CRITICAL U9330 1 SMC_PROG:PROTO0 U4900 IC,SMC,DEVELOPMENT-PROTO0,K91 1 CRITICAL 341S2854 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL7T] 1 EEEE:DL7T CRITICAL 826-4393 341S2973 U3990 1 CRITICAL ENETROM_PROG:B0_SD IC,ENET,1MBITFLASH,CIV REV01,K60/K62 1 [EEEE_DL89] EEEE:DL89 826-4393 CRITICAL LBL,P/N LABEL,PCB,28MM X 6 MM LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL88] CRITICAL 1 826-4393 EEEE:DL88 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL85] CRITICAL 826-4393 EEEE:DL85 1 353S3055 IC,PI3VEDP212,X2 DISPLAYPORT 2:1 MUX,QFN CRITICAL 1 U9390 IC,SGRAM,GDDR5,64MX32,3.6GBPS,M-DIE,HF U8400,U8450,U8500,U8550 FB_1G_HYNIX CRITICAL 333S0572 4 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL84] 1 CRITICAL 826-4393 EEEE:DL84 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL82] CRITICAL 1 826-4393 EEEE:DL82 LBL,P/N LABEL,PCB,28MM X 6 MM 826-4393 [EEEE_DHMV] 1 CRITICAL EEEE:DHMV [EEEE_DHMW] LBL,P/N LABEL,PCB,28MM X 6 MM 826-4393 EEEE:DHMW CRITICAL 1 BOOTROM_PROG:DVT 1 CRITICAL U6100 341S2895 IC,EFI,ROM,DVT, K90/K90I/K91/K91F/K92 [EEEE_DL83] CRITICAL 1 EEEE:DL83 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL86] CRITICAL 1 EEEE:DL86 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL81] CRITICAL 1 826-4393 EEEE:DL81 157S0055 ALL 157S0058 Delta alt to TDK Magnetics LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DG67] 826-4393 CRITICAL 1 EEEE:DG67 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DG64] CRITICAL 1 EEEE:DG64 826-4393 [EEEE_DDKG] LBL,P/N LABEL,PCB,28MM X 6 MM 826-4393 EEEE:DDKG 1 CRITICAL [EEEE_DG65] CRITICAL 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM 1 EEEE:DG65 826-4393 LBL,P/N LABEL,PCB,28MM X 6 MM [EEEE_DL87] CRITICAL 1 EEEE:DL87 IC,SDRAM,GDDR5,32MX32,1.25GHz,A-DIE1.35V U8400,U8450,U8500,U8550 CRITICAL FB_512_HYNIX 333S0564 4 333S0543 U8500,U8550 FB_256_SAMSUNG CRITICAL 2 IC,SGRAM,GDDR5,32MX32.1.25GHz,E-DIE,HF IC,SDRAM,GDDR5,32MX32,1.25GHz,A-DIE1.35V 333S0564 CRITICAL FB_256_HYNIX 2 U8500,U8550 IC,SGRAM,GDDR5,64MX32,3.6GBPS,C-DIE,HF CRITICAL FB_1G_SAMSUNG 333S0571 4 U8400,U8450,U8500,U8550 IC,EFI,ROM,PROTO2, K90/K90I/K91/K91F/K92 U6100 CRITICAL 1 BOOTROM_PROG:PROTO2 341S2991 1 IR,ENCORE II,CY7C63833-LFXC IR_PROG U4800 CRITICAL 341S2384 IC,PLD,LATTICE,LFXP2-5E-5,132 BALL CSBGA GMUX_BLANK U9600 1 CRITICAL 336S0042 639-1470 PCBA,MLB,K91F,DG66 K91_COMMON,SODIMM:FOXCONN,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DG66 PCBA,MLB,K91F,DL82 639-1971 K91_COMMON,SODIMM:MOLEX,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL82 1 343S0534 IC,ASIC,GBIT ETHNET&SD CTRLR,686 QFN8X8,B0 CRITICAL U3900 ENET_SD:B0 K91_COMMON,SODIMM:FOXCONN,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DHMV 639-1573 PCBA,MLB,K91,DHMV 639-1954 PCBA,MLB,K91F,DL7T K91_COMMON,SODIMM:MOLEX,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL7T IC,SGRAM,GDDR5,32MX32.1.25GHz,E-DIE,HF FB_512_SAMSUNG 333S0543 U8400,U8450,U8500,U8550 CRITICAL 4 IC,FW643-E,1394B PHY/OHCI LINK/PCI-E,12 1 CRITICAL 338S0753 U4100 IC,ASIC,GBIT ETHNET&SD CTRLR,686 QFN8X8,A0 1 CRITICAL U3900 ENET_SD:A0 343S0494 085-1901 K91/K91F DEVELOPMENT BOM K91_DEVEL:ENG 5 OF 132 5 OF 101
  • 6. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 NC NO_TESTs NO_TEST J6995 (BAT LED CONN) J5800 (IPD FLEX CONN) J6950 (BAT CONN) NC NO_TESTs NC NO_TESTs J6950 (MAIN BATT CONN) J6950 (BIL CABLE CONN) Functional Test Points J6900 (DC POWER CONN) J6781 & J6782 (SPEAKERS CONN) J5650 (LEFT FAN CONN) POWER RAILS NO_TEST=TRUE FUNC_TEST per Fan 2 TP needed J3401 & J3402 (AIRPORT/BT/CAMERA CONN) 3 TPs per Fan NO_TEST FUNC_TEST J9000 (LVDS CONN) NC NO_TESTs NO_TEST CPU NO_TESTs NO_TEST 3 TPs 6 TPs NO_TEST ICT Test Points FUNC_TEST PCH ALIASES 5 TPs FUNC_TEST 5 TPs J4500 (SATA ODD CONN) J4501 (SATA HDD CONN) 4 TPs J5713 (KEY BOARD CONN) 2 TPs J5815 (KBD BACKLIGHT CONN) J5660 (RIGHT FAN CONN) J6780 (MIC CONN) USB PORTS I1000 I1001 I1002 I1003 I1004 I1005 I1006 I1007 I1008 I1009 I1010 I1011 I1012 I1013 I1014 I1015 I1016 I1017 I1018 I1019 I1020 I1021 I1022 I1024 I1025 I1026 I1027 I1028 I1029 I1031 I1032 I1033 I1034 I1035 I1038 I1039 I1040 I1042 I1043 I1044 I1050 I1051 I1052 I1053 I1054 I1055 I1056 I1057 I1058 I1059 I1060 I1061 I1062 I1063 I1064 I1065 I1066 I1086 I1088 I1089 I1090 I1092 I1093 I1094 I1095 I1096 I1097 I1098 I1099 I1100 I1101 I1102 I1103 I1104 I1105 I1106 I1107 I1108 I1109 I1110 I1111 I1112 I1113 I1114 I1115 I1116 I1117 I1118 I1119 I1120 I1121 I1122 I1123 I1124 I1125 I1126 I1127 I1128 I1129 I1130 I1131 I1132 I1134 I1135 I1136 I1137 I1140 I1141 I1142 I1143 I1145 I1146 I1149 I1150 I1151 I1152 I1156 I1160 I1161 I1273 I1288 I1292 I1297 I1436 I1437 I1438 I1439 I1440 I1441 I1442 I1443 I1464 I1477 I1478 I1479 I1480 I1481 I1482 I1483 I1484 I1485 I1486 I1487 I1488 I1489 I1490 I1491 I1492 I1493 I1494 I1495 I1496 I1497 I1498 I1508 I1509 I1510 I1513 I1514 I1515 I1516 I1517 I1518 I1519 I1520 I1521 I1522 I1523 I1524 I1525 I1526 I1527 I1528 I1529 I1530 I1531 I1532 I1533 I1534 I1535 I1536 I1537 I1539 I1540 I1541 I1542 I1543 I1544 I1545 I1546 I1547 I1548 I1549 I1550 I1551 I1552 I1553 I1554 I1555 I1556 I1557 I1558 I1559 I1560 I1561 I1562 I1563 I1564 I1565 I1566 I1567 I1568 I1569 I1570 I1571 I1572 I1573 I1574 I1575 I1576 I1577 I1578 I1579 I1580 I1581 I1582 I1583 I1584 I1585 I1586 I1587 I1588 I1589 I1590 I1591 I1592 I1593 I1594 I1595 I1596 I1598 I1599 I1600 I1601 I1602 I1603 I1604 I1605 I1606 I1607 I1610 I1611 I1612 I1613 I1614 I1615 I1616 I1617 I1618 I1619 I1620 I1621 I1622 I1623 I1624 I1625 I1626 I1627 I1628 I1629 I1630 I1631 I1632 I1633 I1634 I1635 I1636 I1637 I1638 I1639 I1640 I1641 I1642 I1643 I1644 I1645 I557 I558 I559 I600 I602 I603 I604 I605 I606 I607 I610 I611 I612 I613 I614 I615 I616 I617 I618 I620 I621 I623 I624 I625 I626 I627 I636 I637 I638 I639 I640 I709 I714 I720 I722 I723 I724 I725 I726 I727 I728 I729 I730 I731 I732 I733 I734 I735 I737 I738 I739 I740 I741 I742 I743 I744 I751 I752 I756 I760 I761 I762 I763 I764 I765 I766 I767 I768 I769 I770 I771 I772 I774 I989 I990 I991 I992 I993 I994 I995 I996 I997 I998 SYNC_MASTER=K18_MLB Functional / ICT Test SYNC_DATE=04/27/2010 TRUE PP3V3_S0 TRUE PP5V_S0 PP5V_S0 TRUE PP3V3_S0 TRUE TRUE PP5V_S0 PP1V8_S0 TRUE TRUE MEM_A_SA<1..0> TRUE MEM_A_DQS_N<7..0> MEM_A_DQS_P<7..0> TRUE FB_A0_DQ<31..0> TRUE TRUE FB_A0_WCLK_P<1..0> FB_B1_DBI_L<3..0> TRUE TRUE FB_B1_WCLK_P<1..0> FB_A0_A<8..0> TRUE FB_A0_EDC<3..0> TRUE FB_A0_DBI_L<3..0> TRUE FB_A1_DQ<31..0> TRUE FB_A1_ABI_L TRUE FB_A0_ABI_L TRUE FB_B1_WCLK_N<1..0> TRUE TRUE FB_B1_A<8..0> TRUE FB_B0_DBI_L<3..0> TRUE FB_B1_ABI_L TRUE FB_A0_WCLK_N<1..0> TRUE MAKE_BASE=TRUE NC_SATA_E_R2D_CN TRUE MEM_B_A<15..0> MAKE_BASE=TRUE TRUE NC_SMC_P41 PP3V3_S0GPU TRUE Z2_CLKIN TRUE PP0V75_S0_DDRVTT TRUE SMC_LID_R TRUE TRUE SPI_ALT_CS_L TRUE SPI_ALT_MISO NC_SATA_D_R2D_CN MAKE_BASE=TRUE NC_SATA_D_R2D_CP TRUE TRUE MAKE_BASE=TRUE NC_SATA_E_D2RP TRUE FB_B0_ABI_L TRUE FB_B0_DQ<31..0> TRUE MEM_A_CS_L<1..0> MEM_A_CLK_P<1..0> TRUE TRUE MEM_A_CKE<1..0> NC_LVDS_EG_BKL_PWM MEM_A_BA<2..0> TRUE MEM_A_CLK_N<1..0> TRUE MEM_A_ODT<1..0> TRUE MAKE_BASE=TRUE TRUE NC_PCIE_CLK100M_PE4P TP_LVDS_IG_BKL_PWM NC_SMC_BS_ALRT_L TRUE MEM_B_SA<1..0> NC_LVDS_IG_CTRL_CLK NC_CRT_IG_VSYNC NC_CRT_IG_DDC_CLK TRUE SMC_NMI TRUE WS_KBD7 TP_LVDS_IG_B_CLKP TRUE MEM_B_DQS_N<7..0> TRUE MEM_B_DQ<63..0> TRUE MEM_B_ODT<1..0> MAKE_BASE=TRUE TRUE NC_PCIE_CLK100M_PE7P MAKE_BASE=TRUE NC_LVDS_IG_BKL_PWM TRUE MEM_B_CKE<1..0> TRUE NC_SMC_BS_ALRT_L TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE NC_LVDS_IG_B_CLKN TRUE MAKE_BASE=TRUE TRUE NC_LVDS_EG_BKL_PWM MEM_B_BA<2..0> TRUE TRUE MEM_B_RAS_L TRUE MEM_B_CAS_L TRUE MEM_B_WE_L NC_PCIE_CLK100M_PE6N NC_PCIE_CLK100M_PE5P NC_PCIE_CLK100M_PE5N MAKE_BASE=TRUE NC_PCIE_CLK100M_PE6N TRUE NC_PCIE_CLK100M_PE6P TRUE MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE NC_PSOC_P1_3 TRUE MAKE_BASE=TRUE NC_SATA_B_D2RN TRUE MAKE_BASE=TRUE NC_SATA_B_D2RP NC_GPU_MIOA_DE MAKE_BASE=TRUE TRUE NC_GPU_GSTATE<1> MAKE_BASE=TRUE TRUE NC_SDVO_INTP LPC_FRAME_L TRUE LPC_AD<0..3> TRUE TP_ISSP_SCLK_P1_1 TRUE BKLT_EN TRUE TRUE BI_MIC_P BI_MIC_N TRUE TRUE FAN_RT_PWM TRUE FAN_RT_TACH FAN_LT_TACH TRUE SMBUS_SMC_BSA_SCL TRUE SMBUS_SMC_A_S3_SCL TRUE TRUE PSOC_SCLK PP18V5_S4 TRUE USB_LT2_N TRUE TRUE PP3V3_S3 TRUE USB2_LT1_P TRUE PP3V42_G3H TRUE WS_KBD1 TRUE WS_KBD2 TRUE WS_KBD3 TRUE WS_KBD4 TRUE WS_KBD6 WS_KBD11 TRUE TRUE WS_KBD8 TRUE WS_KBD15_CAP TRUE SATA_HDD_D2R_C_N TRUE SPKRCONN_S_OUT_N SMBUS_SMC_A_S3_SDA TRUE TRUE SATA_ODD_D2R_UF_P SATA_ODD_D2R_UF_N TRUE TRUE PP5V_S0_HDD_FLT SATA_ODD_R2D_N TRUE SATA_ODD_D2R_C_N TRUE TRUE SATA_ODD_R2D_P SATA_ODD_D2R_C_P TRUE TRUE SMC_ODD_DETECT PP5V_SW_ODD TRUE SATA_HDD_R2D_N TRUE TRUE SATA_HDD_D2R_C_P TRUE SPKRCONN_R_OUT_N TRUE USB_LT2_P NC_LPC_DREQ0_L MAKE_BASE=TRUE TP_GPU_GSTATE<0> TP_GPU_MIOA_D<9..0> TP_CPU_RSVD<2..1> TRUE MAKE_BASE=TRUE NC_SATA_E_R2D_CP NC_LPC_DREQ0_L NC_HDA_SDIN2 TRUE MAKE_BASE=TRUE TP_CPU_RSVD<65..62> TP_CPU_RSVD<27..26> TRUE SMC_TCK SMC_RX_L TRUE SMC_TDO TRUE SMC_TMS TRUE SMC_TRST_L TRUE NC_PCH_LVDS_VBG TRUE MAKE_BASE=TRUE NC_CRT_IG_HSYNC TRUE MAKE_BASE=TRUE NC_CRT_IG_HSYNC NC_CRT_IG_RED TP_ISSP_SDATA_P1_0 TRUE SMC_ONOFF_L TRUE SMC_MD1 TRUE SPKRCONN_L_OUT_P TRUE TRUE SPKRCONN_R_OUT_P TRUE SPKRCONN_S_OUT_P SPKRCONN_L_OUT_N TRUE TRUE PP5V_S5 LVDS_CONN_A_DATA_N<2> TRUE LVDS_CONN_A_CLK_F_P TRUE LVDS_CONN_A_CLK_F_N TRUE LVDS_CONN_B_DATA_P<1> TRUE LVDS_CONN_B_DATA_N<1> TRUE PP3V42_G3H TRUE TRUE LVDS_CONN_A_DATA_N<0> TRUE NC_SMC_FAN_3_TACH NC_SMC_FAN_3_CTL TRUE NC_FW643_AVREG MAKE_BASE=TRUE TRUE NC_TP_CPU_RSVD<65..62> NC_TP_CPU_RSVD<43..32> MAKE_BASE=TRUE TRUE TRUE MAKE_BASE=TRUE NC_CRT_IG_GREEN TRUE MAKE_BASE=TRUE NC_CRT_IG_DDC_CLK MAKE_BASE=TRUE NC_SDVO_INTP TRUE NC_SDVO_STALLN TRUE MAKE_BASE=TRUE TP_DP_IG_D_MLP<3..0> NC_DP_IG_D_CTRL_DATA MAKE_BASE=TRUE NC_DP_IG_D_CTRL_DATA TRUE NC_DP_IG_C_MLP<3..0> MAKE_BASE=TRUE TRUE NC_DP_IG_C_CTRL_DATA TRUE MAKE_BASE=TRUE NC_FW643_AVREG MAKE_BASE=TRUE TRUE NC_ESTARLDO_EN TRUE TRUE NC_FW2_TPAN NC_FW2_TPAP TRUE NC_FW2_TPBIAS TRUE NC_FW2_TPBP TRUE TRUE NC_FW2_TPBN TRUE NC_SMC_FAN_2_CTL TRUE NC_SMC_FAN_2_TACH TRUE SMC_KDBLED_PRESENT_L KBDLED_ANODE TRUE TRUE PPVOUT_S0_LCDBKLT TRUE NC_SMC_BS_ALRT_L LPCPLUS_RESET_L TRUE LPC_CLK33M_LPCPLUS TRUE TRUE LPC_SERIRQ PM_CLKRUN_L TRUE PP3V3_SW_LCD TRUE LVDS_CONN_B_DATA_N<2> TRUE TP_CPU_RSVD<58..45> TP_CPU_RSVD<43..32> TP_CPU_RSVD<24..15> LCD_BKLT_PWM TRUE TRUE LED_RETURN_6 TRUE LED_RETURN_4 TRUE LVDS_CONN_B_CLK_F_N TRUE LVDS_CONN_B_CLK_F_P LVDS_CONN_B_DATA_P<2> TRUE LVDS_CONN_A_DATA_P<2> TRUE LVDS_CONN_A_DATA_N<1> TRUE LVDS_DDC_DATA TRUE LED_RETURN_5 TRUE LPCPLUS_GPIO TRUE PP18V5_DCIN_FUSE TRUE TRUE MAKE_BASE=TRUE NC_TP_CPU_RSVD<58..45> LVDS_DDC_CLK TRUE LED_RETURN_3 TRUE TRUE WS_KBD5 NC_CRT_IG_GREEN NC_CRT_IG_DDC_DATA TP_CPU_RSVD_NCTF<8..5> LVDS_CONN_A_DATA_P<0> TRUE TRUE SATA_HDD_R2D_P PP3V3_S5_AVREF_SMC TRUE USB2_LT1_N TRUE TRUE WS_KBD13 SMC_RESET_L TRUE TRUE WS_KBD16_NUM TRUE LPC_PWRDWN_L TRUE SMC_TDI MAKE_BASE=TRUE TRUE NC_TP_CPU_RSVD<2..1> WS_KBD10 TRUE NC_CLINK_CLK TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE TRUE NC_CLINK_DATA NC_CLINK_RESET_L MAKE_BASE=TRUE TRUE NC_PCIE_CLK100M_PEBP TP_DP_IG_C_MLP<3..0> MAKE_BASE=TRUE TRUE NC_TP_CPU_RSVD<24..15> TRUE MAKE_BASE=TRUE NC_TP_CPU_RSVD<27..26> TRUE MAKE_BASE=TRUE NC_CRT_IG_BLUE MAKE_BASE=TRUE TRUE NC_CRT_IG_RED NC_SATA_F_D2RN TRUE NC_CRT_IG_VSYNC MAKE_BASE=TRUE NC_DP_IG_C_AUXP TRUE MAKE_BASE=TRUE NC_DP_IG_C_CTRL_DATA NC_DP_IG_C_CTRL_CLK NC_DP_IG_C_HPD NC_FW643_TDI TRUE MAKE_BASE=TRUE NC_TP_CPU_RSVD_NCTF<8..5> NC_SDVO_TVCLKINN NC_SDVO_TVCLKINP NC_SDVO_STALLN NC_SDVO_STALLP NC_CLINK_DATA NC_CLINK_RESET_L MAKE_BASE=TRUE TRUE NC_PCIE_CLK100M_PEBN NC_GPU_MIOA_DE NC_SDVO_TVCLKINN TRUE MAKE_BASE=TRUE NC_DP_IG_C_AUXN TRUE MAKE_BASE=TRUE NC_DP_IG_C_MLN<3..0> TRUE MAKE_BASE=TRUE NC_ALS_GAIN TRUE NC_FW0_TPAP TRUE NC_FW0_TPBP TRUE TRUE NC_FW0_TPBN MAKE_BASE=TRUE NC_FW643_TDI TRUE NC_DP_IG_C_HPD TRUE MAKE_BASE=TRUE NC_DP_IG_C_CTRL_CLK MAKE_BASE=TRUE TRUE NC_DP_IG_D_CTRL_CLK TRUE MAKE_BASE=TRUE NC_DP_IG_D_AUXN NC_SATA_E_R2D_CN TRUE WS_KBD9 WS_LEFT_OPTION_KBD TRUE NC_PCH_LVDS_VBG TRUE FAN_LT_PWM PP5V_S3_ALSCAMERA_F TRUE PP3V3_WLAN TRUE TRUE WS_KBD12 TRUE WS_KBD14 TRUE WS_KBD17 TRUE WS_KBD19 WS_KBD23 TRUE TRUE PP5V_S3_RTUSB_B_F PCIE_AP_D2R_N TRUE TRUE PP3V3_FW_FWPHY SMBUS_SMC_A_S3_SCL TRUE PSOC_MOSI TRUE WS_CONTROL_KBD TRUE LVDS_CONN_A_DATA_P<1> TRUE LVDS_CONN_B_DATA_P<0> TRUE LVDS_CONN_B_DATA_N<0> TRUE Z2_DEBUG3 TRUE LED_RETURN_1 TRUE LED_RETURN_2 TRUE PCIE_AP_R2D_N TRUE TRUE PCIE_AP_R2D_P WIFI_EVENT_L TRUE AP_CLKREQ_Q_L TRUE TRUE PCIE_CLK100M_AP_CONN_P PCIE_CLK100M_AP_CONN_N TRUE PCIE_WAKE_L TRUE SYS_DETECT_L TRUE AP_RESET_CONN_L TRUE SMBUS_SMC_A_S3_SDA TRUE PP5V_S3_IR_R TRUE TRUE PP5V_S3_RTUSB_A_F NC_DP_IG_D_AUXN MAKE_BASE=TRUE TRUE NC_DP_IG_D_AUXP TRUE MAKE_BASE=TRUE NC_DP_IG_D_CTRL_CLK MAKE_BASE=TRUE TRUE NC_CRT_IG_DDC_DATA NC_CRT_IG_BLUE PM_SYSRST_L TRUE MAKE_BASE=TRUE NC_GPU_GSTATE<0> TRUE NC_SDVO_INTN NC_DP_IG_D_HPD NC_DP_IG_C_AUXN NC_DP_IG_C_AUXP TP_DP_IG_C_MLN<3..0> NC_DP_IG_D_HPD TRUE MAKE_BASE=TRUE NC_DP_IG_D_MLN<3..0> MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE NC_SDVO_TVCLKINP TRUE NC_SDVO_STALLP MAKE_BASE=TRUE TRUE NC_GPU_MIOA_D<9..0> MAKE_BASE=TRUE TRUE NC_GPU_BUFRST_L MAKE_BASE=TRUE TRUE TRUE MAKE_BASE=TRUE NC_SDVO_INTN TRUE NC_DP_IG_D_MLP<3..0> MAKE_BASE=TRUE TP_DP_IG_D_MLN<3..0> NC_DP_IG_D_AUXP TRUE NC_HDA_SDIN3 MAKE_BASE=TRUE NC_LVDS_IG_B_CLKP MAKE_BASE=TRUE TRUE TP_LVDS_IG_B_CLKN NC_GPU_BUFRST_L TRUE NC_SATA_F_D2RN MAKE_BASE=TRUE NC_SATA_F_D2RP TRUE SYS_LED_ANODE_R TRUE SPI_ALT_MOSI TRUE WS_KBD20 TRUE WS_KBD21 TRUE WS_KBD22 WS_LEFT_SHIFT_KBD TRUE CONN_USB2_BT_N TRUE USB_CAMERA_CONN_N TRUE USB_CAMERA_CONN_P TRUE PP1V0_FW_FWPHY TRUE PP18V5_S3 TRUE SYS_LED_ANODE TRUE IR_RX_OUT TRUE NC_HDA_SDIN1 PP1V05_S0 TRUE T29_D2R_P<1..0> TRUE PM_SLP_S3_L TRUE T29_D2R_N<1..0> TRUE PP1V05_S0GPU TRUE T29_D2R_C_N<1..0> TRUE TRUE T29DPA_ML_P<3..0> TRUE SPI_ALT_CLK WS_KBD_ONOFF_L TRUE NC_PCIE_CLK100M_PE4P NC_PCIE_CLK100M_PE4N PP1V05_S5 TRUE TRUE DP_T29SNK0_AUXCH_N DP_T29SNK0_ML_C_P<3..0> TRUE DP_T29SNK0_ML_N<3..0> TRUE TRUE BI_MIC_SHIELD TRUE CONN_USB2_BT_P SMBUS_SMC_0_S0_SCL TRUE TRUE SMBUS_SMC_0_S0_SDA Z2_BOOST_EN TRUE PP1V8R1V55_S0GPU_ISNS TRUE TRUE DP_T29SNK0_AUXCH_C_P TRUE T29DPA_ML_N<3..0> DP_T29SNK1_ML_P<3..0> TRUE NC_PCIE_CLK100M_PE7N NC_PCIE_CLK100M_PE7N TRUE MAKE_BASE=TRUE TRUE MAKE_BASE=TRUE NC_SATA_B_R2D_CN MAKE_BASE=TRUE TRUE NC_SATA_B_R2D_CP TRUE FB_A1_A<8..0> FB_A1_EDC<3..0> TRUE FB_A1_WCLK_N<1..0> TRUE TRUE FB_B1_EDC<3..0> TRUE FB_B1_DQ<31..0> TRUE FB_B0_WCLK_P<1..0> TRUE FB_B0_WCLK_N<1..0> TRUE FB_B0_EDC<3..0> TRUE FB_B0_A<8..0> TRUE MEM_B_DQS_P<7..0> TRUE MEM_B_CS_L<1..0> TRUE MEM_B_CLK_P<1..0> MEM_B_CLK_N<1..0> TRUE TRUE MEM_A_DQ<63..0> TRUE MEM_A_A<15..0> TRUE MEM_A_CAS_L TRUE MEM_A_RAS_L TRUE MEM_A_WE_L TRUE FB_A1_WCLK_P<1..0> FB_A1_DBI_L<3..0> TRUE MAKE_BASE=TRUE TRUE NC_SATA_F_D2RP MAKE_BASE=TRUE NC_SATA_F_R2D_CN TRUE MAKE_BASE=TRUE TRUE NC_SATA_F_R2D_CP TRUE WS_KBD18 TRUE T29_R2D_C_P<1..0> T29_R2D_P<1..0> TRUE TRUE DP_T29SNK0_AUXCH_C_N DP_T29SNK0_ML_C_N<3..0> TRUE DP_T29SNK0_ML_P<3..0> TRUE PPVCORE_GPU TRUE TRUE PPDCIN_G3H TRUE DP_T29SNK1_ML_C_P<3..0> PSOC_MISO TRUE MAKE_BASE=TRUE TRUE NC_SATA_D_D2RN MAKE_BASE=TRUE TRUE NC_SATA_D_D2RP NC_PSOC_P1_3 NC_SATA_B_D2RN NC_SATA_B_D2RP NC_SATA_B_R2D_CN NC_SATA_B_R2D_CP DP_T29SNK1_AUXCH_P TRUE DP_T29SNK1_AUXCH_C_N TRUE TRUE DP_T29SNK1_AUXCH_C_P DP_T29SNK1_AUXCH_N TRUE DP_T29SNK1_ML_C_N<3..0> TRUE PP3V3_S3 TRUE PP3V3_S5 TRUE PP1V8R1V55_S0GPU_ISNS_R TRUE DP_SDRVA_ML_C_P<2> TRUE TRUE DP_SDRVA_ML_N<2> TRUE DP_SDRVA_ML_P<2> TRUE DP_SDRVA_ML_N<0> TP_DP_T29SRC_AUXCH_CN TRUE TP_DP_T29SRC_AUXCH_CP TRUE TP_DP_T29SRC_ML_CN<3..0> TRUE TP_DP_T29SRC_ML_CP<3..0> TRUE DP_SDRVA_ML_C_N<0> TRUE DP_SDRVA_ML_C_P<0> TRUE PP3V42_G3H TRUE TRUE PPBUS_G3H TRUE DP_SDRVA_ML_P<0> DP_SDRVA_ML_C_N<2> TRUE PPVCORE_S0_GFX TRUE TRUE TP_T29_PCIE_RESET0_L TP_T29_PCIE_RESET1_L TRUE SMC_TX_L TRUE TRUE SPIROM_USE_MLB T29_D2R_C_P<1..0> TRUE T29_R2D_N<1..0> TRUE PP1V8_GPUIFPX TRUE TRUE PP3V3_ENET Z2_KEY_ACT_L TRUE TRUE PP5V_S3 PICKB_L TRUE PSOC_F_CS_L TRUE Z2_RESET TRUE Z2_MOSI TRUE PPVTTDDR_S3 TRUE TRUE TP_FW643_VAUX_ENABLE PCIE_AP_D2R_P TRUE T29_R2D_C_N<1..0> TRUE NC_SATA_D_D2RN NC_SATA_D_R2D_CP NC_SATA_E_D2RP PPVP_FW TRUE TRUE PPVCORE_S0_CPU Z2_SCLK TRUE Z2_MISO TRUE Z2_CS_L TRUE Z2_HOST_INTN TRUE PPVBAT_G3H_CONN TRUE TP_FW643_VBUF TRUE TP_SMC_P24 TRUE NC_CLINK_CLK FDI_LSYNC<1..0> TRUE TP_USB_HUB1_PRTPWR1 TRUE FDI_INT TRUE TRUE FDI_FSYNC<1..0> FDI_DATA_P<1> TRUE TRUE TP_USB_HUB1_OCS1 TRUE TP_USB_HUB2_PRTPWR1 TRUE TP_FW643_TDO TRUE TP_FW643_TMS TRUE MAKE_BASE=TRUE NC_SATA_E_D2RN TRUE MAKE_BASE=TRUE NC_SATA_D_R2D_CN MAKE_BASE=TRUE TRUE NC_PCI_PME_L NC_PCI_PME_L MAKE_BASE=TRUE NC_PCI_CLK33M_OUT3 TRUE NC_PCI_CLK33M_OUT3 NC_PCIE_CLK100M_PE5P MAKE_BASE=TRUE TRUE NC_PCIE_CLK100M_PE7P DP_T29SNK1_ML_N<3..0> TRUE PP1V5_S3RS0 TRUE PP1V5_S3 TRUE PP1V2_S0 TRUE PP1V2_ENET TRUE ADAPTER_SENSE TRUE TRUE SMBUS_SMC_BSA_SDA SMC_BIL_BUTTON_L TRUE SMBUS_SMC_BSA_SCL TRUE SMBUS_SMC_BSA_SDA TRUE NC_PCIE_CLK100M_PE6P NC_GPU_GSTATE<1> TRUE MAKE_BASE=TRUE NC_PCIE_CLK100M_PE4N MAKE_BASE=TRUE NC_PCIE_CLK100M_PE5N TRUE TRUE T29DPA_D2R1_AUXCH_P TP_USB_HUB2_OCS1 TRUE TRUE TP_SMC_PF5 TRUE TP_DC_TEST_A62 TRUE TP_DC_TEST_D65 TP_FW643_TCK TRUE TRUE DC_TEST_BH3_BJ2 DC_TEST_BH1_BG2 TRUE NC_SATA_F_R2D_CP TRUE TP_SMC_P10 TRUE TP_P7_7 TRUE TP_PSOC_SCL TP_PSOC_SDA TRUE TRUE TP_FW643_SE TRUE TP_FW643_SDA TRUE TP_FW643_JASI_EN TRUE TP_FW643_FW620_L TRUE TP_FW643_CE TRUE TP_FW643_SM TRUE TP_FW643_OCR10_CTL TRUE TP_FW643_NAND_TREE TRUE TP_FW643_SCIFMC TRUE TP_FW643_SCIFDOUT TRUE TP_FW643_SCIFDAIN TRUE TP_FW643_SCIFCLK TRUE DMI_S2N_N<1> TRUE FDI_DATA_N<1> TRUE DMI_S2N_P<1> NC_HDA_SDIN1 TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE TRUE NC_LVDS_IG_CTRL_CLK NC_HDA_SDIN2 NC_LVDS_IG_CTRL_DATA NC_LVDS_IG_CTRL_DATA TRUE MAKE_BASE=TRUE NC_HDA_SDIN3 TP_AUD_GPIO_2 TRUE TRUE TP_AUD_GPIO_1 TP_AUD_LO1_L_N TRUE TRUE TP_AUD_LO1_L_P TRUE TP_SPI_DESCRIPTOR_OVERRIDE_L TP_BKL_FAULT TRUE TRUE CPUIMVP_BOOT1 TP_XDPPCH_HOOK2 TRUE TRUE TP_XDPPCH_HOOK3 TRUE TP_GMUX_PL6B PM_RSMRST_L TRUE TRUE CPUIMVP_BOOT2 DP_T29SNK0_AUXCH_P TRUE TRUE CPUIMVP_UGATE2 TRUE TP_1V05_S0_PCH_VCCAPLLEXP TRUE T29_D2R1_BIAS TRUE T29DPA_D2R1_AUXCH_N TRUE TP_T29_PCIE_RESET3_L TRUE TP_T29_PCIE_RESET2_L TRUE NC_PCIE_CLK100M_PEBP MAKE_BASE=TRUE NC_PCIE_CLK100M_PEBN TP_SMC_P41 NC_SATA_E_R2D_CP NC_SATA_E_D2RN NC_SATA_D_D2RP NC_SATA_F_R2D_CN TRUE GND TRUE GND TRUE GND GND TRUE TRUE GND TRUE GND GND TRUE GND TRUE TRUE GND TRUE GND TRUE GND TRUE GND GND TRUE 7 OF 132 6 OF 101 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 7 14 17 20 22 25 70 71 87 26 11 26 27 91 11 26 27 91 75 76 97 75 76 97 75 77 97 75 77 97 75 76 97 75 76 97 75 76 97 75 76 97 75 76 97 75 76 97 75 77 97 75 77 97 75 77 97 75 77 97 6 16 11 28 91 52 53 7 26 28 29 66 62 46 46 6 16 6 16 6 16 75 77 97 75 77 97 11 26 91 11 26 91 11 26 91 6 11 26 91 11 26 91 6 8 18 6 28 6 18 6 17 6 17 44 46 52 8 18 11 27 28 91 11 27 28 91 11 28 91 6 19 11 28 91 6 6 11 28 91 11 28 91 11 28 91 11 28 91 6 19 6 16 6 16 6 52 6 6 6 6 6 17 16 44 46 87 93 16 44 46 87 93 8 52 60 61 60 61 51 51 51 6 44 47 62 63 96 6 31 44 47 53 54 96 52 53 53 42 98 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 42 98 6 7 25 42 44 45 46 47 52 62 63 72 52 52 52 52 52 52 52 52 41 92 59 60 98 6 31 44 47 53 54 96 41 92 41 92 41 41 92 41 41 92 41 41 44 41 41 92 41 92 59 60 98 42 98 6 16 6 16 6 16 6 16 44 45 46 42 44 45 46 44 45 46 44 45 46 44 46 6 18 6 17 6 17 6 17 8 52 44 45 52 44 46 59 60 98 59 60 98 59 60 98 59 60 98 7 53 65 71 82 83 97 82 97 82 97 82 83 97 82 83 97 6 7 25 42 44 45 46 47 52 62 63 72 82 83 97 44 45 44 45 6 38 6 17 6 17 6 17 6 17 6 17 6 17 17 6 17 6 38 38 40 38 40 38 40 38 40 38 40 44 45 44 45 53 53 8 82 88 100 6 25 46 87 93 25 46 93 16 44 46 17 44 46 82 82 83 97 87 88 82 88 82 88 82 97 82 97 82 83 97 82 83 97 82 83 97 82 83 82 88 19 46 62 82 83 82 88 52 6 17 6 17 82 83 97 41 92 44 45 42 98 52 44 45 46 63 52 17 44 46 44 45 46 52 6 16 6 16 6 16 6 16 6 17 6 17 6 16 6 17 6 17 6 17 6 17 6 17 6 38 6 17 6 17 6 17 6 17 6 16 6 16 6 16 6 6 17 6 17 17 38 40 94 38 40 94 38 40 94 6 38 6 17 6 17 6 17 6 17 6 16 52 52 6 18 51 31 31 45 52 52 52 52 52 42 16 31 93 6 31 44 47 53 54 96 52 53 52 82 83 97 82 83 97 82 83 97 52 53 82 88 82 88 31 93 31 93 31 44 45 31 31 98 31 98 17 25 31 84 62 31 6 31 44 47 53 54 96 41 42 6 17 6 17 6 17 6 17 6 17 17 25 44 6 17 6 17 6 17 6 17 6 17 17 6 17 6 17 6 6 17 17 6 17 6 16 8 18 6 6 16 6 16 41 46 52 52 52 52 98 31 92 31 92 7 38 39 41 45 41 43 6 16 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 33 84 95 17 29 44 72 33 84 95 84 85 95 84 85 95 46 52 6 6 33 95 33 78 95 33 95 60 61 98 31 44 47 50 79 96 31 44 47 50 79 96 53 33 78 95 84 85 95 33 95 6 19 6 6 75 76 97 75 76 97 75 76 97 75 77 97 75 77 97 75 77 97 75 77 97 75 77 97 75 77 97 11 27 28 91 11 28 91 11 28 91 11 28 91 11 26 27 91 11 26 91 11 26 91 11 26 91 11 26 91 75 76 97 75 76 97 6 16 6 16 6 16 52 33 84 95 84 95 33 78 95 33 78 95 33 95 7 48 74 81 7 48 62 63 33 78 95 52 53 6 16 6 16 6 52 6 6 6 6 33 95 33 78 95 33 78 95 33 95 33 78 95 84 95 84 95 84 95 84 95 33 33 33 33 84 95 84 95 6 7 25 42 44 45 46 47 52 62 63 72 7 8 35 39 48 49 62 63 88 84 95 84 95 33 33 42 44 45 46 19 46 55 84 85 95 84 95 7 71 100 52 53 52 53 52 53 52 53 52 53 7 30 66 38 16 31 93 33 84 95 6 16 6 16 6 16 7 39 40 7 12 14 48 68 101 52 53 52 53 52 53 52 53 62 63 38 44 45 6 16 9 17 90 24 9 17 90 9 17 90 24 24 38 38 6 16 6 16 6 18 6 18 6 18 6 18 6 19 33 95 98 7 26 28 29 66 71 7 70 87 7 36 70 62 6 44 47 62 63 96 44 45 62 6 44 47 62 63 96 6 44 47 62 63 96 6 19 6 6 85 95 24 44 45 12 12 38 12 12 6 16 44 45 52 52 52 38 38 38 38 38 38 38 38 38 38 38 38 9 17 90 9 17 90 6 16 6 18 6 16 6 18 6 18 6 16 56 56 56 56 44 88 67 68 23 23 87 17 72 67 68 33 95 67 68 20 85 95 33 33 6 16 6 16 44 45 6 16 6 16 6 16 6 16
  • 7. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 3.3V Rails Chipset "VCore" Rails 5V Rails FireWire Rails "GPU" Rails Backlight Rails ENET Rails 1.8V/1.5V/1.2V/1.05V Rails 2A max supply T29 Rails For PCH RTC Power G3H Rails Power Aliases SYNC_DATE=04/27/2010 SYNC_MASTER=K18_MLB PP3V3_S0 MIN_NECK_WIDTH=0.075 mm VOLTAGE=3.3V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.5 MM PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 MIN_NECK_WIDTH=0.2 MM MAKE_BASE=TRUE VOLTAGE=3.3V MIN_LINE_WIDTH=0.4 MM PP3V3_T29 PP1V05_T29 VOLTAGE=15V MAKE_BASE=TRUE PP15V_T29 MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM PP1V05_T29 VOLTAGE=1.05V MAKE_BASE=TRUE PP3V3_T29 PP3V3_T29 PP3V3_T29 PP3V3_T29 PP15V_T29 PP5V_S0 PP5V_S0 PP15V_T29 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP1V05_T29 PP3V3_T29 MAKE_BASE=TRUE PP5V_S0 VOLTAGE=5V MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM PP3V3_S0 MAKE_BASE=TRUE VOLTAGE=3.3V MIN_LINE_WIDTH=0.50MM PP3V3_S3 MIN_NECK_WIDTH=0.20MM PP3V3_S3 PP3V3_S3 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S4 PP3V3_S5 MIN_LINE_WIDTH=0.3 MM VOLTAGE=0.75V MAKE_BASE=TRUE PPVTTDDR_S3 MIN_NECK_WIDTH=0.2 MM PP3V3_S5 PP5V_S0 PP5V_S0 PP5V_S0 MAKE_BASE=TRUE VOLTAGE=3.3V PP3V3_S4 MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM PP3V3_S4 PP3V3_SUS PP3V3_SUS PP3V3_SUS PP3V3_SUS PP5V_S3 PP3V3_S0 PP3V3_S0 PP1V05_SUS MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM VOLTAGE=1.05V MAKE_BASE=TRUE PPVIN_S5_HS_OTHER_ISNS PPVIN_S5_HS_COMPUTING_ISNS PPBUS_G3H PPBUS_G3H PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PP3V3_S0 PPVIN_S5_HS_GPU_ISNS MIN_NECK_WIDTH=0.25 mm MIN_LINE_WIDTH=0.6 mm VOLTAGE=12.8V MAKE_BASE=TRUE PPVIN_S5_HS_OTHER_ISNS PPDCIN_G3H MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM VOLTAGE=1.0V MAKE_BASE=TRUE PP1V0_FW_FWPHY PP3V3_FW_FWPHY PP1V0_FW_FWPHY PP3V3_ENET PPVIN_S5_HS_OTHER_ISNS MIN_LINE_WIDTH=0.6 MM PPDCIN_G3H MIN_NECK_WIDTH=0.25 MM MAKE_BASE=TRUE VOLTAGE=18.5V PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP5V_S3 PP5V_S3 PP5V_S0 PP3V3_SUS PP3V3_SUS PP3V3_SUS PP3V3_SUS PP3V3_S4 PP1V05_S0 PP1V05_SUS PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H PPBUS_G3H PPVIN_S5_HS_COMPUTING_ISNS MIN_LINE_WIDTH=0.6 mm MAKE_BASE=TRUE VOLTAGE=12.8V MIN_NECK_WIDTH=0.25 mm PPVIN_S5_HS_COMPUTING_ISNS PPDCIN_G3H PPVIN_S5_HS_COMPUTING_ISNS PPVIN_S5_HS_COMPUTING_ISNS MIN_NECK_WIDTH=0.25 mm MIN_LINE_WIDTH=0.6 mm MAKE_BASE=TRUE VOLTAGE=12.8V PPVIN_S5_HS_GPU_ISNS PPVIN_S5_HS_COMPUTING_ISNS PPVIN_S5_HS_GPU_ISNS PPVIN_S5_HS_COMPUTING_ISNS PPVIN_S5_HS_GPU_ISNS VOLTAGE=3.42V MAKE_BASE=TRUE PPVRTC_G3H MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.3 MM VOLTAGE=5V MAKE_BASE=TRUE PP5V_S5 MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.5 MM PP5V_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V2_S0 MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.2V MAKE_BASE=TRUE PP5V_S0 PP5V_S0 PP1V05_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP5V_S0 PP1V8_S0 PP1V8_S0 PP1V8_S0 PP1V8_S0 PP1V8_S0 PP1V8_S0 PP1V8_S0 PPVCCSA_S0_REG PPVCCSA_S0_REG MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.5V MAKE_BASE=TRUE PP1V8_S0 MIN_NECK_WIDTH=0.2 MM MAKE_BASE=TRUE PPVCCSA_S0_REG MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=0.9V MIN_NECK_WIDTH=0.2 MM VOLTAGE=3.3V MIN_LINE_WIDTH=0.6 MM PP3V3_ENET MAKE_BASE=TRUE PP1V2_ENET PP1V8_S0_CPU_VCCPLL_R MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.5V PP1V5_S3RS0_CPUDDR PP1V5_S0 PP1V5_S0 VOLTAGE=1.5V MIN_NECK_WIDTH=0.2 MM PP1V5_S0 MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE PP1V5_S0 PP1V5_S3RS0_CPUDDR PP1V5_S3RS0_CPUDDR PP1V5_S3 PP1V5_S3 PP1V5_S3 PP1V8_S0_CPU_VCCPLL_R MAKE_BASE=TRUE VOLTAGE=1.8V MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM PP5V_S5 PP3V42_G3H PP3V42_G3H PP1V5_S3_CPU_VCCDQ PP1V05_S0_CPU_VCCPQE PP3V3_ENET VOLTAGE=12.8V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.25 mm PPBUS_SW_BKL MIN_LINE_WIDTH=0.6 mm PPBUS_SW_BKL PP1V0_S0GPU_ISNS PP1V0_S0GPU MAKE_BASE=TRUE VOLTAGE=1.0V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM PP1V5_S0GPU_ISNS MAKE_BASE=TRUE VOLTAGE=1.5V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM PP1V5_GPU_REG VOLTAGE=1.5V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE PP1V8_S0GPU_ISNS VOLTAGE=1.8V MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE MIN_NECK_WIDTH=0.15 MM PP1V8_GPUIFPX VOLTAGE=1.8V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.15 MM MIN_LINE_WIDTH=0.6 MM PP1V8_GPUIFPX PP1V5_GPU_REG PP1V5_S0GPU_ISNS PP3V3_S0GPU PP3V3_S0GPU PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V5_S0GPU_ISNS PP1V5_S0GPU_ISNS PP1V0_S0GPU PP1V8_S0GPU_ISNS PP1V0_S0GPU PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.0V MAKE_BASE=TRUE PPVCORE_GPU PPVCORE_GPU MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.0V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.25 MM VOLTAGE=1.25V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM PPVCORE_S0_CPU MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM PPVCORE_S0_AXG PPVCORE_S0_CPU PPVCORE_S0_AXG PPVCORE_S0_AXG PP1V5_S3_CPU_VCCDQ MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.5V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM PP1V05_S0_CPU_VCCPQE MAKE_BASE=TRUE VOLTAGE=1.05V PP3V3_FW_FWPHY VOLTAGE=1.2V MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.6 MM MAKE_BASE=TRUE PP1V2_ENET PP3V3_ENET PP3V3_ENET PP1V2_ENET PP1V2_S0 PP1V5_S0GPU_ISNS PP3V42_G3H PPVRTC_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PP3V42_G3H PPDCIN_G3H PPVRTC_G3H PP5V_S5 PP5V_S5 PP5V_S5 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V8_S0GPU_ISNS PP1V8_GPUIFPX PP3V3_S0GPU PP3V3_S0GPU MAKE_BASE=TRUE VOLTAGE=3.3V MIN_NECK_WIDTH=0.10MM MIN_LINE_WIDTH=0.3 MM PP3V3_S0GPU PP3V3_S0GPU PP3V3_S0GPU PP3V3_S0GPU PP1V8_S0GPU_ISNS PP1V5_GPU_REG PP1V5_S0GPU_ISNS PPVCORE_S0_CPU PPVP_FW MIN_NECK_WIDTH=0.2 MM MIN_LINE_WIDTH=0.4 MM MAKE_BASE=TRUE VOLTAGE=12.8V PPVP_FW PPVP_FW PP1V0_FW_FWPHY VOLTAGE=3.3V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.4 MM PP3V3_FW_FWPHY MIN_NECK_WIDTH=0.2 MM PPVP_FW PP3V42_G3H PP3V3_S5 PP1V05_S0 PP5V_SUS PP5V_S3 MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.2 mm MAKE_BASE=TRUE VOLTAGE=5V PP3V42_G3H PP0V75_S0_DDRVTT PP0V75_S0_DDRVTT PPVCORE_GPU PPVTTDDR_S3 PP1V05_SUS PP0V75_S0_DDRVTT PP0V75_S0_DDRVTT PP1V8_S0GPU_ISNS PP1V5_S3 VOLTAGE=1.5V MAKE_BASE=TRUE PP1V5_S3 MIN_LINE_WIDTH=0.2 mm MIN_NECK_WIDTH=0.17 mm PP1V5_S3RS0_CPUDDR PP1V5_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V2_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0 PP5V_S3 PP5V_SUS PP1V5_S3 PP1V5_S3 MIN_NECK_WIDTH=0.17 mm MAKE_BASE=TRUE VOLTAGE=0.75V MIN_LINE_WIDTH=2 mm PP0V75_S0_DDRVTT PP3V42_G3H PP3V42_G3H PP3V42_G3H PP5V_S3 PP5V_S3 PP1V8_S0 PP3V42_G3H MAKE_BASE=TRUE VOLTAGE=3.42V MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM PP5V_SUS MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=5V MAKE_BASE=TRUE PP5V_S5 PP5V_S3 PP5V_S3 PP5V_S3 PP5V_S3 MIN_NECK_WIDTH=0.25 mm VOLTAGE=12.8V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 mm PPBUS_G3H PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP5V_S0 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S3 PP3V3_S5 PP3V3_S5 PP3V3_S5 PP3V3_S3 PP5V_S3 PP5V_S3 PP5V_S3 MIN_NECK_WIDTH=0.2 MM VOLTAGE=3.3V MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM PP3V3_S5 MIN_LINE_WIDTH=0.6 MM VOLTAGE=3.3V MAKE_BASE=TRUE MIN_NECK_WIDTH=0.2 MM PP3V3_SUS PP1V05_S0 MAKE_BASE=TRUE MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.05V MIN_NECK_WIDTH=0.2 MM 8 OF 132 7 OF 101 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 7 16 19 25 33 34 35 87 7 34 35 7 8 35 85 7 34 35 7 16 19 25 33 34 35 87 7 16 19 25 33 34 35 87 7 16 19 25 33 34 35 87 7 16 19 25 33 34 35 87 7 8 35 85 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 7 8 35 85 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 7 34 35 7 16 19 25 33 34 35 87 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 7 45 52 53 71 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 30 66 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 7 45 52 53 71 7 45 52 53 71 7 16 17 18 19 20 22 45 70 71 72 7 16 17 18 19 20 22 45 70 71 72 7 16 17 18 19 20 22 45 70 71 72 7 16 17 18 19 20 22 45 70 71 72 6 7 29 31 41 42 43 45 65 66 71 81 100 7 23 70 7 49 65 7 49 64 66 67 68 69 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 7 49 81 86 7 49 65 6 7 48 62 63 6 7 38 39 6 7 38 39 40 6 7 38 39 6 7 25 36 70 72 7 49 65 6 7 48 62 63 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 7 16 17 18 19 20 22 45 70 71 72 7 16 17 18 19 20 22 45 70 71 72 7 16 17 18 19 20 22 45 70 71 72 7 16 17 18 19 20 22 45 70 71 72 7 45 52 53 71 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 7 23 70 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 6 7 8 35 39 48 49 62 63 88 7 49 64 66 67 68 69 7 49 64 66 67 68 69 6 7 48 62 63 7 49 64 66 67 68 69 7 49 64 66 67 68 69 7 49 81 86 7 49 64 66 67 68 69 7 49 81 86 7 49 64 66 67 68 69 7 49 81 86 6 7 53 65 71 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 70 87 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 14 17 20 22 25 70 71 87 6 7 14 17 20 22 25 70 71 87 6 7 14 17 20 22 25 70 71 87 6 7 14 17 20 22 25 70 71 87 6 7 14 17 20 22 25 70 71 87 6 7 14 17 20 22 25 70 71 87 6 7 14 17 20 22 25 70 71 87 7 12 15 64 7 12 15 64 6 7 14 17 20 22 25 70 71 87 7 12 15 64 6 7 25 36 70 72 6 7 36 70 7 10 13 15 29 71 72 7 16 20 22 25 41 56 70 7 16 20 22 25 41 56 70 7 16 20 22 25 41 56 70 7 16 20 22 25 41 56 70 7 10 13 15 29 71 72 7 10 13 15 29 71 72 6 7 26 28 29 66 71 6 7 26 28 29 66 71 7 12 14 6 7 53 65 71 6 7 25 42 44 45 46 47 52 62 63 72 7 12 15 7 10 12 14 6 7 25 36 70 72 7 88 100 7 88 100 7 73 74 78 80 100 7 86 100 7 74 75 76 77 100 7 86 100 7 74 78 80 100 6 7 71 100 6 7 71 100 7 86 100 7 74 75 76 77 100 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 78 80 100 7 74 75 76 77 100 7 74 75 76 77 100 7 86 100 7 74 78 80 100 7 86 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 7 73 74 78 80 100 6 7 48 74 81 6 7 48 74 81 6 7 12 14 48 68 101 7 12 13 15 48 68 6 7 12 14 48 68 101 7 12 13 15 48 68 7 12 13 15 48 68 7 12 15 7 10 12 14 6 7 38 39 40 6 7 36 70 6 7 25 36 70 72 6 7 25 36 70 72 6 7 36 70 7 74 75 76 77 100 6 7 25 42 44 45 46 47 52 62 63 72 7 16 17 20 25 6 7 25 42 44 45 46 47 52 62 63 72 6 7 25 42 44 45 46 47 52 62 63 72 6 7 25 42 44 45 46 47 52 62 63 72 6 7 25 42 44 45 46 47 52 62 63 72 6 7 48 62 63 7 16 17 20 25 6 7 53 65 71 6 7 53 65 71 6 7 53 65 71 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 7 74 78 80 100 6 7 71 100 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 6 7 71 74 78 79 81 83 7 74 78 80 100 7 86 100 7 74 75 76 77 100 6 7 39 40 6 7 39 40 6 7 39 40 6 7 38 39 6 7 38 39 40 6 7 25 42 44 45 46 47 52 62 63 72 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 7 22 71 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 25 42 44 45 46 47 52 62 63 72 6 7 26 28 29 66 6 7 26 28 29 66 6 7 48 74 81 6 7 30 66 7 23 70 6 7 26 28 29 66 6 7 26 28 29 66 7 74 78 80 100 6 7 26 28 29 66 71 6 7 26 28 29 66 71 7 16 20 22 25 41 56 70 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 70 87 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 29 31 41 42 43 45 65 66 71 81 100 7 22 71 6 7 26 28 29 66 71 6 7 26 28 29 66 71 6 7 26 28 29 66 6 7 25 42 44 45 46 47 52 62 63 72 6 7 25 42 44 45 46 47 52 62 63 72 6 7 25 42 44 45 46 47 52 62 63 72 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 14 17 20 22 25 70 71 87 6 7 25 42 44 45 46 47 52 62 63 72 7 22 71 6 7 53 65 71 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 8 22 41 46 51 53 64 67 68 69 71 72 86 88 101 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 29 31 41 42 43 45 65 66 71 81 100 6 7 17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98 7 16 17 18 19 20 22 45 70 71 72 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101
  • 8. II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 Short (IO Row) EMI pogo pins Tall EMI pogo pins Keyboard / IPD Conn Protect Thermal Module Holes GPU signals GMUX ALIASES Heat spreader mounting boss for T29 router Heat spreader mounting boss for PCH Left Speaker Holes Unused PEG signals Frame Holes CPU signals T29 / GMUX JTAG Signals T29 Signals Through PEG Unused T29 Ports Digital Ground Fan Holes SM XW0901 1 2 SM XW0902 1 2 SM XW0903 1 2 STDOFF-4.0OD1.85H-SM SH0920 1 STDOFF-4.0OD1.85H-SM SH0923 1 STDOFF-4.0OD2.23H-SM SH0921 1 STDOFF-4.0OD2.23H-SM SH0922 1 MF-LF 2 1 R0916 1/16W 402 5% 10K 5% 1/16W 2 1 402 MF-LF R0915 10K 1/8W MF-LF 805 R0950 T29BST:N 0 5% 1 2 C0905 10% 2 201 0.01UF 10V 1 X5R R0921 MF 51 1/20W 2 201 5% 1 0.01UF C0901 10% 10V X5R 1 2 201 X5R C0902 0.01UF 2 10V 201 10% 1 R0922 51 5% 1/20W 201 2 1 MF 2 10V 201 10% 1 X5R 0.01UF C0903 R0923 201 1/20W 5% 2 1 MF 51 C0904 0.01UF 2 10V 201 10% 1 X5R R0924 201 2 1 5% MF 1/20W 51 C0906 0.01UF X5R 201 2 10V 10% 1 201 R0926 2 1 MF 1/20W 51 5% 10% 10V 0.01UF 2 1 201 X5R C0907 201 R0927 1 2 5% MF 51 1/20W C0908 0.01UF 2 X5R 1 10% 10V 201 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0984 1 3R2P5 ZT0990 1 3R2P5 ZT0960 1 SL-3.1X2.7-6CIR-NSP ZT0950 TH 1 1 3R2P5 ZT0940 3R2P5 ZT0915 1 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0986 1 STDOFF-4.5OD.98H-1.1-3.48-TH 1 ZT0981 ZT0985 1 STDOFF-4.5OD.98H-1.1-3.48-TH SH0917 SM 1 1.4DIA-SHORT-SILVER-K99 SM SH0901 1 1.4DIA-SHORT-SILVER-K99 SM SH0912 1 1.4DIA-SHORT-SILVER-K99 SM SH0910 1 1.4DIA-SHORT-SILVER-K99 SM SH0911 1 1.4DIA-SHORT-SILVER-K99 SM SH0913 1 1.4DIA-SHORT-SILVER-K99 POGO-2.0OD-3.5H-K86-K87 1 SH0903 SM POGO-2.0OD-3.5H-K86-K87 1 SM SH0916 POGO-2.0OD-3.5H-K86-K87 1 SH0902 SM POGO-2.0OD-3.5H-K86-K87 1 SM SH0900 POGO-2.0OD-3.5H-K86-K87 SM 1 SH0904 SM SH0914 1 1.4DIA-SHORT-SILVER-K99 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0991 1 ZT0988 STDOFF-4.5OD.98H-1.1-3.48-TH 1 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0989 1 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0987 1 STDOFF-4.5OD.98H-1.1-3.48-TH ZT0980 1 4.0OD1.85H-M1.6X0.35 ZT0952 1 4.0OD1.85H-M1.6X0.35 ZT0953 1 STDOFF-4.0OD3.0H-TH ZT0934 1 ZT0935 1 STDOFF-4.0OD3.0H-TH STDOFF-4.5OD.98H-1.1-3.48-TH ZT0930 1 NOSTUFF R09031 402 10K 5% 2 MF-LF 1/16W 2 1 R0904 NOSTUFF 10K 5% 1/16W MF-LF 402 1/16W R0901 4.7K 2 402 MF-LF 5% 1 NOSTUFF MF-LF 402 5% 1/16W 10K 1 2 R0913 1/16W 402 5% MF-LF 1 2 10K NOSTUFF R0914 SYNC_MASTER=K18_MLB SYNC_DATE=04/27/2010 Signal Aliases T29_A_BIAS_R DP_IG_DDC_DATA MAKE_BASE=TRUE MAKE_BASE=TRUE DP_IG_HPD MAKE_BASE=TRUE DP_IG_DDC_CLK DP_IG_AUX_CH_N TP_DP_IG_B_MLP<3..0> DP_A_BIAS0 DP_A_BIAS2 DP_IG_DDC_DATA NC_PCH_CLKOUT_DPN TRUE MAKE_BASE=TRUE DP_IG_AUX_CH_P TP_DP_IG_B_MLN<3..0> DP_IG_DDC_CLK GND GND TRUE MAKE_BASE=TRUE NC_PCIE_CLK100M_EXCARD_N TP_SMC_EXCARD_PWR_EN PEG_R2D_C_P<7..0> MAKE_BASE=TRUE MAKE_BASE=TRUE JTAG_ISP_TDO PPBUS_G3H NC_PCIE_EXCARD_D2R_P T29_LSEO_LSOE2 DP_IG_HPD NO_TEST=TRUE NC_DPB_EG_AUX_CHP MAKE_BASE=TRUE NO_TEST=TRUE NC_DPB_EG_MLP<3..0> MAKE_BASE=TRUE DPB_EG_ML_N<3..0> NO_TEST=TRUE NC_DPB_EG_AUX_CHN MAKE_BASE=TRUE NC_DPB_EG_DDC_DATA NC_PCIE_EXCARD_R2D_C_N TRUE MAKE_BASE=TRUE NC_DP_IG_MLP<3..0> MAKE_BASE=TRUE NO_TEST=TRUE NO_TEST=TRUE NC_DPB_EG_MLN<3..0> MAKE_BASE=TRUE NO_TEST=TRUE NC_DPB_EG_DDC_CLK MAKE_BASE=TRUE DP_EG_AUXCH_N FW643_WAKE_L NC_DPB_EG_DDC_DATA NO_TEST=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE TRUE NC_PCH_GPIO65_CLKOUTFLEX1 NC_DP_IG_MLN<3..0> MAKE_BASE=TRUE NO_TEST=TRUE LCD_BKLT_EN DP_EG_AUXCH_P NC_DPB_EG_DDC_CLK NC_DPB_EG_AUX_CHN JTAG_ISP_TCK USB_T29A_P TRUE MAKE_BASE=TRUE NC_PCH_GPIO64_CLKOUTFLEX0 USB_T29A_N MAKE_BASE=TRUE USB_SDCARD_N MAKE_BASE=TRUE USB_SDCARD_P USB_EXTC_P USB_EXTC_N =PEG_R2D_C_P<7..0> MAKE_BASE=TRUE JTAG_ISP_TCK NC_PCH_GPIO65_CLKOUTFLEX1 NC_RT_GAIN_TP NO_TEST=TRUE MAKE_BASE=TRUE NC_PCIE_EXCARD_D2R_P MAKE_BASE=TRUE TRUE NC_USB_HUB2_OCS4 MAKE_BASE=TRUE USB_SDCARD_P USB_SDCARD_N PP3V3_S3 NC_FSB_CLK133M_PCHP MAKE_BASE=TRUE GMUX_VSYNC T29_LSEO_LSOE3 MAKE_BASE=TRUE PM_ALL_GPU_PGOOD TP_LVDS_MUX_SEL_EG NO_TEST=TRUE MAKE_BASE=TRUE =PEG_D2R_N<15..12> =PEG_D2R_P<15..12> TP_LVDS_IG_B_CLKN MAKE_BASE=TRUE MAKE_BASE=TRUE TP_LVDS_IG_B_CLKP T29_LSEO_LSOE2 MAKE_BASE=TRUE NO_TEST=TRUE NC_PEG_R2D_C_N<15..12> JTAG_ISP_TDO NC_PEG_R2D_C_P<15..12> NO_TEST=TRUE MAKE_BASE=TRUE NO_TEST=TRUE NC_LVDS_IG_A_DATAN<3> MAKE_BASE=TRUE MAKE_BASE=TRUE NC_LVDS_IG_A_DATAP<3> NO_TEST=TRUE NC_PEG_D2R_N<15..12> NO_TEST=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE PCIE_T29_R2D_C_N<3..0> NO_TEST=TRUE MAKE_BASE=TRUE NC_T29_D2RN<3..2> NC_T29_R2D_CP<3..2> NO_TEST=TRUE MAKE_BASE=TRUE GND NC_USB_HUB1_OCS4 MAKE_BASE=TRUE MAKE_BASE=TRUE NC_GPU_XTALOUT NO_TEST=TRUE NC_PCIE_CLK100M_EXCARD_N T29_R2D_C_P<3..2> T29_LSEO_LSOE3 MAKE_BASE=TRUE NO_TEST=TRUE JTAG_ISP_TDI MAKE_BASE=TRUE MAKE_BASE=TRUE PEG_D2R_P<7..0> =PEG_R2D_C_N<7..0> NC_LVDS_IG_B_DATAN<3> NO_TEST=TRUE MAKE_BASE=TRUE MAKE_BASE=TRUE FW643_WAKE_L T29_D2R_P<3..2> PEX_CLKREQ_L GND GND MAKE_BASE=TRUE EG_RESET_L LVDS_IG_BKL_ON MAKE_BASE=TRUE MAKE_BASE=TRUE PEG_D2R_N<7..0> =PEG_D2R_P<7..0> NO_TEST=TRUE NC_FSB_CLK133M_PCHN MAKE_BASE=TRUE NO_TEST=TRUE NC_FSB_CLK133M_PCHP MAKE_BASE=TRUE T29_D2R_N<3..2> NC_SW_GAIN_TP NO_TEST=TRUE MAKE_BASE=TRUE JTAG_ISP_TDI TP_LVDS_MUX_SEL_EG NC_T29_R2D_CN<3..2> MAKE_BASE=TRUE NO_TEST=TRUE TP_SMC_EXCARD_PWR_EN MAKE_BASE=TRUE NC_PCIE_EXCARD_D2R_N NC_PCIE_EXCARD_R2D_C_P NC_PCIE_EXCARD_R2D_C_N =PEG_D2R_N<11..8> TP_CPU_VTT_SELECT GFXIMVP_VID<0..6> CPUIMVP_VID<0..6> MAKE_BASE=TRUE TP_CPU_VTT_SELECT MAKE_BASE=TRUE PEG_CLKREQ_L GND_CHASSIS_AUDIO_JACK MAKE_BASE=TRUE PEX_CLKREQ_L PPVOUT_S0_LCDBKLT MAKE_BASE=TRUE MEMVTT_EN MAKE_BASE=TRUE MAKE_BASE=TRUE CPU_VID<0..6> GFX_VID<0..6> MAKE_BASE=TRUE =PEG_R2D_C_P<15..12> =PEG_D2R_P<11..8> =PEG_R2D_C_P<11..8> LVDS_IG_BKL_ON PEG_CLKREQ_L GMUX_VSYNC LVDS_IG_PANEL_PWR =PEG_R2D_C_N<15..12> MAKE_BASE=TRUE NC_PEG_D2R_P<15..12> NO_TEST=TRUE NC_LVDS_IG_B_DATAP<3> NO_TEST=TRUE MAKE_BASE=TRUE NC_LVDS_IG_B_DATAN<3> MEMVTT_EN NC_USB_HUB2_OCS4 TP_LVDS_IG_B_CLKP NC_LVDS_IG_B_DATAP<3> NC_LVDS_IG_A_DATAN<3> NC_LVDS_IG_A_DATAP<3> TP_LVDS_IG_BKL_PWM TP_LVDS_IG_B_CLKN MAKE_BASE=TRUE PEG_R2D_C_N<7..0> MAKE_BASE=TRUE NO_TEST=TRUE NC_T29_D2RP<3..2> MAKE_BASE=TRUE PCIE_T29_D2R_N<3..0> GND NC_PCH_GPIO64_CLKOUTFLEX0 PP5V_S0_AUDIO_AMP_R PP5V_S0 GND PM_ALL_GPU_PGOOD JTAG_ISP_TCK T29_LSEO_LSOE2 NO_TEST=TRUE MAKE_BASE=TRUE T29_LSEO_LSOE3 PP3V3_S3 NC_FSB_CLK133M_PCHN PP5V_S0_AUDIO_AMP_L FW_PLUG_DET_L MAKE_BASE=TRUE LVDS_IG_PANEL_PWR MAKE_BASE=TRUE NC_SW_GAIN_TP MAKE_BASE=TRUE TP_LVDS_IG_BKL_PWM NC_GPU_XTALOUT NC_USB_HUB1_OCS4 PP3V3_S3 EG_RESET_L =PEG_D2R_N<7..0> =PEG_R2D_C_N<11..8> MAKE_BASE=TRUE PCIE_T29_R2D_C_P<3..0> PCIE_T29_D2R_P<3..0> MAKE_BASE=TRUE T29_R2D_C_N<3..2> TRUE MAKE_BASE=TRUE NC_PCIE_EXCARD_D2R_N DP_EG_AUXCH_P MAKE_BASE=TRUE MAKE_BASE=TRUE DP_EG_AUXCH_N FW_PLUG_DET_L MAKE_BASE=TRUE PM_ENET_EN MAKE_BASE=TRUE DP_IG_AUX_CH_N NC_PEG_B_CLKRQ_L_GPIO56 TRUE MAKE_BASE=TRUE DP_IG_AUX_CH_P MAKE_BASE=TRUE NC_PCH_GPIO66_CLKOUTFLEX2 TRUE MAKE_BASE=TRUE NC_PCH_GPIO67_CLKOUTFLEX3 TRUE MAKE_BASE=TRUE NC_RT_GAIN_TP NC_LT_GAIN_TP NC_PCH_GPIO67_CLKOUTFLEX3 NC_PCIE_CLK100M_EXCARD_P TP_ISSP_SDATA_P1_0 NC_PCIE_EXCARD_R2D_C_P TRUE MAKE_BASE=TRUE NC_PCIE_CLK100M_EXCARD_P MAKE_BASE=TRUE TRUE PM_ENET_EN PPVOUT_S0_LCDBKLT MAKE_BASE=TRUE TP_ISSP_SDATA_P1_0 T29_A_BIAS_R T29_A_BIAS_R T29_A_BIAS_R NC_PCIECLKRQ4_L_GPIO26 MAKE_BASE=TRUE TRUE NC_PCIECLKRQ4_L_GPIO26 T29_A_BIAS_R2D_N1 NC_PCH_CLKOUT_DPP TRUE MAKE_BASE=TRUE T29_A_BIAS_D2R_P1 NC_PEG_B_CLKRQ_L_GPIO56 T29_A_BIAS_R PP5V_S0_AUDIO PP5V_S0_AUDIO MAKE_BASE=TRUE NO_TEST=TRUE NC_LT_GAIN_TP MAKE_BASE=TRUE NC_PCH_GPIO66_CLKOUTFLEX2 T29_A_BIAS_R2D_P0 T29_A_BIAS_R2D_N0 T29_A_BIAS_R2D_P1 GND T29_A_BIAS_R T29_A_BIAS_D2R_N1 DPB_EG_ML_P<3..0> NC_DPB_EG_AUX_CHP TP_ISSP_SCLK_P1_1 GND GND TP_ISSP_SCLK_P1_1 MAKE_BASE=TRUE NC_PCH_CLKOUT_DPN NC_PCH_CLKOUT_DPP PP15V_T29 MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.095 mm VOLTAGE=0V GND 9 OF 132 8 OF 101 8 85 8 17 79 83 8 17 83 8 17 79 83 8 17 83 92 84 84 8 17 79 83 8 16 8 17 83 92 8 17 79 83 8 16 93 8 73 90 8 19 33 87 6 7 35 39 48 49 62 63 88 8 16 8 33 8 17 83 8 8 8 8 16 17 8 8 78 83 97 8 38 39 8 8 16 17 87 88 8 78 83 97 8 8 8 19 23 33 87 24 92 8 16 24 92 8 24 8 24 24 92 24 92 9 8 19 23 33 87 8 16 8 8 16 8 24 8 24 8 24 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 8 8 87 88 8 33 8 73 81 86 87 89 8 87 6 8 18 6 8 18 8 33 9 8 19 33 87 9 8 18 92 8 18 92 9 33 93 33 33 8 24 8 8 16 93 95 8 19 33 87 73 90 9 8 18 8 38 39 95 8 79 87 8 73 87 8 18 87 73 90 9 8 8 95 8 8 19 33 87 8 87 33 8 8 16 8 16 8 16 8 90 8 90 8 16 87 60 8 79 87 6 8 82 88 100 8 29 66 90 90 8 18 87 8 16 87 8 87 88 8 18 87 9 8 18 8 18 8 29 66 8 24 6 8 18 8 18 8 18 92 8 18 92 6 8 18 6 8 18 73 90 33 9 33 93 8 16 59 6 7 22 41 46 51 53 64 67 68 69 71 72 86 88 101 8 73 81 86 87 89 8 19 23 33 87 8 33 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 8 59 8 19 39 8 18 87 8 6 8 18 8 8 24 6 7 8 18 19 24 25 29 30 31 32 47 48 49 53 54 71 72 87 8 73 87 9 9 33 93 9 33 93 95 8 16 8 78 83 97 8 19 39 8 8 17 83 92 8 8 17 83 92 8 16 8 16 8 8 8 16 8 16 93 6 8 52 8 16 8 16 93 8 6 8 82 88 100 6 8 52 8 85 8 85 8 85 8 8 84 8 16 85 8 8 85 8 56 8 56 8 8 16 84 84 84 8 85 85 8 6 8 52 6 8 52 8 16 8 16 7 35 85
  • 9. IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT EDP_HPD EDP_COMPIO EDP_ICOMPO EDP_AUX* EDP_AUX EDP_TX_3 EDP_TX_2 EDP_TX_1 EDP_TX_0 EDP_TX_3* EDP_TX_2* EDP_TX_1* EDP_TX_0* DMI_TX_3* FDI1_LSYNC FDI0_LSYNC FDI_TX_3 FDI0_FSYNC FDI1_FSYNC FDI_INT FDI_TX_1 FDI_TX_0 FDI_TX_2 FDI_TX_3* FDI_TX_2* FDI_TX_1* DMI_TX_1* DMI_TX_2* DMI_TX_0 DMI_TX_2 DMI_TX_1 DMI_TX_3 FDI_TX_0* DMI_RX_2* DMI_RX_0 DMI_RX_1 DMI_RX_2 DMI_RX_3 DMI_TX_0* DMI_RX_3* DMI_RX_1* DMI_RX_0* PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RX_2* PEG_RX_0* PEG_RX_1* PEG_RX_3* PEG_RX_4* PEG_RX_5* PEG_RX_7* PEG_RX_6* PEG_RX_8* PEG_RX_9* PEG_RX_10* PEG_RX_12* PEG_RX_11* PEG_RX_14* PEG_RX_13* PEG_RX_15* PEG_RX_0 PEG_RX_1 PEG_RX_3 PEG_RX_2 PEG_RX_4 PEG_RX_6 PEG_RX_5 PEG_RX_7 PEG_RX_8 PEG_RX_10 PEG_RX_9 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15 PEG_TX_1* PEG_TX_2* PEG_TX_0* PEG_TX_3* PEG_TX_4* PEG_TX_5* PEG_TX_7* PEG_TX_6* PEG_TX_10* PEG_TX_8* PEG_TX_9* PEG_TX_11* PEG_TX_12* PEG_TX_13* PEG_TX_14* PEG_TX_15* PEG_TX_1 PEG_TX_0 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_6 PEG_TX_5 PEG_TX_7 PEG_TX_8 PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_14 PEG_TX_13 PEG_TX_15 FDI_TX_4* FDI_TX_5* FDI_TX_6* FDI_TX_7* FDI_TX_4 FDI_TX_5 FDI_TX_6 FDI_TX_7 (SYM 1 OF 11) DMI EMBEDDED DISPLAY PORT PCI EXPRESS BASED INTERFACE SIGNALS INTEL FLEXIBLE DISPLAY INTERFACE SIGNALS RSVD_96 RSVD_95 RSVD_94 RSVD_93 RSVD_92 RSVD_91 RSVD_90 RSVD_97 RSVD_38 RSVD_39 RSVD_40 RSVD_36 RSVD_41 RSVD_42 RSVD_43 RSVD_45 RSVD_44 RSVD_48 RSVD_49 RSVD_50 RSVD_47 RSVD_46 RSVD_53 RSVD_52 RSVD_51 RSVD_55 RSVD_54 RSVD_57 RSVD_59 RSVD_60 RSVD_58 RSVD_56 RSVD_61 RSVD_63 RSVD_62 RSVD_65 RSVD_64 RSVD_66 RSVD_67 RSVD_69 RSVD_70 RSVD_68 RSVD_71 RSVD_72 RSVD_79 RSVD_80 RSVD_81 RSVD_78 RSVD_82 RSVD_83 RSVD_84 RSVD_86 RSVD_85 RSVD_89 RSVD_88 RSVD_87 CFG_4 CFG_3 CFG_2 CFG_1 CFG_0 CFG_9 CFG_8 CFG_7 CFG_6 CFG_5 CFG_14 CFG_13 CFG_12 CFG_11 CFG_10 CFG_15 CFG_16 CFG_17 RSVD_1 RSVD_5 RSVD_6 RSVD_4 RSVD_3 RSVD_2 RSVD_10 RSVD_11 RSVD_9 RSVD_8 RSVD_7 RSVD_15 RSVD_16 RSVD_14 RSVD_13 RSVD_12 RSVD_20 RSVD_19 RSVD_18 RSVD_17 RSVD_25 RSVD_26 RSVD_24 RSVD_22 RSVD_23 RSVD_31 RSVD_30 RSVD_29 RSVD_28 RSVD_27 RSVD_32 RSVD_33 RSVD_34 RSVD_35 (5 OF 11) RESERVED OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN IN IN BI BI NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 CFG [7] :PEG DEFER TRAINING 1 = (DEFAULT) IMMEDIATELY AFTER xxRESETB 0 = WAIT FOR BIOS (IPU) 10K PU disables eDP HPD FOR SANDYBRIDGE PROCESSOR (IPU) (IPU) (IPU) (IPU) (IPU) Intel is investigating processor driven VREF_DQ generation. (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (DDR_VREF0) (DDR_VREF1) (THERMDA) (THERMDC) NOTE: This connection is to support the same. (IPU) CFG [4] :eDP ENABLE/DISABLE 1 = DISABLED 0 = ENABLED CFG [3] :PCIE x4 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED CFG [2] :PCIE x16 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED CFG [6:5] :PCIE BIFURCATION 11 = 1 X16 (DEFAULT) 10 = 2 X8 01 = RSVD 00 = X8, X4, X4 CPU_CFG<4> should be pulled down to enable EDP These can be Placed close to J2500 and Only for debug access 17 90 6 17 90 17 90 17 90 17 90 6 17 90 17 90 17 90 17 90 17 90 17 90 17 90 17 90 17 90 17 90 17 90 8 8 8 8 8 8 33 93 8 33 93 8 33 93 8 33 93 8 8 8 8 8 8 8 8 8 8 8 8 8 33 93 8 33 93 8 33 93 8 8 8 8 33 93 8 8 8 8 8 8 8 8 8 8 33 93 8 33 93 8 33 93 8 8 8 8 8 8 8 8 33 93 8 8 8 8 8 8 8 8 33 93 8 8 8 8 8 33 93 8 33 93 8 33 93 8 24.9 1/16W 402 MF-LF 1% R1010 1 2 OMIT MOBILE-REV1 SANDY-BRIDGE BGA U1000 N8 N10 T9 R10 R6 R8 U8 U10 N2 N4 R2 R4 P3 P1 T5 U6 AE4 AE2 AC2 AE8 AB1 AG4 AG2 AF3 AF1 AF7 AE6 AG8 AG6 AC8 AB7 AA2 AB3 AD9 W6 V7 W10 W8 Y9 AA8 AA10 AC10 U2 U4 W4 W2 V3 V1 AA6 Y5 G2 H1 F3 G22 F23 K23 H23 F11 H11 K11 J12 F9 E8 H9 G10 H7 J8 G6 F7 K21 H21 F19 H19 K19 J20 H17 G18 K15 K17 G14 F15 J16 H15 K13 H13 C22 A22 D23 B23 B13 D13 C10 A10 D11 B11 B9 D9 D7 B7 F13 E12 A18 C18 B21 D21 D19 B19 F21 E20 C14 A14 B17 D17 D15 B15 F17 E16 OMIT MOBILE-REV1 BGA SANDY-BRIDGE U1000 B57 D57 F55 K55 F57 E58 H57 H55 D53 K57 B55 A54 A58 D55 C56 E54 J54 G56 BB17 AW46 BG26 BB25 BG34 BH35 BJ34 BF35 BF41 BH43 BJ42 AY17 BF43 AW50 BB57 BF63 AD5 AH5 AJ6 BF3 BG4 BD29 BD19 AY45 AY41 BG62 BB43 D49 B53 G52 G64 BD33 AJ10 BE6 AA4 AC4 AC6 C52 D3 C4 C24 D25 BC30 B25 K47 H47 F5 K9 H5 L10 G4 K7 K5 BE32 M9 L6 J2 L2 P7 M5 J4 L4 N6 G48 AW42 K49 H49 J50 AY13 BB13 BA48 BB15 AY15 AW14 BD13 BA16 BE16 BD15 BC14 BF19 BH19 BC42 BF21 BH21 BF23 BH23 BF25 BH25 BJ22 BG22 1% MF-LF 402 1/16W 1K R1020 1 2 1% 1/16W MF-LF 402 1K R1022 1 2 NOSTUFF MF-LF 5% 0 1/16W 402 R1021 1 2 NOSTUFF 402 1/16W MF-LF 5% 0 R1023 1 2 17 90 6 17 90 17 90 17 90 17 90 17 90 17 90 17 90 17 90 6 17 90 17 90 17 90 17 90 17 90 17 90 17 90 6 17 90 6 17 90 6 17 90 6 17 90 6 17 90 PLACE_NEAR=U1000.AB1:12.7mm MF-LF 24.9 402 1% 1/16W R1030 1 2 10K 1/16W 1% 402 MF-LF R1031 1 2 50 98 50 98 1/16W MF-LF 5% 402 1K NOSTUFF R1047 1 2 NOSTUFF 1K 1/16W 5% 402 MF-LF R1046 1 2 1/16W 5% 402 MF-LF 1K R1045 1 2 EDP 402 1K MF-LF 1/16W 5% R1044 1 2 NOSTUFF 5% 1/16W 402 MF-LF 1K R1042 1 2 1/16W MF-LF 5% 402 1K NOSTUFF R1040 1 2 1/16W MF-LF 5% 402 1K NOSTUFF R1041 1 2 1/16W MF-LF 5% 402 1K NOSTUFF R1043 1 2 1/16W MF-LF 5% 402 1K NOSTUFF R1049 1 2 CPU DMI/PEG/FDI/RSVD CPU_EDP_COMP TP_EDP_TX_N<2> CPU_CFG<7> CPU_CFG<16> CPU_CFG<3> CPU_CFG<1> CPU_CFG<0> CPU_CFG<6> NC_PEG_R2D_C_P<14> CPU_CFG<5> TP_EDP_AUX_N TP_EDP_TX_N<3> TP_EDP_TX_N<1> FDI_DATA_N<2> FDI_DATA_N<6> FDI_DATA_P<5> CPU_CFG<2> CPU_CFG<5> CPU_CFG<6> CPU_CFG<8> CPU_CFG<7> NC_PEG_D2R_P<12> =PEG_D2R_P<3> CPU_MEM_VREFDQ_B PCIE_T29_D2R_P<2> =PEG_D2R_P<4> =PEG_D2R_P<1> =PEG_D2R_P<2> CPU_MEM_VREFDQ_A =PEG_R2D_C_N<4> FDI_DATA_P<3> PCIE_T29_R2D_C_P<1> =PEG_R2D_C_P<7> NC_PEG_D2R_N<13> FDI_DATA_P<4> DMI_N2S_P<0> PCIE_T29_R2D_C_N<0> =PEG_R2D_C_N<6> CPU_THERMD_N CPU_THERMD_P PCIE_T29_R2D_C_N<1> =PEG_R2D_C_N<3> NC_PEG_R2D_C_N<14> =PEG_R2D_C_P<2> =PEG_R2D_C_N<7> FDI_DATA_P<7> FDI_DATA_N<5> FDI_DATA_N<0> NC_PEG_R2D_C_N<15> TP_EDP_AUX_P NC_PEG_D2R_P<13> PCIE_T29_R2D_C_N<3> PCIE_T29_D2R_P<1> PCIE_T29_D2R_P<3> PCIE_T29_R2D_C_P<2> NC_PEG_R2D_C_N<12> =PEG_R2D_C_P<4> NC_PEG_R2D_C_P<12> NC_PEG_D2R_P<14> =PEG_R2D_C_P<0> =PEG_R2D_C_N<2> PCIE_T29_R2D_C_N<2> CPU_CFG<1> CPU_CFG<10> CPU_CFG<4> =PEG_R2D_C_P<1> FDI_DATA_N<1> DMI_S2N_P<1> =PEG_D2R_P<6> PP0V75_S3_MEM_VREFDQ_B DMI_S2N_P<3> DMI_N2S_N<1> NC_PEG_R2D_C_P<15> PP0V75_S3_MEM_VREFDQ_A DMI_N2S_N<0> DMI_N2S_P<1> DMI_N2S_P<2> DMI_N2S_P<3> FDI_DATA_N<3> FDI_DATA_N<7> FDI_DATA_P<6> FDI_DATA_P<2> FDI_DATA_P<1> FDI_DATA_P<0> DMI_N2S_N<3> DMI_S2N_P<0> DMI_S2N_N<0> CPU_CFG<12> CPU_CFG<16> CPU_CFG<9> CPU_CFG<0> CPU_CFG<17> PCIE_T29_R2D_C_P<0> =PEG_R2D_C_N<5> CPU_CFG<15> CPU_CFG<14> CPU_CFG<13> CPU_CFG<11> =PEG_R2D_C_P<3> =PEG_R2D_C_P<5> =PEG_R2D_C_P<6> PCIE_T29_R2D_C_P<3> NC_PEG_R2D_C_P<13> CPU_CFG<2> CPU_CFG<4> FDI_DATA_N<4> DMI_N2S_N<2> DMI_S2N_N<3> DMI_S2N_N<1> DMI_S2N_P<2> NC_PEG_D2R_N<14> =PEG_D2R_P<5> =PEG_D2R_P<0> NC_PEG_D2R_N<15> PCIE_T29_D2R_N<0> PCIE_T29_D2R_N<1> PCIE_T29_D2R_N<2> PCIE_T29_D2R_N<3> =PEG_D2R_N<7> NC_PEG_D2R_N<12> DMI_S2N_N<2> NC_PEG_R2D_C_N<13> TP_EDP_TX_N<0> CPU_CFG<3> =PEG_D2R_N<4> =PEG_D2R_N<0> CPU_PEG_COMP NC_PEG_D2R_P<15> =PEG_R2D_C_N<0> =PEG_R2D_C_N<1> FDI_LSYNC<1> PP1V05_S0 FDI_INT FDI_FSYNC<1> FDI_FSYNC<0> PCIE_T29_D2R_P<0> PP1V05_S0 =PEG_D2R_N<1> =PEG_D2R_N<2> =PEG_D2R_N<3> =PEG_D2R_N<5> =PEG_D2R_N<6> FDI_LSYNC<0> TP_EDP_TX_P<0> TP_EDP_TX_P<1> TP_EDP_TX_P<2> TP_EDP_TX_P<3> CPU_EDP_HPD =PEG_D2R_P<7> 10 OF 132 9 OF 101 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 9 23 90 23 90 9 23 90 9 23 90 23 90 9 23 90 28 30 26 30 23 9 23 90 23 90 9 23 90 23 90 23 23 23 23 90 9 23 90 9 23 90 9 23 90 90 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101
  • 10. BI BI BI BI BI IN IN OUT IN IN OUT OUT BI DDR3 MISC PWR MGMT JTAG & BPM CLOCKS THERMAL (2 OF 11) PROC_SELECT* PROC_DETECT* SM_RCOMP_2 SM_RCOMP_1 SM_RCOMP_0 SM_VREF SM_DRAMRST* SM_DRAMPWROK PM_SYNC PREQ* TMS TRST* TDI TDO DBR* BPM_0* BPM_1* BPM_2* BPM_3* BPM_4* BPM_5* BPM_6* BPM_7* TCK PRDY* BCLK_ITP BCLK_ITP* UNCOREPWRGOOD RESET* THERMTRIP* CATERR* PECI PROCHOT* BCLK BCLK* DPLL_REF_CLK DPLL_REF_CLK* NC OUT BI IN OUT IN IN IN OUT IN IN IN IN IN OUT BI BI BI II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 Unused eDP CLK (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPU) (IPD) (IPU) (IPU) (IPU) (IPU) (IPU) R1120 and R1121 are Intel recommended values 23 90 23 90 23 90 23 90 23 90 PLACE_NEAR=U1800.AY11:157mm MF-LF 402 1/16W 5% 10K R1111 1 2 17 29 90 19 23 90 29 16 90 16 90 17 90 19 90 19 44 90 1/16W MF-LF 1% 402 75 R11261 2 SANDY-BRIDGE OMIT BGA MOBILE-REV1 U1000 D5 C6 K63 K65 C62 D61 E62 F63 D59 F61 F59 G60 H53 H61 AJ4 AJ2 F53 K53 J62 H65 B59 AH9 H51 K51 AY25 BE24 BJ46 BG46 BF45 BJ44 J58 K61 K59 F51 H59 H63 C60 PLACE_NEAR=U1000.BF45:12.7mm 1/16W 200 402 MF-LF 1% R1114 1 2 PLACE_NEAR=U1000.BG46:12.7mm MF-LF 1/16W 402 25.5 1% R1113 1 2 402 1/16W MF-LF 140 1% PLACE_NEAR=U1000.BJ46:12.7mm R1112 1 2 90 1/16W 402 5% MF-LF 68 R1101 1 2 NOSTUFF 402 MF-LF 1/16W 100 1% PLACE_NEAR=U1000.BJ44:2.54mm R11301 2 NOSTUFF MF-LF 402 1/16W 100 1% PLACE_NEAR=U1000.BJ44:2.54mm R11311 2 NOSTUFF X5R 402 PLACE_NEAR=U1000.BJ44:2.54mm 10% 0.1UF 16V C1130 1 2 MF-LF 402 1K 5% 1/16W R1141 1 2 1K 5% 1/16W MF-LF 402 R1140 1 2 402 5% 56 1/16W MF-LF R1103 1 2 45 67 90 NOSTUFF 1K 201 1/20W MF 5% R11001 2 23 90 23 90 23 90 23 90 23 90 23 90 23 90 PLACE_NEAR=R1121.2:1mm 1/16W 1% 402 MF-LF 200 R11201 2 PLACE_NEAR=U1000.AY25:51.562mm 402 1% MF-LF 1/16W 130 R1121 1 2 16 90 16 90 17 90 5% 1/16W NOSTUFF 402 MF-LF 51 R1104 1 2 1% 402 43.2 MF-LF 1/16W R1125 1 2 23 25 201 1/20W MF NOSTUFF 1K 5% R1102 1 2 23 25 90 23 90 23 90 23 90 CPU CLOCK/MISC/JTAG PP1V05_S0 CPU_CATERR_L CPU_DDR_VREF CPU_SM_RCOMP<0> PM_MEM_PWRGD_R CPU_PWRGD PM_SYNC PLT_RESET_LS1V1_L CPU_PROCHOT_R_L CPU_PECI PP1V05_S0 CPU_SM_RCOMP<2> PLT_RST_CPU_BUF_L XDP_BPM_L<7> XDP_BPM_L<6> XDP_BPM_L<4> XDP_BPM_L<3> XDP_BPM_L<2> PP1V5_S3RS0_CPUDDR PM_THRMTRIP_L CPU_PROC_SEL_L XDP_BPM_L<0> XDP_CPU_PRDY_L PP1V5_S3RS0_CPUDDR XDP_BPM_L<1> XDP_DBRESET_L XDP_CPU_TDO XDP_CPU_TRST_L XDP_CPU_PREQ_L ITPCPU_CLK100M_N XDP_CPU_TMS XDP_CPU_TCK XDP_CPU_TDI XDP_BPM_L<5> CPU_PROCHOT_L PP1V05_S0 DMI_CLK100M_CPU_N DMI_CLK100M_CPU_P PP1V05_S0_CPU_VCCPQE ITPCPU_CLK100M_P DPLL_REF_CLK_L DPLL_REF_CLK CPU_MEM_RESET_L PM_MEM_PWRGD CPU_SM_RCOMP<1> 11 OF 132 10 OF 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 7 10 13 15 29 71 72 7 10 13 15 29 71 72 6 7 9 10 12 13 14 16 17 20 22 23 35 39 44 67 69 72 101 7 12 14
  • 11. BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT SA_CAS* SA_RAS* SA_WE* SA_DQ_63 SA_DQ_62 SA_DQ_61 SA_DQ_60 SA_DQ_59 SA_DQ_58 SA_DQ_57 SA_BS_2 SA_BS_1 SA_BS_0 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_56 SA_DQ_55 SA_DQ_54 SA_DQ_53 SA_DQ_52 SA_DQ_51 SA_DQ_50 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_36 SA_DQ_32 SA_DQ_33 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_34 SA_DQ_35 SA_DQ_26 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_9 SA_DQ_8 SA_DQ_7 SA_DQ_6 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_0 SA_CK_1 SA_CK_0 SA_CKE_1 SA_CKE_0 SA_CK_1* SA_CK_0* SA_CS_1* SA_CS_0* SA_ODT_1 SA_ODT_0 SA_DQS_0* SA_DQS_1* SA_DQS_2* SA_DQS_3* SA_DQS_4* SA_DQS_5* SA_DQS_6* SA_DQS_7* SA_DQS_0 SA_DQS_1 SA_DQS_3 SA_DQS_2 SA_DQS_5 SA_DQS_4 SA_DQS_6 SA_DQS_7 SA_MA_0 SA_MA_1 SA_MA_3 SA_MA_2 SA_MA_5 SA_MA_4 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_11 SA_MA_10 SA_MA_12 SA_MA_14 SA_MA_13 SA_MA_15 MEMORY CHANNEL A (SYM 3 OF 11) SB_CK_1* SB_DQ_33 SB_CAS* SB_RAS* SB_WE* SB_BS_0 SB_BS_1 SB_BS_2 SB_CK_0 SB_CK_0* SB_CK_1 SB_CKE_0 SB_CKE_1 SB_DQ_0 SB_DQ_1 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_2 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_3 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_4 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_5 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_6 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_CS_0* SB_CS_1* SB_ODT_1 SB_ODT_0 SB_DQS_0* SB_DQS_1* SB_DQS_2* SB_DQS_3* SB_DQS_4* SB_DQS_5* SB_DQS_6* SB_DQS_7* SB_DQS_0 SB_DQS_2 SB_DQS_1 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_7 SB_DQS_6 SB_MA_1 SB_MA_0 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_8 SB_MA_7 SB_MA_10 SB_MA_11 SB_MA_9 SB_MA_13 SB_MA_12 SB_MA_15 SB_MA_14 (SYM 4 OF 11) MEMORY CHANNEL B OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE THE POSESSOR AGREES TO THE FOLLOWING: THE INFORMATION CONTAINED HEREIN IS THE 3 6 BRANCH REVISION DRAWING NUMBER SIZE D R IV ALL RIGHTS RESERVED SHEET PAGE TITLE C A D 2 1 PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. Apple Inc. PAGE NOTICE OF PROPRIETARY PROPERTY: A B C 3 4 5 6 7 8 D B 8 7 5 4 2 1 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 26 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 28 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 SANDY-BRIDGE MOBILE-REV1 BGA OMIT U1000 BA36 BC38 BB19 BE44 BB31 BA32 AW34 AY33 BC18 BD17 BD41 BD45 AL6 AL8 AV7 AY5 AT5 AR6 AW6 AT9 BA6 BA8 BG6 AY9 AP7 AW8 BB7 BC8 BE4 AW12 AV11 BB11 BA12 BE8 BA10 AM5 BD11 BE12 BB49 AY49 BE52 BD51 BD49 BE48 BA52 AY51 AK7 BC54 AY53 AW54 AY55 BD53 BB53 BE56 BA56 BD57 BF61 AL10 BA60 BB61 BE60 BD63 BB59 BC58 AW58 AY59 AL60 AP61 AN10 AW60 AY57 AN60 AR60 AM9 AR10 AR8 AN6 AN8 AU8 AU6 BD5 BC6 BC10 BD9 BB51 BC50 BD55 BB55 BD61 BD59 AV61 AU60 BD27 BA28 AW38 AW22 BA20 BB45 BE20 AW18 BB27 AW26 BB23 BA24 AY21 BD21 BC22 BB21 BB41 BC46 BE36 BA44 BGA MOBILE-REV1 SANDY-BRIDGE OMIT U1000 BJ38 BD37 AY29 BH39 BF33 BH33 BF37 BH37 BD25 BJ26 BE40 BH41 AL4 AK3 BA4 BB1 AV1 AU2 BA2 BB3 BC2 BF7 BF11 BJ10 AP3 BC4 BH7 BH11 BG10 BJ14 BG14 BF17 BJ18 BF13 BH13 AR2 BH17 BG18 BH49 BF47 BH53 BG50 BF49 BH47 BF53 BJ50 AL2 BF55 BH55 BJ58 BH59 BJ54 BG54 BG58 BF59 BA64 BC62 AK1 AU62 AW64 BA62 BC64 AU64 AW62 AR64 AT65 AL64 AM65 AP1 AR62 AT63 AL62 AM63 AR4 AV3 AU4 AN2 AN4 AW4 AW2 BF9 BH9 BH15 BF15 BH51 BF51 BF57 BH57 AY65 AY63 AN64 AN62 BF31 BH31 AY37 BJ30 AW30 BA40 BB29 BE28 BB37 BC34 BF27 BB33 BH27 BG30 BH29 BF29 BG42 BH45 BG38 BF39 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 26 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 26 27 91 6 27 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 26 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 28 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 91 6 27 28 91 6 27 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 6 28 91 SYNC_DATE=06/15/2010 CPU DDR3 INTERFACES MEM_B_DQS_N<2> MEM_B_A<15> MEM_B_A<14> MEM_B_A<13> MEM_B_A<12> MEM_B_A<11> MEM_B_A<10> MEM_B_A<9> MEM_B_A<8> MEM_B_A<7> MEM_B_A<6> MEM_B_A<5> MEM_B_A<4> MEM_B_A<3> MEM_B_A<2> MEM_B_A<1> MEM_B_A<0> MEM_B_DQS_P<7> MEM_B_DQS_P<6> MEM_B_DQS_P<5> MEM_B_DQS_P<4> MEM_B_DQS_P<3> MEM_B_DQS_P<2> MEM_B_DQS_P<1> MEM_B_DQS_P<0> MEM_B_DQS_N<7> MEM_B_DQS_N<6> MEM_B_DQS_N<5> MEM_B_DQS_N<4> MEM_B_DQS_N<3> MEM_B_DQS_N<1> MEM_B_DQS_N<0> MEM_B_ODT<1> MEM_B_ODT<0> MEM_B_CS_L<1> MEM_B_CS_L<0> MEM_B_DQ<1> MEM_B_DQ<3> MEM_B_DQ<2> MEM_B_DQ<5> MEM_B_DQ<7> MEM_B_DQ<9> MEM_B_CKE<1> MEM_B_CLK_N<1> MEM_B_CLK_P<1> MEM_B_CKE<0> MEM_B_CLK_N<0> MEM_B_CLK_P<0> MEM_B_WE_L MEM_B_RAS_L MEM_B_CAS_L MEM_B_BA<2> MEM_B_BA<1> MEM_B_DQ<63> MEM_B_DQ<62> MEM_B_DQ<61> MEM_B_DQ<60> MEM_B_BA<0> MEM_B_DQ<59> MEM_B_DQ<58> MEM_B_DQ<57> MEM_B_DQ<56> MEM_B_DQ<55> MEM_B_DQ<54> MEM_B_DQ<53> MEM_B_DQ<52> MEM_B_DQ<51> MEM_B_DQ<50> MEM_B_DQ<49> MEM_B_DQ<48> MEM_B_DQ<47> MEM_B_DQ<46> MEM_B_DQ<45> MEM_B_DQ<44> MEM_B_DQ<43> MEM_B_DQ<42> MEM_B_DQ<41> MEM_B_DQ<40> MEM_B_DQ<39> MEM_B_DQ<38> MEM_B_DQ<37> MEM_B_DQ<36> MEM_B_DQ<35> MEM_B_DQ<34> MEM_B_DQ<33> MEM_B_DQ<32> MEM_B_DQ<31> MEM_B_DQ<30> MEM_B_DQ<29> MEM_B_DQ<28> MEM_B_DQ<27> MEM_B_DQ<26> MEM_B_DQ<25> MEM_B_DQ<24> MEM_B_DQ<23> MEM_B_DQ<22> MEM_B_DQ<21> MEM_B_DQ<20> MEM_B_DQ<19> MEM_B_DQ<18> MEM_B_DQ<17> MEM_B_DQ<16> MEM_B_DQ<15> MEM_B_DQ<14> MEM_B_DQ<13> MEM_B_DQ<12> MEM_B_DQ<11> MEM_B_DQ<10> MEM_B_DQ<8> MEM_B_DQ<6> MEM_B_DQ<4> MEM_B_DQ<0> MEM_A_DQ<61> MEM_A_DQ<60> MEM_A_DQ<59> MEM_A_DQ<56> MEM_A_DQ<54> MEM_A_DQ<53> MEM_A_DQ<38> MEM_A_DQ<24> MEM_A_CLK_P<0> MEM_A_CLK_N<0> MEM_A_A<15> MEM_A_A<13> MEM_A_A<14> MEM_A_A<10> MEM_A_A<11> MEM_A_A<12> MEM_A_A<8> MEM_A_A<9> MEM_A_A<7> MEM_A_A<5> MEM_A_A<6> MEM_A_A<4> MEM_A_A<3> MEM_A_A<2> MEM_A_A<1> MEM_A_A<0> MEM_A_DQS_P<7> MEM_A_DQS_P<6> MEM_A_DQS_P<5> MEM_A_DQS_P<4> MEM_A_DQS_P<3> MEM_A_DQS_P<2> MEM_A_DQS_P<1> MEM_A_DQS_P<0> MEM_A_DQS_N<7> MEM_A_DQS_N<6> MEM_A_DQS_N<5> MEM_A_DQS_N<4> MEM_A_DQS_N<3> MEM_A_DQS_N<2> MEM_A_DQS_N<1> MEM_A_DQS_N<0> MEM_A_ODT<1> MEM_A_ODT<0> MEM_A_CS_L<1> MEM_A_CS_L<0> MEM_A_CKE<1> MEM_A_CLK_N<1> MEM_A_CLK_P<1> MEM_A_CKE<0> MEM_A_DQ<0> MEM_A_DQ<5> MEM_A_DQ<4> MEM_A_DQ<3> MEM_A_DQ<2> MEM_A_DQ<1> MEM_A_DQ<6> MEM_A_DQ<7> MEM_A_DQ<8> MEM_A_DQ<9> MEM_A_DQ<15> MEM_A_DQ<14> MEM_A_DQ<13> MEM_A_DQ<12> MEM_A_DQ<11> MEM_A_DQ<10> MEM_A_DQ<25> MEM_A_DQ<23> MEM_A_DQ<22> MEM_A_DQ<21> MEM_A_DQ<20> MEM_A_DQ<19> MEM_A_DQ<18> MEM_A_DQ<17> MEM_A_DQ<16> MEM_A_DQ<26> MEM_A_DQ<35> MEM_A_DQ<34> MEM_A_DQ<31> MEM_A_DQ<30> MEM_A_DQ<29> MEM_A_DQ<28> MEM_A_DQ<27> MEM_A_DQ<33> MEM_A_DQ<32> MEM_A_DQ<36> MEM_A_DQ<46> MEM_A_DQ<45> MEM_A_DQ<44> MEM_A_DQ<43> MEM_A_DQ<42> MEM_A_DQ<41> MEM_A_DQ<40> MEM_A_DQ<39> MEM_A_DQ<37> MEM_A_DQ<50> MEM_A_DQ<51> MEM_A_DQ<52> MEM_A_DQ<55> MEM_A_DQ<49> MEM_A_DQ<48> MEM_A_DQ<47> MEM_A_BA<0> MEM_A_BA<1> MEM_A_BA<2> MEM_A_DQ<57> MEM_A_DQ<58> MEM_A_DQ<62> MEM_A_DQ<63> MEM_A_WE_L MEM_A_RAS_L MEM_A_CAS_L 12 OF 132 11 OF 101