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Atmel Corporation 2003 Product Training GFO: Consumer Imaging Product Line  / CMOS IMAGING Alain Jutant
Agenda ,[object Object],[object Object],[object Object]
Agenda ,[object Object],[object Object],[object Object]
CMOS  Image Sensor  Applications ,[object Object],[object Object],[object Object],[object Object],[object Object],Cellular Phones/PDAs Digital Camcorder PC cameras Toys Security Camera Biometrics Digital Still Camera Automotive
Atmel  CMOS Imaging Product range and roadmaps   2002 2003 2004 Camera Modules « Eye-On-Si » CIF Module 1/7 Inch Demonstrator November 02 Samples February 03 Production April 03 VGA module 1/4 Inch Samples April 03 Production July 03 Sensors CIF - VGA 1/7Inch - 1/4 Inch Samples Feb - April  03 2.0 Megapixel 1/2 Inch Samples Q1 03
CMOS Imaging Part Number Sensor only Chip #  03  v A Sensor+image processing Chip #  50  v B Sensor+image processing Chip #  51  v A Sensor+image processing Chip #  50  v B Chip -ID Will be available 32-pin CLCC windowed AT76C4 03A C- N X Sensor VGA Will be available 32-pin CLCC windowed AT76C4 50B C- N X Camera-On-A-Chip CIF Will be available Camera Module #  MY02 AT76C4 51A C- MY10 X Eye-On-Si VGA AT76C450BCMY- EK1EX (Europe) EK1KX (UK) EK1AX (USA/ASIA) Camera Module #  MY02   AT76C4 50B C- MY02 X Eye-On-Si CIF Evaluation Kit Package Part Number Product  Name
Agenda ,[object Object],[object Object],[object Object]
A Turnkey Imaging Solution ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
A Complete Imaging Solution
A Complete Imaging Solution Flex Cable Peripheral SMD Components Single chip Lens Optics housing Ceramic package
Easy operating, Control and Setup Only 17 Outputs PLL Matrix 352 x 288 (640 x 480 Available too) TWI Power  Management Timing Generator  PGA ADC 10bit Processing parameters Digital Image  Processing Clock Reference (from 3 to 80Mhz) -PLL TWI (2-Wire serial Interface) … 8-bit Parallel Output Single Power Supply (VDD/GND) Reset Video Synchronisation signals VDD GND CLKREF RESET SCL SDA DATA<7:0> HSYNC DATACLK VSYNC
Eye-On-Si Block   Diagram   PLL Matrix CIF 352 x 288 (VGA 640 x 480 Available too) TWI Power  Management Timing Generator  PGA ADC 10bit Processing parameters CLKREF VDD GND Digital Image  Processing RESET SCL SDA DATA<7:0> HSYNC/LEN DATACLK VSYNC/FEN
Block Diagram – Image Processing PLL Matrix 352 x 288 TWI Power  Management Timing Generator  PGA ADC 10bit Processing parameters CLKREF VDD GND Digital Image  Processing Based on  AVR RESET SCL SDA DATA<7:0> HSYNC/LEN DATACLK VSYNC/FEN ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Eye-On-Si VGA  – Even more functionalities ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]
Advanced Progressive Digital Zoom From  1x to 5x  Progressive Digital zoom Up to 17 Steps Zoom
Enhanced Decimation VGA to CIF Common CIF Format - Windowing Reduced Angle of view Original Image VGA Eye-On-Si CIF Format - Decimation Same Angle of view
Agenda ,[object Object],[object Object],[object Object]
CMOS Imaging Sensor Family Matrix PGA ADC 10-bit RBG PLL Digital Image Processing 8-bit YCrCb Megapixel   1600 x1200 ½ Inch Decimation Digital Zoom VGA   640 x 480 ¼ Inch Decimation Digital Zoom 10-bit RBG 10-bit RBG Sensor CIF   352 x 288 1/7 Inch Image Processing 8-bit YCrCb Camera-On-A-Chip
CIF Camera-On-A-Chip Sensor  Main Specifications and Availabilities ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],8-bit YCrCb
CIF Camera-On-A-Chip Block  Diagram  PLL Matrix CIF 352 x 288 TWI Power  Management Timing Generator  PGA ADC 10bit Processing parameters CLKREF VDD GND Digital Image  Processing RESET SCL SDA DATA<7:0> HSYNC/LEN DATACLK VSYNC/FEN
VGA Sensor  Main Specifications and Availabilities ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],10-bit RBG
VGA Sensor Block   Diagram   VDD GND Matrix 640 x 480 TWI Power  Management Timing Generator  PGA ADC 10bit Configucation  parameters CLKREF Clamp RESET SCL SDA DATA<9:0> HSYNC/LEN DATACLK VSYNC/FEN FL SYNC
Thank you

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Cmos imaging present to customer0422

  • 1. Atmel Corporation 2003 Product Training GFO: Consumer Imaging Product Line / CMOS IMAGING Alain Jutant
  • 2.
  • 3.
  • 4.
  • 5. Atmel CMOS Imaging Product range and roadmaps 2002 2003 2004 Camera Modules « Eye-On-Si » CIF Module 1/7 Inch Demonstrator November 02 Samples February 03 Production April 03 VGA module 1/4 Inch Samples April 03 Production July 03 Sensors CIF - VGA 1/7Inch - 1/4 Inch Samples Feb - April 03 2.0 Megapixel 1/2 Inch Samples Q1 03
  • 6. CMOS Imaging Part Number Sensor only Chip # 03 v A Sensor+image processing Chip # 50 v B Sensor+image processing Chip # 51 v A Sensor+image processing Chip # 50 v B Chip -ID Will be available 32-pin CLCC windowed AT76C4 03A C- N X Sensor VGA Will be available 32-pin CLCC windowed AT76C4 50B C- N X Camera-On-A-Chip CIF Will be available Camera Module # MY02 AT76C4 51A C- MY10 X Eye-On-Si VGA AT76C450BCMY- EK1EX (Europe) EK1KX (UK) EK1AX (USA/ASIA) Camera Module # MY02 AT76C4 50B C- MY02 X Eye-On-Si CIF Evaluation Kit Package Part Number Product Name
  • 7.
  • 8.
  • 10. A Complete Imaging Solution Flex Cable Peripheral SMD Components Single chip Lens Optics housing Ceramic package
  • 11. Easy operating, Control and Setup Only 17 Outputs PLL Matrix 352 x 288 (640 x 480 Available too) TWI Power Management Timing Generator PGA ADC 10bit Processing parameters Digital Image Processing Clock Reference (from 3 to 80Mhz) -PLL TWI (2-Wire serial Interface) … 8-bit Parallel Output Single Power Supply (VDD/GND) Reset Video Synchronisation signals VDD GND CLKREF RESET SCL SDA DATA<7:0> HSYNC DATACLK VSYNC
  • 12. Eye-On-Si Block Diagram PLL Matrix CIF 352 x 288 (VGA 640 x 480 Available too) TWI Power Management Timing Generator PGA ADC 10bit Processing parameters CLKREF VDD GND Digital Image Processing RESET SCL SDA DATA<7:0> HSYNC/LEN DATACLK VSYNC/FEN
  • 13.
  • 14.
  • 15. Advanced Progressive Digital Zoom From 1x to 5x Progressive Digital zoom Up to 17 Steps Zoom
  • 16. Enhanced Decimation VGA to CIF Common CIF Format - Windowing Reduced Angle of view Original Image VGA Eye-On-Si CIF Format - Decimation Same Angle of view
  • 17.
  • 18. CMOS Imaging Sensor Family Matrix PGA ADC 10-bit RBG PLL Digital Image Processing 8-bit YCrCb Megapixel 1600 x1200 ½ Inch Decimation Digital Zoom VGA 640 x 480 ¼ Inch Decimation Digital Zoom 10-bit RBG 10-bit RBG Sensor CIF 352 x 288 1/7 Inch Image Processing 8-bit YCrCb Camera-On-A-Chip
  • 19.
  • 20. CIF Camera-On-A-Chip Block Diagram PLL Matrix CIF 352 x 288 TWI Power Management Timing Generator PGA ADC 10bit Processing parameters CLKREF VDD GND Digital Image Processing RESET SCL SDA DATA<7:0> HSYNC/LEN DATACLK VSYNC/FEN
  • 21.
  • 22. VGA Sensor Block Diagram VDD GND Matrix 640 x 480 TWI Power Management Timing Generator PGA ADC 10bit Configucation parameters CLKREF Clamp RESET SCL SDA DATA<9:0> HSYNC/LEN DATACLK VSYNC/FEN FL SYNC