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Robert page-abstract

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Robert page-abstract

  1. 1. Verification of the QorIQ Communication Platform Containing CoreNet Fabric with SystemVerilog Robert Page and Sakar Jain Freescale Semiconductor Inc. Networking and Multimedia Group Austin, Texas The Freescale QorIQ(tm) communication platforms are system-on-chip (SoC) processors containing single, dual and many cores and enable the next era of networking by offering advanced levels of performance, power-efficiency and programmability. The QorIQ P4080 communications processor, the signature member of the product line, integrates eight enhanced Freescale Power Architecture(r) processors, a tri-level cache hierarchy, and innovative high-speed CoreNet(tm) fabric and data path acceleration. The CoreNet fabric is an interconnect architecture suitable for scalable on-chip network to connect multiple Power Architecture processing cores with caches, stand-alone caches and memory subsystems. The CoreNet fabric was designed to provide a coherent multicore migration solution enabling the move to multicore. This presentation will focus on the verification challenges and solutions associated with verifying the CoreNet platform using SystemVerilog (SV).

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