1. Independent hardware development
(platforms)
FPGA
Hardware Freedom Day Moscow 20 April 2013
Hardware freedom
Printed
electronicsASIC
M$ K$ ?$
Alexey Shmatok <activedaily@gmail.com>
Moscow 2013
MBC?
100$
???
?$
Quantum
Neuro
Analog
...
2. Field Programmable Gate Array
more Freedom (ASIC)
Hardware Freedom Day Moscow 20 April 2013
LUT
FFCarry &
Control
Carry in
Carry out
In
Out
n
up to Millions
of Logic Cells
Layout
example
http://bit.ly/ucMUU1
DSP, BRAM, IOB,...
3. Memory based computing
more Freedom (FPGA)
Hardware Freedom Day Moscow 20 April 2013
LUT
FFIn Out
n
MLUTIn Outn
Pipelined Just memory
m
4. Basic principle
Hardware Freedom Day Moscow 20 April 2013
Mem
Foreach
Write (reconfiguration)
DMLUT
A
Mem
MLUT(A)
Read (working)
A DData
5. Mem
Minimalistic design
Hardware Freedom Day Moscow 20 April 2013
Glue
logic
Mem
Addr
Data
Glue
logic
Input Output
design tools?
sync/async mem
limits
always @ (posedge clk)
begin
counter <= counter + 1;
end
6. Sync/Async design my favorite :)
Hardware Freedom Day Moscow 20 April 2013
sync: always@(posedge clk,...) begin … end
clockless: always@(...) begin … end
Logic FF Logic FF
clk
…
Logic FF Logic FF…
Control
8. HW-Core
#NoCPU = Not only CPU
Hardware Freedom Day Moscow 20 April 2013
App
JVM
OS
HW-Core
HV
AppSrv Just App
VS
H
W
SW
CPU Way NoCPU Way
HW-Core
energy
flex
s/async
more
human
like
9. #HLS High Level Synthesis
Code => RTL
open source
Hardware Freedom Day Moscow 20 April 2013
Code RTL
for(int I;i<n;i++){
c[i]=a[i]+b[i]
} a[]
b[]
c[]
+
+
+
LLVM!
10. Interesting
DARPA SyNAPSE project
Hardware Freedom Day Moscow 20 April 2013
http://www.modha.org/
DARPA sponsored SyNAPSE (Systems of
Neuromorphic Adaptive Plastic Scalable
Electronics) project, launched in early 2009, is
to “investigate innovative approaches that
enable revolutionary advances in neuromorphic
electronic devices that are scalable to biological
levels.”