L10 assembly-language-programming-of-atmega328 p

Assembler Programming of Atmega328P
(Lecture-10)
R S Ananda Murthy
Associate Professor and Head
Department of Electrical & Electronics Engineering,
Sri Jayachamarajendra College of Engineering,
Mysore 570 006
R S Ananda Murthy Assembler Programming of Atmega328P

Language Options to Program Atmega328P
Higher Level Languages (HLP) – mostly machine
independent.
C/C++
Wiring. This is nothing but higher level abstractions
implemented using functions written in C/C++ to make the
microcontroller programming easier. Arduino IDE uses
Wiring.
Assembly Language (ALP) – machine dependent.
ALP is needs more effort as compared to HLP because it
requires the knowledge of the instruction set of the MCU in
addition to the knowledge of the internal architecture.

Why Learn ALP?
ALP helps in better understanding of the internal
architecture of MCU.
ALP gives direct access to all the hardware blocks in side
the MCU which may not be possible by HLP.
ALP helps in writing highly optimized code (shortest,
fastest program). This is very essential in time-critical and
space-critical applications.
Knowledge of ALP helps in detecting bugs in a machine
language program by translating the machine code back
into mnemonics using a disassembler which is a software
that performs the translation.
Industries engaged in the design of embedded systems
expect ALP and HLP skills in their prospective employees.

What Facilities are Needed for ALP?
A text editor to create the assembly language source file
which is typically stored as a .asm file.
An assembler which is a software that parses the source
file and outputs the machine language instructions as a
.hex file.
A debugger or simulator to check the working of the
program.
A programmer – which is a hardware – along with its
related software to download .hex file to the MCU.
Note that these facilities are available on both GNU Linux and
Windows platforms.

Classiﬁcation of Atmega328P Instructions
There are 141 instructions in the instruction set of Atmega328P.
They are classiﬁed as —
1 Arithmetic and Logic Instructions.
2 Branch Instructions
3 Data Transfer Instructions
4 Bit and Bit Test Instructions
5 MCU Control Instructions
Majority of the instructions are 2-bytes in length. Only LDS,
STS, JMP and CALL instructions are 4-bytes in length.

Atmega328P Instruction Types
Instruction Type No. of Instructions
Arithmetic 17
Shift and Rotate 5
Bit-wise Operations 12
Compare Operations 4
Branching 27
Subroutine Calls 6
I/O Instructions 6
Moving Data 29
SREG Bit Operations 18
Program Memory Instructions 11
MCU Control Instructions 6
Total 141

Assembly Language Statement Format
[label:] mnemonic [operands] [;comment]
Label and comments are optional.
Label field ends with colon (:)
Mnemonic is a short name given to the bit pattern
representing the operation code (opcode) in the instruction.
Mnemonic field should contain either a mnemonic or a
pseudo opcode (assembler directive).
Pseudo opcodes should be preceded by a period (.)
Comment begins with semicolon (;) or double-slash (//).
Like in C, source lines can be continued by means of
having a backslash () as the last character of a line.
Multi-line comment begins with /* and end with */ as in C.
Blank lines can be inserted in the source file to enhance
readability.

Representation of Data in ALP
Hex numbers Eg. $AB or 0xABCD.
Decimal Eg. 10, 23, 639.
Binary Eg. 0b01101111.
ASCII Eg. ‘2’, ‘A’, ‘B’.
ASCII String Eg. “Hello World” – such strings can be used
only along with DB assembler directive.

Rules for Labels in ALP
Each label must be unique.
Majority of assemblers permit not more than 6 characters
in a label.
The ﬁrst character must be an alphabet.
Can contain alpha-numeric characters in both upper and
lower case, question mark (?), period (.), at (@), underline
(_), and dollar sign ($).
Reserved words, assembler directives and mnemonics
given in the instruction set cannot be used as labels.
Use of meaningful labels makes the ALP easier to
understand and maintain.
Avoid vague labels like X1, L1 etc.

Some Valid and Invalid Labels
Valid Labels Invalid Labels
BEGIN 1BEGIN
LOOP1? 1LOOP?
START@ @START
QUIT_1 _QUIT1, 12345
FINISH.1 LDI, COM, EQU, END
END_@ INCLUDE, SET, ORG
begin LDS, STS, NEG
State reasons for validity or invalidity of labels given above.

Assembler Directives (Pseudo Opcodes)
Assembler directives are commands given to the
assembler to do certain tasks.
They are not translated to machine code by the assembler.
All assembler directives should be preceded by a period.
Directives recognized by the assembler vary from one
assembler to another assembler.
For a detailed explanation of all assembler directives refer
to the assembler documentation.

Some Frequently used Assembler Directives
Directive Description
EQU Assigns a label to an expression or a constant.
INCLUDE Read source from another file.
ORG Sets the starting address for assembly.
SET Assigns a value to a label which can be changed later.
DB Define constant byte(s) in program memory or in EEPROM.
DW Define constant word(s) in program memory or in EEPROM.
BYTE Reserve bytes for a variable in SRAM or in EEPROM.
CSEG Defines the start of a Code Segment.
DSEG Defines the start of a Data segment.
ESEG Defines the start of an EEPROM segment.
Refer to Atmel Assembler Manual here: http:
//www.atmel.com/webdoc/avrassembler/index.html

Addressing Modes in AVR Instruction Set
Method of determining the address of the data/operand/s is
known as addressing mode.
The following addressing modes are available in the instruction
set of Atmega328P –
Register Direct Addressing
Single Register Rd, with Immediate Data
Single Register Rd.
Two Registers Rd and Rr.
I/O Direct Addressing

Addressing Modes in AVR Instruction Set
Data Memory
Direct Addressing
Indirect Addressing
Indirect Addressing with Displacement.
Indirect Addressing with Pre-decrement.
Indirect Addressing with Post-increment.
Program Memory
Constant Addressing.
Addressing with Post-increment.
Direct Addressing.
Indirect Addressing.
Relative Addressing.
Refer to the Instruction Set Manual for explanation of all the
addressing modes.

Link to Instruction Set Manual
While programming Atmega328P, it is necessary to constantly
refer to the Instruction Set Manual provided by Atmel to
carefully understand the working of each instruction.
Instruction Set Manual is available for download at:
http://www.atmel.com/Images/
Atmel-0856-AVR-Instruction-Set-Manual.pdf
In the following slides few instructions have been described.
The reader should develop the ability to refer to the document
mentioned above to understand the working of any instruction.

Example of Instruction – LDI Rd,K
LDI Rd,K Operation: Rd K
Loads an 8-bit constant K directly into the register Rd.
Rd is any one of the registers from R16 to R31
represented by 4-bit code given beside
1110 K7K6K5K4 dddd K3K2K1K0 2 bytes
Program Counter
dddd
LDI
opcode
Higher
Nibble of K
Code
for Rd
Lower
Nibble of K
Rd
0000R16
0001R17
0010R18
::
1111R31
: PC PC+1
Status Register : Not affectedInstruction Length : 2 bytes
Number of Cycles : 1Addressing Mode : Single Register Immediate
This instruction belongs to Data Transfer Group. Status ﬂags
are not affected by any instruction in this group.

Example of Instruction – ADD Rd,Rr
ADD Rd,Rr Operation: Rd
Adds two registers Rd and Rr and places the sum in
the register Rd. Rd and Rr can be any GPR
represented by 5-bit code given beside
2 bytes
Program Counter
Code
ADD
opcode
Rd or Rr
: PC PC+1
Instruction Length : 2 bytes Number of Cycles : 1
Addressing Mode
Rd + Rr
000011 r3 r2 r1 r0d3 d2 d1d0r4 d4
Operands
00000R0
00001R1
00010R2
00011R3
::
11111R31
Flags Affected: Two Registers : All except I and T
This instruction belongs to Arithmetic Logical Group. To
understand how ﬂags are affected refer to explanation given in
the instruction set.

Example of Instruction – MOV Rd,Rr
MOV Rd,Rr Operation: Rd
Copies the contents of Rr to Rd. Content of Rr
remains unaltered. Rr and Rd can be any GPR
represented by 5-bit code given beside.
2 bytes
Program Counter
Code
MOV
opcode
Rd or Rr
: PC PC+1
Addressing Mode
Rr
001011 r3 r2 r1 r0d3 d2 d1d0r4 d4
Operands
00000R0
00001R1
00010R2
00011R3
::
11111R31
Flags Affected: Two Registers : None

Example of Instruction – COM Rd
COM Rd Operation: Rd
Finds the 1's complement of Rd. Rd can be any
GPR represented by 5-bit code given beside.
2 bytes
Program Counter
CodeRd or Rr
: PC PC+1
Addressing Mode
$FF - Rd
1001010
Operand
00000R0
00001R1
00010R2
00011R3
::
11111R31
Flags Affected: One Register : All except I, T, H.
d3 d2 d1d0d4 0000
COM opcode
This instruction belongs to Arithmetic Logical Group. To
understand how ﬂags are affected refer to explanation given in
the instruction set.

Example of Instruction – JMP k
JMP k Operation: PC
Jump to an address within the entire 4M (words) program memory.
This is an unconditional jump instruction which is not available in all
devices. It is available in Atmega328P.
Program Counter : PC k
Instruction Length : 4 bytes (2 words) Number of Cycles : 3
Addressing Mode
k
Flags Affected: Program Memory Direct : None
k3 k2 k1k0k11k10k9k8k15 k14k13k12
110k161001 010k21 k20 k19k18k17
k7 k6 k5k4
This instruction belongs to Branch Group. Flags are not
affected by this instruction.

Example of Instruction – RJMP k
RJMP k Operation: PC
Program Counter : PC PC+k+1
Instruction Length : 2 bytes (1 word) Number of Cycles : 2
Addressing Mode
PC + k +1
Flags Affected: Program Memory Relative : None
1100
Relative jump to an address within PC-2K+1 and PC+2K (words). In AVR
MCUs with program memory not exceeding 4K words, this instruction can
address the entire memory from every address location. Here
where . k is the offset. When k is negative, it indicates by how
many words to jump backward. When k is postive, it indicates by how
many words to jump forward.
k11k10 k9 k8 k3 k2 k1k0k7 k6 k5k4
This instruction belongs to Branch Group. Flags are not
affected by this instruction. For shorter jumps it is better to use
RJMP, which is a shorter instruction than JMP.

Example of Instruction – LDS Rd,k
LDS Rd,k Operation: Rd
Loads one byte from the data memory to a register Rd. For MCU
with SRAM, the data space consists of the GPRs, I/O memory
and internal SRAM (and external SRAM if applicable). For MCU
without SRAM, the data space consists of the register file only.
The EEPROM has a separate address space. k is 16-bit address
of data memory location.
Program Counter : PC PC+2
Addressing Mode
(k)
Flags Affected: Data Memory Direct : None
k3 k2 k1k0k11k10k9k8k15 k14k13k12
00001001 000d4
k7 k6 k5k4
d3 d2 d1d0

Example of Instruction – STS k,Rd
STS k,Rd Operation: (k)
Copies a byte from a GPR to a data memory location. For MCU
with SRAM, the data space consists of the GPRs, I/O memory
and internal SRAM (and external SRAM if applicable). For MCU
without SRAM, the data space consists of the register file only.
The EEPROM has a separate address space. k is 16-bit address
of data memory location.
Addressing Mode
Rd
Flags Affected: Data Memory Direct : None
k3 k2 k1k0k11k10k9k8k15 k14k13k12
00001001 001d4
k7 k6 k5k4
d3 d2 d1d0

Example of Instruction – IN Rd,A
IN Rd,A Operation: Rd
Loads 1-byte of data from the I/O Space (Ports, Timers, Configuration
Registers, etc.) into a GPR Rd represented by 5-bit code
and A is address of I/O Space specified by
Addressing Mode
I/O(A)
Flags Affected: I/O Direct : None
10110 d3 d2 d1d0d4A5A4
A3A2 A1A0
d3 d2 d1d0d4
IN
Opcode
Operands
A5A4
A3A2 A1A0

Example of Instruction – OUT A,Rr
OUT A,Rr Operation: I/O(A)
Loads 1-byte of data from Rr to I/O Space (Ports, Timers, Configuration
Registers, etc.). Rr is represented by the 5-bit code
and A is address of I/O Space specified by
Addressing Mode
Rr
Flags Affected: I/O Direct : None
10111 d3 d2 d1d0d4A5A4
A3A2 A1A0
d3 d2 d1d0d4
OUT
Opcode
Operands
A5A4
A3A2 A1A0

Steps in Assembly Language Programming
1 Use a text editor to create/edit the source file and save it as
.asm file. Statements can be typed in lower or upper case.
2 Feed the .asm file created above to the assembler.
3 If the assembler does not find any errors in the .asm file,
then, it produces an object file (.obj), a hex file (.hex), an
EEPROM file (.eep), a list file (.lst), and a map file (.map).
4 Test the program by running it on a simulator or by using a
debugger. Repeat Steps 1-4 until the program is found to
be working properly.
5 Download the working .hex file to the flash memory and
.eep file to the EEPROM of MCU using a programmer.
The list file is a text file, which contains the source statements
along with the machine code assembled by the program.

Points to be Remembered in ALP of Atmega328P
Write a JMP to branch to the user program at the reset
addres $0000.
Do not write user program in the area $0000-$003F
reserved for interrupt vectors.
User program can be loaded immediately after the
interrupt vector locations, say from $0040.
If bootloader has been used, ensure that the user program
does not over write on the bootloader.

Program to Add Two Numbers
Refer to Instruction Set Manual to understand the working
of LPM instruction.
Trace through this program and ﬁnd the contents of
registers and memory at each step.

License
This work is licensed under a
Creative Commons Attribution 4.0 International License.

L10 assembly-language-programming-of-atmega328 p

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