ゆるふわコンピュータ ((2017年情報処理学会全国大会IPSJ-ONE2017)

1. Twitter/GitHub: @shtaxxx
IPSJ-ONE 2017

2. Twitter/GitHub: @shtaxxx
IPSJ-ONE 2017

5. J

6. Intel
Intel Core i7
#include <stdio.h>
int main(){
printf("Hello!¥n");
return 0;
}

8. FPGA

9. [1] Agile Co-Design for a Reconfigurable Datacenter, FPGA'16

10. Digilent PYNQ-Z1
Python
$229 (Academic $65)

11. ScalableCore System
(Xilinx Spartan-6 128)
CPU
100

14. L

15. int main(){
return 0;
} J

19. J

21. conv1_input_enable:1 delay
R
conv1_input_act_0_0:8 *
L
conv1_input_wgt_0_0:8
R
conv1_input_act_0_1:8
*
L
conv1_input_wgt_0_1:8
R
conv1_input_act_0_2:8
*
L
conv1_input_wgt_0_2:8 R
conv1_input_act_1_0:8 *
L
conv1_input_wgt_1_0:8
R
conv1_input_act_1_1:8
*
L
conv1_input_wgt_1_1:8
R
conv1_input_act_1_2:8
*
L
conv1_input_wgt_1_2:8
R
conv1_input_act_2_0:8
*
L
conv1_input_wgt_2_0:8
R
conv1_input_act_2_1:8
*
L
conv1_input_wgt_2_1:8
R
conv1_input_act_2_2:8
*
L
conv1_input_wgt_2_2:8
R
delay
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<
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delayR
delay
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Cond
0
2
conv1_act_output_valid:1
conv1_act_output:8
0
R
0
1

24. Intel
Intel Core i7
#include <stdio.h>
int main(){
printf("Hello!¥n");
return 0;
}
FPGA