1. 1
Introduction Session by
Mr.C.UDHAYAKUMAR, AP/ECE
U19IT301– Computer Architecture

2. 2
Agenda of the session
Introduction
•About the topic
•Course Objectives
•Syllabus
1. Computer Systems
2. Connection of Components
3. CPU Architecture
4. Registers in CPU
5. Memory
6. Processing Devices

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Computer Architecture = Machine Organization (How the machine looks
like) + Instruction Set Architecture (How you talk to the machine)
About the Topic
a set of rules and methods - that describe the functionality, organization,
and implementation of computer systems

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CO1:(Understand) Choose appropriate instruction set architecture and
addressing modes used in a processor.
CO2:(Understand) Apply the knowledge of arithmetic operations to
perform calculations.
CO3:(Understand) Understand Design and analyze pipelined control
units.
CO4 (Understand) Understand parallel processing architectures.
CO5 (Understand) Understand performance of memory systems.
COURSE OBJECTIVES:

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Functional Units - Basic Operational Concepts - Bus Structures - Performance
of Computer – Memory Locations and Addresses - Instruction and
Instruction Sequencing - Addressing Modes.
UNIT I :
BASIC STRUCTURE OF COMPUTERS

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Addition and Subtraction of Signed Numbers - Design of Fast Adders -
Multiplication of Positive numbers, Signed Operand Multiplication, Booth's
Algorithm - Fast Multiplication - Integer Division -Floating Point Numbers
and Operations.
UNIT II :
COMPUTER ARITHMETIC

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Basic MIPS implementation – Building datapath – Control Implementation
scheme – Pipelining –Pipelined datapath and control – Handling Data
hazards & Control hazards – Exceptions.
UNIT III :
PROCESSOR AND CONTROL UNIT

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Basic Concepts - Speed, Size and Cost - Cache Memories - Performance
Considerations – Virtual Memories- memory management requirements.
Accessing I/O devices- Interrupts – Enabling and disabling interrupts-
Handling multiple devices - Direct Memory Access.
UNIT IV :
MEMORY SYSTEMS AND I/O
ORGANIZATION

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Instruction- level - parallelism – Parallel processing challenges – Flynn's
classification – Hardware multithreading – Multi-core processors
UNIT V :
PARALLELISM

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1 V.Carl Hamacher, Zvonko G. Varanesic and Safat G. Zaky, “Computer
Organisation and
Embedded Systems“,Mc Graw-Hill Inc, sixth edition, 2019.
2 David A. Patterson and John L. Hennessey, “Computer organization and
design‟, Morgan Kauffman
/ Elsevier, Fifth edition, 2016.
TEXT BOOKS:
REFERENCES:
1 William Stallings, “Computer Organization and Architecture – Designing for
Performance”, Pearson
Education, Eighth Edition, 2013.
2 John P. Hayes, “Computer Architecture and Organization”, Tata McGraw
Hill, Third Edition, 2014.

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Block Diagram – Computer System
1.Computer Systems

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Computer Systems

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Connection of Components

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Motherboard Diagram
• Northbridge
– Connected to CPU in high
speed
• Southbridge
– Connected in low speed
• Bus
– Related to “omnibus”
– Communication system
between components

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2.CPU Architecture

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Von Neumann Architecture

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Harvard Architecture

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Machine Cycle
• Fetch-decode-execute-store

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3.Registers in CPU
• Program Counter (PC) register
• Instruction Register (IR)
• Statusregister: status, flags

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MAR , MDR , Memory

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MAR MDR Example

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4.Memory -Individual Memory Cell

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Memory Capacity
• Determined by two factors
1. Number of bits in the MAR
• 2K where K = width of the register in bits
2. Size of the address portion of the instruction
• 4 bits allows 16 locations
• 8 bits allows 256 locations
• 32 bits allows 4,294,967,296 or 4 GB
• Important for performance
– Insufficient memory can cause a processor to w ork
at 50% below performance

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Memory Hierarchy

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Primary Memory
Computer memory that is accessed directly by the CPU.

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Cache Memory
It acts as a buffer between the CPU and the main memory.
• Hold data and program -
frequently required to execute
program.
• less access time as compared to
main memory,
• faster than main memory.
• made of high speed RAM
(SRAM).
• limited capacity to store data.
• Works on the
“Principle of Locality
of Reference”.

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Cache Memory
• Cache level
– L1 cache: fastest andsmallest
– L2 cache: next fastest and
smallest

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Secondary Memory
• Communicates indirectly with CPU via main memory. So, It is slower
than the main memory.
• Non- volatile in nature. So, store data permanently.
1. Magnetic Storage Devices: it is sequential access memory.
2. Hard Disk
3. Floppy Disk
4. Magnetic Tape

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5.Processing Devices
• Processing devices are parts of the computer that are responsible for
processing or converting data into meaningful information.
1. Processor
2. Buses
3. System Clock

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Processor
A. The CPU is traditionally referred to as a Processor.
B. The CPU is a computer chip located on the motherboard.
C. Performs processing and control activities performed by different parts of
computer.
D. Main electronic circuitry in the computer.
E. Carries out the instructions contained in a computer program by
performing arithmetic, logical, control and input/output operations.
F. Most modern CPUs are contained on a single Integrated Circuit (IC) chip
and as such are called microprocessors.
G. A processor can have two or more CPUs or independent processing units
called “cores” on a single chip and such processor is called a multi-core
processor.

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Buses
• Electrical pathway that transfer data and
instructions among different parts of computer.
• Main memory is directly/indirectly connected to
the processor via a bus.
1. Data Bus
2. Address Bus
3. Control Bus

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Clock
• Used to synchronizing the activities performed
by the computer.

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C.UDHAYAKUMAR
9698489931
udhayakumar.c@sece.ac.in