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Dec 2002
A Tutorial on Embedded Systems
Arpan Pal
Prateep Misra
Center of Excellence for Embedded Systems,
Tata Consultancy Services, Kolkata
email : dsp@tcscal.co.in
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• Session -1 Introduction to Embedded
Systems
• Session -2 Basic Concepts of Real-Time
Systems
• Session -3 Embedded System Design
• Session -4 Case Study on Wireless LAN
• Session -5 Emerging Areas and Trends
CONTENTS
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Embedded Systems
• Embedded System
– a special purpose computer which exists within a larger
system / device
– consists of hardware ( microprocessors, DSP, dedicated
hardware ) , OS and application software
– dedicated function
– are widespread
• Telecom - switches, gateways, routers
• Internet appliances
• Wireless & mobile devices - Phones, PDA
• Automobiles - engine control, power train, safety and
navigation systems
• Consumer & home Appliances
• Industrial automation
• Medical systems
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Features
• Embedded Systems
– usually have disk less operation, ROM boot
– “headless” - no display , keyboard, mouse
– are usually networked
– require real time performance
– should have high availability and reliability
– usually developed around a Real Time Operating System ( RTOS)
• Embedded System Software
– in form of ‘firmware’ ( i.e in a ROM )
– in flash (‘disk on chips’ )
– downloadable via network
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Real time systems
• Real Time System
– responds to external stimuli
– responses have time deadlines
– consists of hardware, application software and RTOS
– all components should be such that the system meets the
requirements
• Real Time Operating System
– building block of an Real Time System
– bounded , predictable response times under all loads
– enable preemptive priority driven task scheduling so that task
deadlines can be met
Embedded Systems are often real time systems built around a Real Time OS
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An Embedded System - IP Phone
10/100 PHY
RISC
Flash
RISC
DRAM
DSP
SRAM
DSP
RISC
DSL
Modem
Cable
Modem
LAN
NIC
IP Phone
CODEC
IP PHONE/INTEGRATED ACCESS DEVICE
10/100 PHY
To PC
Handset
Speaker
Analog
Phones/Fax
Display
LEGEND
IP Phone
IAD
To LAN-
Connected
Phones
CODEC
/SLIC
CODEC
/SLIC
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Technology Classifications
• Core Technologies
– the technology domain of the embedded product
– e.g. communication technology ( wired / wireless), imaging,
automation and control
– results of engineering research and development
– sufficiently matured for use in real life application
– expertise in core technologies is required for IP development
• Enabling Technologies
– enables cost effective deployment of core technologies
– e.g. embedded software, VLSI design, board design
– multiple enabling technologies are required in any embedded product
– expertise / skills in enabling technologies required for service
engagement
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Core Technologies
Core Technology Industry Verticals Served
Communication Systems Telecom / Datacom , Industrial Automation, Military,
Aerospace, Remote Control / Automation, Test and
Measurement, Office Automation, Consumer Electronics
Data Communication and
Networking
Telecom / Datacom, Consumer Electronics, Industrial
Automation, Information Automation, Retail Automation,
Automotive, Test and Measurement, Office Automation
Video and Imaging
Technologies
Consumer Electronics, Medical Electronics, Military/
Aerospace, Office Automation
Speech and Audio Consumer Electronics, Telecom / Datacom
Control Systems Industrial Automation, Military / Aerospace, Automotive,
Information Automation, Remote Control
Note
• The above list is representative only
• Each core technology may find applications in other verticals as well
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Enabling Technology Components
ASIC/
FPGA
Tools RTOS Internals
RTOS Middleware
Embedded Application
Board Level Design
DSP
Cores
DSP Algorithms
Hardware
Firmware &
BSP
Middleware
and
Applications
GPP
Cores
Analog/RF & Mixed
Signal
Enabling technologies can be divided under the following three areas
• Hardware Design - Fabless Semiconductor and Board Design
• Firmware and Board Support Packages
• Middleware and Applications
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Industry Verticals
Telecom / Datacom
• Infrastructure equipment such as switches
and routers (both wired and wireless)
• Enterprise network equipment such as
remote access concentrators
• Client equipment like network cards (both
wired and wireless)
• Consumer devices such as mobile phones
and internet phones.
Industrial Automation
• Digital motor control
• Process Control and Measurement Systems
• Industrial equipment controllers
• Robotics
• Bar code scanner,
• Power line monitoring, UPS
Military / Aerospace
• Radar Systems
• IR image processing
• Missile guidance and navigation
• Satellite image processing
• Voice encryption
• Fire control
Consumer Electronics
• Set-top boxes
• DAB, HDTV
• Digital camera
• Digital answering machine, cordless phone
• Video games , MP3 players
• Internet Appliances
• Home Networking Gateways.
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Industry Verticals ( contd. )
Test and Measurement
• Test and measurement instruments
• Signal Generators
• Signal Analysers
• Oscilloscopes and Logic Analysers
• Test and Debug tools
Automotive
• Hard Real Time controllers in engine, brakes
and chassis systems
• Automotive console - soft real-time, graphics
intensive in-car computing/navigational and
control information and entertainment
terminals
Medical Electronics
• Patient monitoring systems
• Imaging equipment
• Pathological lab instruments
Office Automation
• Smart copiers
• Fax machines
• Printers
• Scanners
• Multifunction Peripherals .
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Industry Verticals ( contd. )
Retail Automation
• Point of Sale systems
• Info kiosks
• Automatic identification systems
• Smart Shelves
Information Automation
• RAID devices
• Disk/tape drives
• Disk Servo Controller
• Server Appliances
Remote Control / Automation
• Building automation
• Automated Utility meters
• Security Systems
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Engineering challenges
Technical Challenges
• Installing new versions is complicated
– fixing bugs may mean product recall
– downtime may not be tolerated . For example bug fixing in a running
telecom switch may mean huge monetary loss if network is brought down
• Extreme cost of failure
– failure of medical systems could lead to death
• Restricted operational environment
– attempts to lower cost may mean that only low power CPUs and less
memory available for applications.
• Real time response
– system must provide guaranteed response times
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Cost challenges
• Need to provide customer with greatest possible value, satisfaction at
given price
• Product value and competitive needs to be assessed with respect to
cost of the product
• Bill of Materials must be carefully selected to provide best possible
product features at least cost to consumer
• Engineering design and development cost need to be carefully
controlled throughout the life cycle
• Product must have distinguishing and differentiated features when
compared with competing products - yet costs must be kept low
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Other challengesTime to Market Challenges
• If product is late , business opportunity
• Most embedded systems development projects have schedules less than
one year
• Project schedules and features to be developed have to be carefully
balanced
Technology Choice Challenges
The choice of software and hardware technology by OEMs is always
associated with the following questions:
• Will the technology be available for the life of the product?
• Is the technology robust enough to meet evolving
industry,market,and application needs?
• Can the technology be extended so that it scales for future
products?
• Are there enough adopters,partners,and special interest groups
(SIGs)so that the technology will have a longer life and remain
superior to competitive choices?
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Terms and Concepts
• A real-time system is a system with
performance deadlines on computations and
actions; i.e; system correctness depends on
the timeliness of results
• An embedded system is a system that exists
within a larger system
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Definitions - Real-Time Systems
– A real-time system is a system that must satisfy
explicit (bounded) response-time constraints or
risk severe consequences, including failure
– A real-time system is one whose logical
correctness is based on both the correctness of
the outputs and their timeliness.
– A real-time system responds in a (timely) predictable way
to unpredictable external stimuli arrivals.
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Definition - Response Time
– The time between the presentation of a set of
inputs to a system and the appearance of all the
associated outputs is called the response time
of the system
time
Event Arrival
Response Time
Event Arrival Deadlin
e
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Real-Time System Categories
• Hard real-time
– Missing a deadline bears catastrophic results
• Firm real-time
– Missing a deadline has a non-acceptable quality
reduction as a consequence
• Soft real-time
– Missing a deadline is undesirable, but not fatal
• Non real-time
– No Deadlines
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– A real-time system is a soft real-time system
when actions have soft deadlines
Soft Real-Time Systems
Non-Stringent Timing Requirements
– on-line transaction system
– telephone switches
More Stringent Timing Requirements
– Stock Price quotation system
Stringent Timing Requirements
– Multimedia
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Timing Constraints
• A timing constraint is the constraint
imposed on the timing behavior of an action
– Periodic - tasks arrive at fixed intervals,
called periods
– Aperiodic (Sporadic) - tasks may arrive any
time after a minimum interval
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Task Model
• Event-Driven (Reactive) Tasks primarily
react to external events which are generally
aperiodic (sporadic).
• Time-Driven Tasks are driven by the
passage of time or time epochs; generally
periodic tasks.
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Real-time Systems Characteristics
• Timeliness
– Meeting Deadlines
– Hard and soft RT systems
– Performance budgets
• Responsiveness
– Reactive
– Irrespective of time or order of event
arrival, the system should respond
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Real-time Systems Characteristics
• Concurrency
– Ability to handle multiple events
– Multi tasking
• Predictability
– Extent to which the characteristics is
known in advance
– Static scheduling vs Dynamic
scheduling
– Using Cyclic executives, avoid
preemption, No virtual memory
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Real-time Systems Characteristics...
• Correctness and Robustness
– Doing right things all the time
– Doing right under unplanned
circumstances
– Identify fault and take evasive action
(deadlocks, race conditions, starvation
etc)
• Dealing with Resource Limitation
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Scheduling Algorithms
• Static
– Static scheduling operates on the set of tasks and
constraints to generate a fixed schedule
– Static scheduling can be used if the scheduling
algorithm has complete knowledge of the task set and
all constraints such deadlines, execution times,
precedence, and future arrival times
• Dynamic
– Dynamic scheduling is performed at run-time
– Dynamic scheduling algorithms have complete
knowledge of currently active tasks, but new tasks may
arrive at any time in the future
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Scheduling Evaluation Metrics
• processor utilization
• sum of task completion times
• weighted sum of task completion times
• schedule length
• number of processors required
• maximum lateness
• missed deadlines
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Concurrency
• Simultaneous execution of multiple
sequential chains of actions
– Pseudo-Concurrency - chains of actions execute
on one processor (Multitasking)
– True-Concurrency - chains of actions execute
on multiple processors (Multiprocessing)
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Types of Concurrency
• Concurrent activities may be
– Non-interacting
– Interacting
– e.g. Traffic on parallel and intersecting roads
• Interacting activities
– share common resources
– needs co-ordination
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Realizing Concurrency
• Multiprocessing
– Multiple CPUs
– Each CPU executing one thread of control
• Multitasking
– Multiple tasks
– Processes or threads
• Context switching, Heavy or light
– States
• Running, Ready, Blocked
• Application based solutions
– Branching within code
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Designing for Concurrency
• Task Management
– how to come up with tasks?
• Inter-Task Communication
– how to decide on what to use ?
• Synchronization & Mutual Exclusion
– how to create concurrency
• External Event Handling
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Task Management
• Task
– single threaded sequential set of instructions
with its own stack space
• starting point for initializing data
• private memory space for maintaining execution
context - on an independent stack, maintained by
the OS
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Task Management - Creation
• Task Creation
– Static Task Creation
• stack space, priority , etc allocated before run time
– Dynamic Task Creation
• Tasks created at run time
– Static Creation is preferred as
• Know resource demands in advance
• no performance degradation, can be measured
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Inter Task Communication
• ITC Mechanisms
– Shared Memory
• Simple sharing of data
– Semaphores
• Basic Synchronization and Mutual Exclusion
– Message Queues/Pipes
• Intertask message passing within a CPU
– Sockets and Remote Procedure Calls
• Network transparent Intertask communication
– Signals
• Exception Handling
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Synchronization & Mutual Exclusion
• Synchronization
– bringing in serial behavior into concurrent tasks
– blocking one task till a resource become
available
• Mutual Exclusion
– avoids common data corruption between
producers and consumers of shared data
• Both combine to ensure effective and
efficient sharing of common resources
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Fabless Hardware Design
VLSI Design
• custom design and implementation of functionality in
silicon
• requires technology independent designs ( ‘Front End’)
and technology dependant ‘Back End’ designs and
optimizations
• done by using sophisticated EDA tools for simulations,
synthesis, floor-planning, layout, static analysis etc.
• chips so designed form essential components of embedded
systems
• VLSI design required for following domains - Analog and
Mixed signal, Custom ASIC, FPGA designs, processors
cores - DSP and GPP
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Board Level Design
• Board design is a specialized activity in embedded system
development.
• Most of the embedded system applications require small
size, low-form-factor PCBs
• Design should care of high-speed, noise and heat
dissipation
• Board design complexities are due to
– Higher speed processors - 200 to 600 MHz
– More peripherals , including analog circuits on smaller form
factors
– Low power issues
• Proper usage of these tools can reduce the Board-Level-
Design iterations to a minimal level.
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Algorithm Design and Simulation
VHDL Conversion
Functional Simulation
FPGA Synthesis
MATLAB / SPW / C
System
Generator
ModelSim
/ NCSim
Xilinx ISE
Testing on Board
ASIC/SOC Synthesis
Physical Design
Fabrication
Testing on Board
Synthesis
Tools
Physical
Design
Tools
Fab
Reference
Board
Designed
Board
Design Flow for FPGA / SOC based Approach
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Algorithm Design and Simulation
C Conversion
Assembly Optimization
MATLAB / SPW / C
RealTime
Workshop
Compiler
Tools
Testing on Board
ASIC/SOC Synthesis
with DSP softCore
Physical Design
Fabrication
Testing on Board
Synthesis
Tools
Physical
Design
Tools
FabReference
Board
Designed
Board
Design Flow for Programmable DSP / SOC based Approach
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Algorithm Design and Simulation
C Conversion
Partitioning
MATLAB / SPW / C
RealTime
Workshop
Compiler
Tools
Testing on Board
ASIC/SOC Synthesis
with Reconfigurable
softCore
Physical Design
Fabrication
Testing on Board
Synthesis
Tools
Physical
Design
Tools
Fab
Reference
Board
Designed
Baseband
Board
Reconfigurable Proc Config
Design Flow for Reconfigurable DSP / SOC based Approach
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EDA Tools for Digital Hardware Design
• Algorithm Simulation Tools
• MATLAB / Scilab
• Elanix
• Cadence Signal Processing Workbench
• Algorithm Conversion Tools
• MATLAB to C – Real-Time Workshop
• MATLAB to VHDL – System Generator
• Function VHDL Modelling
• ModelSim
• NCSim
• HDL Implementation IDE
• Xilinx ISE Tools for FPGA
• Synthesis Tools
• Synopsis
• Physical Design Tools
• Cadence
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Embedded Software Platforms
• Real-Time Operating Systems
• Kernel
• Multi-Tasking and Scheduling
• Shared-Data (Semaphores)
• Inter-Process-Communication
(MessageQueue, Mailbox, Pipe)
• Timers and Interrupts
• Memory Management
• Events
• Board-Support Pack
• Memory Mapping and Addressing
• Basic System Drivers
• Peripheral Drivers
• Desirable features
• scalability, robustness, real-time response, memory footprint etc.
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Middleware and Application
• Embedded Middleware (Protocol Stacks and Software Frameworks)
– set of code that sits on top of RTOS BSP
– implements a piece of functionality and provides service to the applications
around that functionality
– example - TCP/IP stacks , software development frameworks like Multimedia
Home Platform (MHP)
• DSP Algorithms
– core signal processing algorithms
– implemented on specialized hardware like DSP Processor, FPGA and ASICs
– examples - speech codecs, echo canceller, communication physical layer etc
• Embedded Application
– actual application that runs on top of the middleware
– provides the end-user with a set of well-defined services
– Example - user interfaces
– complexity and size depends upon the domain it is catering to and the desired
application features
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Embedded Software Design Flow
• System Requirement Specification
• System Interface Specification
• High and Low Level Design Document
• Test Specification Document
• Code Development
• Compile and Link
• Test / Debug on Simulator / In-circuit Emulator / ROM Emulator
• Port to Actual System
• Embed Compiled and Linked Code to ROM / Flash
• Load and Execute Code on Target using Bootloader
• Test / Debug on Target
• Interface with other sub-systems
• Final Integration and Testing
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Development process
Analysis & Design
Write Code
Compile code
Download RTOS
kernel
Download
Application code
Test & Debug
Boot target
Load RTOS kernel
Load Application
modules
Test & Debug
Ethernet Link
Boot Code in ROM
Ethernet Link
Ethernet Link
Loader
Login, debugger
Kernel
Symbol table
Shell
OOAD, UML
C, C++, Java,
Assembly
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Embedded Software Design Issues
• Real-Time Interrupt Response
• Real-Time Context Switching based on Priority
• Code-Memory Optimization (Flash / ROM size)
• Data-memory Optimization (RAM size)
• Speed Optimization
• Power Management
• Power Optimization
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802.11 WLAN
A 802.11 system has the following components
• RF and Analog front-end
– 5 GHz for 802.11a and 2.4 GHz for 802.11g
• Baseband
– PHY: 802.11a available standard, 802.11g the future.
– MAC: mainly follows the original 802.11 standard, possible
ratification coming from 802.11e, 802.11f and 802.11i.
Can be implemented partly on Baseband Processor and
partly on Host Driver
• Hardware System
– Baseband Board (including host interface) and RF board
PCI
Interface
Baseband
Processor
DAC
ADC
RF and
Analog
FrontEnd
Host
Network
Stack
Host
Driver
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802.11 RF Sub-System
Base Band System
(With ADC
And DAC)
Baseband
And
Loop Filter
Radio on Chip
Transreceiver
RF
Switch
RF
Filter
Crystal Oscillator
(Reference Frequency of
PLL)
HPA
/LNA
Antenna
• Designed as RFIC Chipset
• RF and Analog EDA design tools used
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802.11 Baseband Processing
• 802.11 MAC
• Authentication
• Association
• Media Access Control (CSMA/CA)
• Data Framing and Fragmentation
• Management services
• MAC-LLC Interface
• MAC-PHY Interface
• 802.11 PHY
• Error Control Coding – Convolutional Code
• Modulation Mapping – BPSK/QSK/QAM
• DSSS (802.11b)
• OFDM (802.11a)
• PHY-MAC Interface
• PHY-Analog & RF Interface
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802.11 Software Partitioning
Network Layer
Application Layer
LLC Sub layer
Asynchronous Data
Services
Control Services
Fragmentation
Management Services
MIBPower
Control
Synchro
nization
Security Services
WEP
Authentication
Physical Layer
Physical Layer
Management Entity
(PLME)
MLME_PLME_SAP
MSDU Exchange
MPDU Exchange
PLCP Sub layer
PMD Sub layer
MAC Sub Layer
PHY_SAP
PMD_SAP
MAC_SAP
…
Network Layer
Application Layer
LLC Sub layer
Asynchronous Data
Services
Control Services
Fragmentation
Management Services
MIBPower
Control
Synchro
nization
Security Services
WEP
Authentication
Physical Layer
Physical Layer
Management Entity
(PLME)
MLME_PLME_SAP
MSDU Exchange
MPDU Exchange
PLCP Sub layer
PMD Sub layer
MAC Sub Layer
PHY_SAP
PMD_SAP
MAC_SAP
…
Wireless Apps
Middleware TCP/IP
Stack
Host RTOS & BSP
Embedded CPU
& ASIC/SOC
ASIC / SOC
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• Hardware / Software Co-Design
• Design for Test
• System Specification
• Low power design
Research Areas
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Hardware - Software Co-design
Objectives - Develop methods and tools for the description,
evaluation and partitioning of application-specific computer
systems which consist of both hardware and software
components
Some specific topics -
• System architecture for mixed hardware/software
implementations
• Unified design representation of hardware and software
• Algorithms and techniques for automatic partitioning of
systems into hardware and software
• Co design of systems with real-time constraints
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Design for Testability and Self test
Objectives - develop design for testability methodologies and
tools to facilitate testing of complex digital systems consisting
of heterogeneous components
Some specific topics -
• System design for testability architectures
• Computer-aided test - to develop design aid tools to help
designers to perform testability analysis, test strategy selection,
test-driven partitioning, and test structure implementation
• Synthesis for testability
• develop efficient self-test methodologies and tools for the
design of competitive embedded systems
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System Specifications
• Implementation independent specification of embedded systems
• Synthesis of high level specifications into synthesizable and
compilable code ( E.g. Matlab to VHDL )
Speed Optimisation
• Intelligent architecture aware compilers
• Software thread integration for hardware to software migration
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Low Power Design
• Design of tools and techniques for minimization of power
consumption in embedded applications
• Low power re-configurable hardware for wireless systems
• Low power sensor networks
• Energy efficient wireless communication under QoS constraints
• Power profilers and optimizers for software
RTOS Features
Architectural requirements
scalable, small memory footprint, memory protection
Scheduling policies
multitasking kernel, fully preemptive and priority driven
large number of thread priority level
priority inheritance mechanisms - avoids priority inversion
Memory management issues
protected process private address space
support for hardware based MMU
avoid use of virtual memory, provide “locking” of pages in memory
“timeouts” for memory requests
Context switching & Interrupt latencies
fast and bounded context switch times
bounded dispatch time, independent of number of ready threads
Interprocess communication and synchronization
Message queues
Synchronous and asynchronous data transfer
Can be used for synchronizing execution
Signals
Asynchronous communication
No data transfer
Semaphores, Mutexes
Shared memory
Sockets
This page provides the agenda.
RTOS Features
Architectural requirements
scalable, small memory footprint, memory protection
Scheduling policies
multitasking kernel, fully preemptive and priority driven
large number of thread priority level
priority inheritance mechanisms - avoids priority inversion
Memory management issues
protected process private address space
support for hardware based MMU
avoid use of virtual memory, provide “locking” of pages in memory
“timeouts” for memory requests
Context switching & Interrupt latencies
fast and bounded context switch times
bounded dispatch time, independent of number of ready threads
Interprocess communication and synchronization
Message queues
Synchronous and asynchronous data transfer
Can be used for synchronizing execution
Signals
Asynchronous communication
No data transfer
Semaphores, Mutexes
Shared memory
Sockets
RTOS Features
Architectural requirements
scalable, small memory footprint, memory protection
Scheduling policies
multitasking kernel, fully preemptive and priority driven
large number of thread priority level
priority inheritance mechanisms - avoids priority inversion
Memory management issues
protected process private address space
support for hardware based MMU
avoid use of virtual memory, provide “locking” of pages in memory
“timeouts” for memory requests
Context switching & Interrupt latencies
fast and bounded context switch times
bounded dispatch time, independent of number of ready threads
Interprocess communication and synchronization
Message queues
Synchronous and asynchronous data transfer
Can be used for synchronizing execution
Signals
Asynchronous communication
No data transfer
Semaphores, Mutexes
Shared memory
Sockets