How to simulate semiconductor die yield from a fab environment. A wafer never travels through the fab the same way because multiple tools exist for identical steps, and some tools have multiple chambers for processing. These are all called contexts, and each context has a different impact on yield. The challenge is to reverse the sources causing yield fall out with as few observations as possible.

1. How to simulate
semiconductor yield
Ben Taylor
@bentaylordata

2. Synthetic yield
• First step is to create X number of moving yield contributions or errors. For
this example we create 500 errors over 10,000 wafers. Some errors are
sudden, others trend up over time. This plot shows 20 yield events starting
after wafer #5,000

3. Staging behavior
• A wafer never goes through a fab the same way. Many steps have multiple
tools and chambers that all have differences in processing. To simulate the
fab environment we create a binary map of tools that were used by each
wafer.

4. Simulating yield
• To figure out the die loss you can add up the die loss contributions by the
contexts where the wafers ran for a total die loss estimate:
+ =

5. Can you figure out the source?
• To figure out the die loss you can add up the die loss contributions by the
contexts where the wafers ran for a total die loss estimate:
&Given:
Find:
YX