2. A p-n junction consists of two semiconductor regions with opposite
doping type as shown in Figure. The region on the left is p-type with
an acceptor density Na, while the region on the right is n-type with a
donor density Nd. The dopants are assumed to be shallow, so that
the electron (hole) density in the n-type (p-type) region is
approximately equal to the donor (acceptor) density.
Cross-section of a p-n junction
pn-juntion-Diode
3. Flatband diagram
The principle of operation will be explained using a gedanken experiment, an
experiment, which is in principle possible but not necessarily executable in
practice. We imagine that one can bring both semiconductor regions together,
aligning both the conduction and valence band energies of each region. This
yields the so-called flatband diagram shown in Figure.
Energy band diagram of a p-n junction (a) before and (b) after merging the
n-type and p-type regions
4. Note that this does not automatically align the Fermi
energies, EF,n and EF,p. Also, note that this flatband diagram
is not an equilibrium diagram since both electrons and
holes can lower their energy by crossing the junction.
A motion of electrons and holes is therefore expected
before thermal equilibrium is obtained. The diagram shown
in Figure (b) is called a flatband diagram. This name refers
to the horizontal band edges. It also implies that there is no
field and no net charge in the semiconductor.
pn-juntion-Diode
5. At Thermal Equilibrium
A short time after the junction is
established and thermal equilibrium is
achieved, charge carriers in the vicinity of
the junction will neutralize each other
(electrons combining with holes), leaving
the unneutralized negatively ionized
acceptors, Na
- , in the p-region and
unneutralized positively ionized donors,
Nd
+ , in the n-region. This region of
ionized donors and acceptors creates a
space charge and its region is called the
depletion region.
The edge of the depletion region given by -xp on the p-side and +xn on the n-side.
the ionized donors and acceptors are located in substitutional lattice sites and
Cannot move in the electric field. The concentration of these donors and
acceptors are selected to give the p-n junction desired device properties
pn-juntion-Diode
6. i.e. the Fermi level in the p- and n- type
semiconductors must be equal. This
requirement for constant Fermi level
pushes
the n-type semiconductor Fermi level
down to be constant with the p-type
semiconductor Fermi level, as shown in
the diagram. The amount the bands are
bent is the difference In work function.
The depletion width xd, where xd = xp + xn may
be calculated from
Drift
Diffusio
n
Drift
Diffusio
n
bi
a
d
d V
N
N
q
x ÷
÷
ø
ö
ç
ç
è
æ
+
= -
+
1
1
2e
0
=
dx
dEf
Energy Band Diagram at Thermal Equilibrium
At thermal equilibrium
Energy band diagram of a p-n junction in
thermal equilibrium
While in thermal equilibrium no external voltage is applied
between the n-type and p-type material, there is an internal
potential, f, which is caused by the workfunction difference
between the n-type and p-type
pn-juntion-Diode
7. Impurity distribution illustrating the space charge region
Electric field variation
with distance, x
Potential variation
with distance, x
The build-in potential may
be expressed as:
2
ln
i
d
a
bi
n
N
N
q
kT
V
+
-
=
Where,
mV
V
q
kT
T 26
=
=
K – Boltzman constant
VT = Thermal voltage
At T=300K
Junction Potential
pn-juntion-Diode
8. The built-in potential in a semiconductor equals the potential across the
depletion region in thermal equilibrium. Since thermal equilibrium implies
that the Fermi energy is constant throughout the p-n diode, the built-in
potential equals the difference between the Fermi energies, EFn and EFp,
divided by the electronic charge.
It also equals the sum of the bulk potentials of each region, fn and fp,
since the bulk potential quantifies the distance between the Fermi energy
and the intrinsic energy. This yields the following expression for the built-
in potential.
The built-in potential
pn-juntion-Diode
9. No Applied Voltage
A semiconductor diode is created by joining the n-type semiconductor to a p-type
semiconductor.
In the absence of a
bias voltage across
the diode, the net
flow of charge is one
direction is zero. Bias is
the term used when an
external DC voltage
is applied
Semiconductor Diode
pn-juntion-Diode
10. When an external voltage VD is applied as
shown, with - terminal to n-side and
+terminal to p-side, it forms a forward bias
configuration. In this setup, electrons and
holes will be pressured to recombined with
the ions near the boundary, effectively
reducing the width and causing a heavy
majority carrier flow across the junction.
As Vd increases, the depletion width
decrease until a flood of majority carriers
start passing through. Is remains
unchanged.
Forward Bias
n ~ 1
When an external voltage VD is applied as
shown, with + terminal to n-side and –
terminal to p-side, the free charge carriers
will be attracted away by the voltage
source. This will effectively increase the
depletion region within the diode. This
widening of the depletion region will create
too great a barrier for the majority carriers
to overcome, effectively reducing the
carrier flow to zero. The number of minority
carriers will not be affected. This
configuration is called reverse Bias. This
small current flow during reverse bias is
called the reverse saturation current, Is.
Reverse Bias
÷
÷
ø
ö
ç
ç
è
æ
-
= 1
T
D
nV
V
s
D e
I
I
Biasing the Junction Diode
pn-juntion-Diode
11. We now consider a p-n diode with an applied bias voltage, Va. A forward bias
corresponds to applying a positive voltage to the anode (the p-type region)
relative to the cathode (the n-type region). A reverse bias corresponds to a
negative voltage applied to the cathode. Both bias modes are illustrated with
Figure. The applied voltage is proportional to the difference between the
Fermi energy in the n-type and p-type quasi-neutral regions.
As a negative voltage is applied,
the potential across the
semiconductor increases and so
does the depletion layer width. As
a positive voltage is applied, the
potential across the
semiconductor decreases and
with it the depletion layer width.
The total potential across the
semiconductor equals the built-in
potential minus the applied
voltage, or: Energy band diagram of a p-n junction under reverse and forward
bias
pn-juntion-Diode
12. What Are Diodes Made Out Of?
• Silicon (Si) and Germanium (Ge) are the two most
common single elements that are used to make Diodes.
A compound that is commonly used is Gallium
Arsenide (GaAs), especially in the case of LEDs
because of it’s large bandgap.
• Silicon and Germanium are both group 4 elements,
meaning they have 4 valence electrons. Their
structure allows them to grow in a shape called the
diamond lattice.
• Gallium is a group 3 element while Arsenide is a group
5 element. When put together as a compound, GaAs
creates a zincblend lattice structure.
• In both the diamond lattice and zincblend lattice, each
atom shares its valence electrons with its four closest
neighbors. This sharing of electrons is what ultimately
allows diodes to be build. When dopants from groups
3 or 5 (in most cases) are added to Si, Ge or GaAs it
changes the properties of the material so we are able
to make the P- and N-type materials that become the
diode.
Si
+4
Si
+4
Si
+4
Si
+4
Si
+4
Si
+4
Si
+4
Si
+4
Si
+4
The diagram above shows the
2D structure of the Si crystal.
The light green lines
represent the electronic
bonds made when the valence
electrons are shared. Each Si
atom shares one electron with
each of its four closest
neighbors so that its valence
band will have a full 8
electrons.
pn-juntion-Diode
13. N-Type Material:
When extra valence electrons are introduced into
a material such as silicon an n-type material is
produced. The extra valence electrons are
introduced by putting impurities or dopants into
the silicon. The dopants used to create an n-type
material are Group V elements. The most
commonly used dopants from Group V are
arsenic, antimony and phosphorus.
The 2D diagram to the left shows the extra
electron that will be present when a Group V
dopant is introduced to a material such as silicon.
This extra electron is very mobile.
+4
+4
+5
+4
+4
+4
+4
+4
+4
pn-juntion-Diode
14. P-Type Material:
P-type material is produced when the dopant that
is introduced is from Group III. Group III
elements have only 3 valence electrons and
therefore there is an electron missing. This
creates a hole (h+), or a positive charge that can
move around in the material. Commonly used
Group III dopants are aluminum, boron, and
gallium.
The 2D diagram to the left shows the hole that
will be present when a Group III dopant is
introduced to a material such as silicon. This
hole is quite mobile in the same way the extra
electron is mobile in a n-type material.
+4
+4
+3
+4
+4
+4
+4
+4
+4
pn-juntion-Diode
15. The Biased PN Junction
P n
+
_
Applied
Electric Field
Metal
Contact
“Ohmic
Contact”
(Rs~0)
+
_
Vapplied
I
The pn junction is considered biased when an external voltage is applied.
There are two types of biasing: Forward bias and Reverse bias.
These are described on then next slide.
pn-juntion-Diode
16. The Biased PN Junction
Forward Bias: In forward bias the depletion region shrinks slightly in width. With
this shrinking the energy required for charge carriers to cross the
depletion region decreases exponentially. Therefore, as the
applied voltage increases, current starts to flow across the
junction. The barrier potential of the diode is the voltage at which
appreciable current starts to flow through the diode. The barrier
potential varies for different materials.
Reverse Bias: Under reverse bias the depletion region widens. This causes the
electric field produced by the ions to cancel out the applied
reverse bias voltage. A small leakage current, Is (saturation
current) flows under reverse bias conditions. This saturation
current is made up of electron-hole pairs being produced in the
depletion region. Saturation current is sometimes referred to as
scale current because of it’s relationship to junction temperature.
Vapplied > 0
Vapplied < 0
pn-juntion-Diode