1. 1
9/30/2006
Reuse and Collaboration Opportunities in AMS
Design and Verification

2. 2
9/30/2006
Overview
Mixed-signal simulators for architectural design improve
collaboration, reuse, and the verification schedule
Standards or models can improve verification and
validation collaboration and reuse

3. 3
9/30/2006
Who Legerity is and What We Do
Carrier Telephony
• High voltage mixed-signal telephone
drivers for central offices, local
neighborhood boxes, and analog PBXs
Consumer Telephony
• Voice-enabled cable modems, voice-
enabled DSL modems, analog terminal
adapters
• Phone ready PCs
• Voice over wireless LAN

4. 4
9/30/2006
VERIFICATION
Logic Simulator
Digital
Spice
Analog
VHDL-AMS, FEA
Mechanical
SDK
Software
Modeling and Design Tool Incompatability
Matlab/Simulink
SYSTEM ARCHITECTURE
Imagine verification is a fan...
C
RTL Analog
Physics

5. 5
9/30/2006
VERIFICATIONVERIFICATION
MODELINGMODELING
MICRO
ARCHITECTURE
MICRO
ARCHITECTURE
Incompatible Models Delay Verification
SYSTEM
ARCHITECTURE
SYSTEM
ARCHITECTURE

6. 6
9/30/2006
VERIFICATION
Logic Simulator
Digital
Spice
Analog
VHDL-AMS
Mechanical
SystemC
Software
Analog-Mixed-Signal Simulators Provide Solution
Analog/Mixed-signal
SYSTEM ARCHITECTURE

7. 7
9/30/2006
VERIFICATIONVERIFICATION
MODELINGMODELING
MICRO
ARCHITECTURE
MICRO
ARCHITECTURE
Common Tools Move Verification Forward
SYSTEM
ARCHITECTURE
SYSTEM
ARCHITECTURE

8. 8
9/30/2006
Very Little Test Case Sharing – As Expensive As
Design
PRODUCT TEST
HARDWARE VALIDATION
VERIFICATION
Digital Analog
MechanicalSoftware
SYSTEM ARCHITECTURE SYSTEM TEST CASES
DESIGN TEST CASES
VERIFICATION TEST CASES
RANDOM TESTCASE GEN
VALIDATION TEST CASES
PRODUCTION TEST CASES

9. 9
9/30/2006
Virtual Lab Or Standard Devices/Languages May
Provide Solution
Hardware vendors provide simulation models of their devices
Define a standard set of devices and behavior
A standard mixed-signal verification assertion language can be defined
Bonus: Common environment allows common GUI between laboratory and
simulation (e.g. LabView)
Question: Do similar issues arise in signal processing and mechanical designs?
S D
SD
E S C
D L T
P R O LIAN T
8000
SD
1 2 3 4 5 6 7 8 9 1 0 11 1 2

10. 10
9/30/2006
Summary
Problems
• Collaboration between architecture and implementation
• Delayed verification
• Little test case, test bench, or RTG infrastructure reuse
Solutions
• Common design and modeling simulation tools
• Virtual lab or language standards