2. How to return to where we were?
• …
• …
• CALL FUNC1
• MOVF f1
• …
• FUNC1 …
• …
• …
• RETURN
• When the CALL line is reached, the PC has the address of
MOVF f1
• The CPU should now go to the FUNC1 label. How does it know
how to get back?
• The CPU saves nPC in memory in a special block called Stack
• We say nPC is pushed onto the stack
• When the RETURN instruction is met, the CPU retrieves the
saved value from the stack:
• We say nPC is popped out of the stack
• Execution resumes from the instruction following the CALL 2
4. 4
• The stack is a special memory (RAM) to hold instruction addresses in order to
remember where to return in the program when a CALL is made
• PIC 18 has 32 locations for stack.
• 32 = 25
• So we need 5 bits to address a particular location in the stack
• A regular register can do the job.
• PIC dedicates a SFR called Stack Pointer (SP) for this task but only the lower 5 bits
are used. The upper 3 bits are ignored.
5. How does the stack work
• Stack memory is used to save return addresses when a subroutine call ends
• A subroutine can itself make a CALL statement
• This is a nested call
• This call also causes a push operation on the stack
• Stack memory is treated as Last-In-First-Out
• SP always points to the latest used address on the stack
• (called top of stack TOS)
5
6. • When the subroutine reached the RETURN statement, it ends. Control
should return to the calling program where the call was made. So the nPC
should get back its saved value:
• This is done by popping the latest added address from the stack:
• nPC pop(stack)
• SP SP-1 (decrement SP by one position)
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7. Stack Pointer (SP)
• When PIC is powered up, SP0x00
• The stack pointer is initially pointing to location 0 in the stack.
• When SP=0 ➔ the stack is empty (PIC has not yet started any program)
• Stack location 0 is never used.
7
8. Stack push operation
• When a CALL is made, nPC is pushed onto the stack. Here is the sequence:
• SP SP+1 ; (starting at 0, now SP points to stack location 1)
• Stack location @(SP) nPC ; (the address of the next instruction is saved)
• nPC label in the CALL statement
8
9. Stack Pop operation
• Whenever a RETURN statement is reached, the stack gets popped:
• The contents of Stack Top; i.e., @(SP), go to nPC:
• nPC @(SP)
• Stack pointer is decremented: SP SP -1
• Is SP==0, then stack is empty again
• Program execution resumes from the location now in nPC
9
10. Notes on CALL and Stack
• Since location 0 is not used, the stack only has 31 locations to be used.
• The CALL instruction is a long jump since it translates into 2 instruction-
words (4 bytes)
• A shorter version is a relative call: RCALL LABEL
• Works like the medium jump (unconditional branch BRA)
• Has 11 bits for relative addressing (from -1024 to +1023)
• Used when the subroutine being called is not placed too far
10
11. • Write a program to count up from 00 to FFH and send the count to SFR of
Port B.
• Use one CALL subroutine for sending the data to Port B and
• another CALL for time delay whenever data is written to Port B.
11
12. Solution
• Proposed algorithm:
• Setup the needed registers
• Call the display subroutine
continuously
• Display subroutine:
• Increment counter
• Send result to port B
• Call Delay subroutine
• RETURN
• Delay Subroutine:
• Setup counting registers for causing a
delay
• Loop doing nothing for until the
count terminates
• When done, RETURN
12
13. • Delay subroutine: called from some location
• This does not use any CALL. BNZ does not affect the stack.
• When RETURN statement is reached, SP is decremented
13
14. Instruction Address
COUNT EQU 0X00
MYREG EQU 0X01
ORG 0
0x00000 MOVLW 0
0x00002 MOVWF COUNT
0x00004 BACK CALL DISPLAY
0x00008 GOTO BACK
0x0000C DISPLAY INCF COUNT, f
0x0000E MOVFF COUNT, PORT B
0x00012 CALL DELAY
0X00016 RETURN
14
16. • Review in detail examples 3-9, 3-10, 3-11
16
17. Summary
• CALL: 4-byte instruction; the absolute (20-bit) address of the subroutine is inserted
within the instruction (similar to GOTO)
• RCALL: 2- byte instruction. Only the relative address is inserted (11 bits; similar to
the unconditional branch instruction BRA)
• Both CALL and RCALL have the same effects:
• SP is automatically incremented, New top of stack nPC
• PC subroutine address
• Return is 2-bytes. It causes:
• PC stack top, and SP gets decremented
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18. Pipelining
• Is making an instruction time overlap with that of the next instruction.
• This is made possible in simplified architectures (such as RISC) because it is
possible to subdivide execution into similar stages for most instructions.
• Assume an instruction requires 8 clock cycles.
• Instead of executing 5 instructions in 5x8=40 clock cycles, subparts are
overlapped in the pipeline so that they require 5x4+4 cycles
18
22. Instruction Cycle vs Clock Cycle
• Clock Cycle: one clock (oscillator) period (determined by crystal oscillation)
• Oscillator connected to pins OSC1, OSC2
• Instruction cycle: time to execute one instruction (most common case)
• Some instructions take 2 or 3 instructions cycles (depending on size and branching
decision)
• PIC18: 1 instruction cycle = 4 clock periods
• Ex: a PIC18 is connected to a 24MHz oscillator. Find the instruction cycle in
seconds:
• 24MHz ➔6 × 106
instructions/sec.
• ➔instruction cycle time=
1
6×106 = 0.1667 𝜇𝑠 = 166.7𝑛𝑠
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23. Branch Penalty
• Normal execution is sequential: one instruction after another
• However, when there is a branch statement (conditional, unconditional, etc.) the
CPU has to halt executing the next instruction in sequence in order to fetch the
target instruction.
• If the branch is conditional: two cases to consider:
• Condition succeeds, branch is taken: next instruction in sequence is discarded and CPU
places the branch target instruction address on PC (this takes an extra cycle)
• Condition fails: branch is not taken, also called: Fall through. Next instruction has
already been fetched, execution continues normally (no penalty → no extra cycle)
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