Personal Information
Organización/Lugar de trabajo
Vijayawada Area, India India
Ocupación
Physical Verification Engineer at Intel Corporation Pvt Limited
Acerca de
M.TECH IN VLSI IN JNTU KAKINADA UNIVERSITY.
Hardware languages : Verilog,system verilog.
Programming Languages : Basics in C.
Scripting languages : Tickle,Perl.
Operating System : Windows,Linux.
EDA Tools : Synopsys VCS , Design Compiler, IC compiler.DFT compiler,Xilinx.
Basic knowledge in STA,ASIC design,Digital Design,Low power techniques,Physical Design,Verification concepts.
Interested in Design and verification, Physical design,DFT.
Etiquetas
verilog
physical design
vlsi
semiconductors
Ver más
Documentos
(1)Personal Information
Organización/Lugar de trabajo
Vijayawada Area, India India
Ocupación
Physical Verification Engineer at Intel Corporation Pvt Limited
Acerca de
M.TECH IN VLSI IN JNTU KAKINADA UNIVERSITY.
Hardware languages : Verilog,system verilog.
Programming Languages : Basics in C.
Scripting languages : Tickle,Perl.
Operating System : Windows,Linux.
EDA Tools : Synopsys VCS , Design Compiler, IC compiler.DFT compiler,Xilinx.
Basic knowledge in STA,ASIC design,Digital Design,Low power techniques,Physical Design,Verification concepts.
Interested in Design and verification, Physical design,DFT.
Etiquetas
verilog
physical design
vlsi
semiconductors
Ver más