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Review of Basics of Digital Electronics 1 Lecture 2
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Overview
Introduction
Logic Gates
Flip Flops
Registers
Counters
Multiplexer/ Demultiplexer
Decoder/ Encoder
Review of Basics of Digital Electronics 2 Lecture 2
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Registers
D
Q
C
D
Q
C
D
Q
C
D
Q
C
Clock
I0 I1 I2 I3
Register With Parallel Load
Clear
Review of Basics of Digital Electronics 3 Lecture 2
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Shift Register
Shift Registers
D Q
C
D Q
C
D Q
C
D Q
C
Serial
Input
Clock
Serial
Output
Review of Basics of Digital Electronics 4 Lecture 2
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Bidirectional Shift Register with Parallel Load
Bidirectional Shift Register with Parallel Load
D
Q
C
D
Q
C
D
Q
C
D
Q
C
A0 A1 A2
A3
4 x 1
MUX
4 x 1
MUX
4 x 1
MUX
4 x 1
MUX
Clock S0S1
I0 I1 I2
I3

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Lecture 2

  • 1. Review of Basics of Digital Electronics 1 Lecture 2 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Overview Introduction Logic Gates Flip Flops Registers Counters Multiplexer/ Demultiplexer Decoder/ Encoder
  • 2. Review of Basics of Digital Electronics 2 Lecture 2 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Registers D Q C D Q C D Q C D Q C Clock I0 I1 I2 I3 Register With Parallel Load Clear
  • 3. Review of Basics of Digital Electronics 3 Lecture 2 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Shift Register Shift Registers D Q C D Q C D Q C D Q C Serial Input Clock Serial Output
  • 4. Review of Basics of Digital Electronics 4 Lecture 2 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT Bidirectional Shift Register with Parallel Load Bidirectional Shift Register with Parallel Load D Q C D Q C D Q C D Q C A0 A1 A2 A3 4 x 1 MUX 4 x 1 MUX 4 x 1 MUX 4 x 1 MUX Clock S0S1 I0 I1 I2 I3