Leon Chua, who is considered to be the father of non-linear circuit theory, has argued that all 2-terminal non-volatile memory devices including ReRAM should be considered Memristors .

1. ‫شود‬‫می‬ ‫شروع‬ ‫آدم‬ ‫خود‬ ‫از‬ ‫ها‬ ‫پیروزی‬ ‫و‬ ‫ها‬ ‫شکست‬ ‫همه‬ ‫اساس‬.
‫است‬ ‫شکست‬ ‫اساس‬ ‫و‬ ‫است‬ ‫پیروزی‬ ‫اساس‬ ‫انسان‬.
‫است‬ ‫امور‬ ‫تمام‬ ‫اساس‬ ‫انسان‬ ‫باور‬.
‫امام‬‫خمینی‬(‫ره‬)

2. Memristor structures
in Non-Volatile Memory
STUDENT: RAMIN VAGHAR MOUSAVI
March 2014
‫و‬ ‫علوم‬ ‫پردیس‬‫تحقیقات‬

3. Memristor
Non-Volatile
ReRAM
Memory Cell
Memristor structures
in Non-Volatile Memory
M.Sc. st. Ramin Vaghar Mousavi
Dr. Mohammadi
Electronic Department , North Khorasan Science and Research branch

4. 4
Contents









5. 5
Chapter 1…

6. Introduction
6
Memristor
Memory Resistor+
Symbol :
Unit : ohm (Ω) Memristor, HP labs
Introduction
Simulaton
History
Theory
Memristor
Theory
RRAM
Memory cell
Conclusion
References

7. History
7
3 fundamental
circuit elements
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

8. History
8
4 fundamental
circuit elements
LEON 0. CHUA
Memristor-The Missing Circuit Element
IEEE TRANSACTIONS ON CIRCUIT THEORY,
VOL. CT-18, NO. 5, SEPTEMBER 1971
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

9. History
9
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

10. History
10
Memristor
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

11. 11
Chapter 2…

12. Theory
12
L.Chua,”Resistance switching
memories are memristor”,2011
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

13. Theory
13
PT PTTiOv(2-x)
TiO2
3 nm
2nm
Oxidized
Reduced
(-)ve (+)ve
Applied voltage makes the oxygen vacancies
(+ve) to shift towards the (–ve) voltage.
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

14. Theory
14
Ron
Roff
Off state (high resistance)
On state (low resistance)
Tio2-x
Tio2
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

15. Theory
15
HP-Memristors & Their Applications
Dmitri Strukov-HP Labs, Polo Alto , CA USA
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

16. Theory
16
HP-Memristors&TheirApplications
DmitriStrukov-HPLabs,PoloAlto,CAUSA
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

17. 17
Chapter 3…

18. 18
Realizations and Applications
• Non-volatile memory
• Programmable logic
• Signal Processing
• Neural networks
• Sensor
•Thermistors
• Ion channels
•Resistive switching systems:
Binary oxides: TiO2, CuO, NiO, CoO, Fe2O3 Strukov et al., Nature 2008
Perovskite oxides: SrTiO3, Pr1-xCaxMnO3
Sulfides: Cu2S, Ag2S
Organics: CuTCNQ, MIM (with pentacene, TPD, AIDCN, …)
Semiconductors: GaAs, ZnSe-Ge
•Spintronics devices
Applications
Realizations
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

19. 19
Realizations and Applications
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

20. Realizations and Applications
20
Non-Volatile Memories (NVM) Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

21. 21
RAM
DRAM
SDRAM
DDR
SRAM
In development
T-RAM
Z-RAM
NVRAM
Flash
memory
nvSRAM
FeRAMMRAM
PRAM
ROM
Mask ROMPROM
EPROM
EEPROM
In development
CBRAMSONOS
RRAMRacetrack
memory
NRAM
Millipede
memory
FJG
Mechanical
Magnetic
tape
Hard drive
Optical drive
Hierarchy

22. 22
RRAM:Resistive RandomAccessMemory
Resistive random-access memory (RRAM or ReRAM) is a
non-volatile memory type under development by a number of
different companies, some of which have patented versions of
ReRAM.[1][2][3][4][5][6][7]
Theory RRam
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

23. 23Emerging NVM Time
to market by Application
Figur[17]
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

24. 24
Theory RRam
(a) Main Focus of RRAM/Memristor (b) RRAM cross-bar structure[13]
b)
Cross-section of proposed
VPBJT-ReRAM cells:
(a) HfO2 bipolar ReRAM [18]
(b) TiON-based unipolar ReRAM.
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

25. 25
RRAM
In February 2012 Rambus bought a ReRAM company called Unity Semiconductor for
$35 million.[8] Panasonic launched a ReRAM evaluation kit in May 2012, based on a
tantalum oxide 1T1R (1 transistor - 1 resistor) memory cell architecture.[9]
Theory RRam
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

26. 26
In 2013, Crossbar introduced a prototype of RRAM as a chip about the size of
a postage stamp that can store 1 TB of data. According to an August 2013
interview with Crossbar, the large-scale production of their RRAM chips is
scheduled for 2015.[10]
Theory RRam
Crossbar: a 3D representation of
Crossbar's RRAM technology[10]
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

27. 27
RRAM
Theory RRam
Different forms of ReRAM have been disclosed, based on different dielectric
materials, spanning from perovskites to transition metal oxides to chalcogenides.
Even silicon dioxide has been shown to exhibit resistive switching as early
as 1967[14], and has recently been revisited. [15,16]
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

28. 28
RRAM
Theory RRam
Leon Chua, who is considered to be the father of non-linear circuit theory, has
argued that all 2-terminal non-volatile memory devices including ReRAM should be
considered memristors.[14]
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

29. 31
Theory RRam
FlashMemorySummit2013[10]
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

30. 32
Chapter 4…

31. Simulation Memristor Approach in Matlab
33
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

32. Simulation Memristor Approach in Matlab
34
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

33. 35
Chapter 5…

34. memory cell
36
A memory cell can be produced from the basic switching element in three
different ways. In the simplest approach, the single memory element can be
used as a basic memory cell, and inserted into a configuration in which
parallel bitlines are crossed by perpendicular wordlines with the switching
material placed between wordline and bitline at every cross-point
This configuration is called a cross-point cell.
Figure[19]
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

35. memory cell
37
a transistor device (ideally a MOS Transistor) can be added which makes the
selection of a cell very easy and therefore gives the best random access time, but
comes at the price of increased area consumption
RRAM
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

36. memory cell
38
For random access type memories, a transistor type
architecture is preferred while the cross-point architecture and
the diode architecture open the path toward stacking memory
layers on top of each other and therefore are ideally suited for
mass storage devices. The switching mechanism itself can be
classified in different dimensions.
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

37. memory cell 39
RRAM
First there are effects where the polarity between switching from the low to the high
resistance level (reset operation) is reversed compared to the switching between the high and
the low resistance level (set operation). These effects are called bipolar switching effects. On
the contrary, there are also unipolar switching effects where both set and reset operations
require the same polarity, but different voltage magnitude.
Working
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM
edn moment,
” toward a better understanding of rram“,edn.com 2012

38. 40
RRAM
Illustration of the resistive switching mechanism
in bipolar oxide-based memory cell:
(a) Schematic illustration of the SET process.
(b) Schematic view of the conducting filament
in the low resistance state (ON state).
(c) Schematic illustration of the RESET process.
(d) Schematic view of the conducting filament
in the high resistance state (OFF state).
Only the oxygen vacancies and ions which
impact the resistive switching are shown
Figure[8]
memory cell
Working

39. RRAM
41
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM
memory cell
Working
Schindler et al.,
Proc. IEEE Non-volatile Memory

40. 43
RRAM
memory cell
Working
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

41. memory cell
44
RRAM
Figure : A simple memristor-based memory array showing how a memristor device
is located at the intersection between two bars of the array.
Mohammed Affan Zidan,” Memristor-based Memory: The Sneak Paths
Problem and Solutions”
Preprint submitted to Microelectronics Journal October 29, 2012
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

42. memory cell
45
RRAM Figure : Showing crossbar architecture and magnified memristive switch
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

43. Proposed memristor memory cell
47
The memristor is operated at either its high resistance or low resistance states.
When the Read Enable switch is set to ‘on’ I,e. a circuit is made with the
memristor and resistor Rx in series the circuit is reading the state of the memristor.
[9],The resistor Rx is set at
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

44. Proposed memristor memory cell
48
Vx is greater then Vref = Vin /2
low resistance state(logic one )
Vx is less than Vref = Vin /2
high resistance state( logic zero )
output Vo is VL ( the low saturation
voltage of the op-amp)
output Vo is Vh(the high saturation
voltage of the op-amp)
In order to perform a read operation a vltage is placed at Vin. [9]
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

45. Proposed memristor memory cell
49
a)Write operation structure b)write signal patterns[9]
Write operations are performed by switching the read enable switch to off.
Now the circuit is simply a voltage source in series with a memristor as shown in figure(a) .
A positive voltage pulse VA of duration Tw1 will change the memristance of the memristor
to its Roff value i.e. it will write a logic one. Similarly a voltage pulse of -VA of duration Tw0
will change the memristance of the memristor to its Ron value i.e. it will write a logic zero.
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

46. Proposed memristor memory cell
50
The proposed read voltage pulse [9]
for every read voltage pulse to initially send a negative voltage pulse then a
read voltage pulse as shown in figure .
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

47. Circuit Memory Cell
51
RRAM
The read and write circuits for the proposed emulator circuit of memristors [11]
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

48. simulated voltage waveforms
52
The simulated voltage waveforms of DIN, WR, RD, and DOUT that are the input
data of the write driver, write command signal, read command signal, and output
data of the read circuit, respectively.
The read and write circuits for the proposed emulator circuit of memristors [11]
Introduction
Simulaton
History
Memory cell
Conclusion
References
Theory
Memristor
Theory
RRAM

49. Working
54

50. 55
Chapter 6…

51. Conclusion
56
we derived accurate models for the performance and the energy
dissipation of the 1T1R TiO2-based RRAM cell.
The write access time is inversely proportional to minimum value of
memristance and directly proportional to the square of memristor
thickness.
The read access time of the cell is only a function of the maximum
value of memristance and does not change by the memrsitor thickness.

52. Conclusion
57
Read operation is one order of magnitude faster than write operation in the 1T1R cell.
From energy perspective,the write operation is roughly three times more energy
consuming than the read operation.
The write energy increases quadratically for larger memristor thicknesses while read
energy dissipation depends only on the bitline capacitor and is not a function of the
physical parameters of the memristor.
Figur[10]

53. Conclusion
58
Lucas Mearian,” Next-gen storage wars: In the battle of
RRAM vs 3D NAND flash, all of us are winners “,2013

54. 59
Chapter 7…

55. References
60
1. Mellor, Chris , “Rambus drops $35m for Unity Semiconductor”, 7 February 2012
2. "the new microcontrollers with on-chip non-volatile memory ReRAM" , Panasonic. May 15, 2012. Retrieved
May 16, 2012.
3. "Next-gen storage wars: In the battle of RRAM vs 3D NAND flash, all of us are winners" ,PC World. August 9,
2013. Retrieved January 28, 2014.
4. D. R. Lamb and P. C. Rundle, "A non-filamentary switching action in thermally grown silicon dioxide films",
Br. J. Appl. Phys. 18, 29-32 (1967)
5. I.-S. Park et al., Jap. J. Appl. Phys. vol. 46, pp. 2172-2174 (2007).

56. References
61
6. A. Mehonic et al., J. Appl. Phys. 111, 074507 (2012)
7. Chua, L. O., "Resistance switching memories are memristors", IEEE2011
8. Alexander Makarov &group,” Stochastic Modeling Hysteresis and Resistive Switching in Bipolar Oxide-Based
Memory”,IEEE 2010
9. Raymond Carley & Adrian Walsh,” Memristor Circuit Investigation through a new Tutorial Toolbox”,
University College Dublin 2013
10. Jung H.Yoon & Group,”Flash & DRAM Si Scaling Challenges,…”, IBM 2013
11.http://www.nanoscalereslett.com/content/8/1/454,” Small-area and compact CMOS emulator circuit
for CMOS/nanoscale memristor co-design”,springer 2013

57. References
62
12. Dmitri Strukov,” HP-Memristors & Their Applications”HP-Lab
13. http://www.dsi.a-star.edu.sg/key-rd-areas/non-volatile-memory/projects/pages/rrammemristor.aspx
14. D. R. Lamb and P. C. Rundle, "A non-filamentary switching action in thermally grown silicon dioxide films", Br.
J. Appl. Phys. 18, 29-32 (1967)
15. I.-S. Park et al., Jap. J. Appl. Phys. vol. 46, pp. 2172-2174 (2007)
16. A. Mehonic et al., J. Appl. Phys. 111, 074507 (2012)
17. Emerging Non Volatile Memories 2013 report , Yole Developpement SARL
18. Meng-Fan Chang & Group,” Area-Efficient Embedded Resistive RAM (ReRAM)…”;IEEE 2014
19. Mahmoud Zangeneh and Ajay Joshi,” Performance and Energy Models for Memristor-based
1T1R RRAM Cell”, GLSVLSI’12 ,2012

58. 63
SUBMIT BY:
Ramin VagharMousavi
www.favaforum.ir
info@favaforum.ir
rvagharmosavi@tvu.ac.ir
Link me:

59. Any question?...

60. 65
Chapter 8…

61. RRAM
Simulation Memristor Approach in Matlab
function Memristor
Ron=100; Roff=16e3;
DR=Roff-Ron;Rinit=11e3;
tmin=0;tmax=3; % time interval
N=500; % number of steps is N+1
Osat=tmin:(tmax-tmin)/N:tmax; %initial condition
x0=(Roff-Rinit)/DR; % initial condition
[t,x]=ode23t(@Memri,Osat,x0); % calling ODE
V=1*sin(2*pi*1*t); % input voltage
I=V./(Roff-x*DR); % current
% --- intagration of U and I ---
Flux=(t(2)-t(1))*filter(1,[1 -1],V);
Charge=(t(2)-t(1))*filter(1,[1 -1],I);
% --- drawing the results ---
figure(1)
subplot(3,2,1)
plot(t,V);title('Plot of V')
xlabel('time');ylabel('V')
subplot(3,2,2)
plot(t,Flux);title('Plot of Flux')
xlabel('time');ylabel('Flux')
subplot(3,2,3)
plot(t,I);title('Plot of I')
xlabel('time');ylabel('I')
subplot(3,2,4)
plot(t,Charge);title('Plot of Charge')
xlabel('time');ylabel('Charge')
subplot(3,2,5)
plot(V,I);title('Plot of V versus I')
xlabel('I');ylabel('V')
subplot(3,2,6)
plot( Flux,Charge);title('Plot of charge versus
flux')
xlabel('Flux');ylabel('Charge')

62. Appendix

63. Appendix

64. Appendix