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IoT & Edge Computing
Prof. Amlan Chakrabarti
IEEE Computer Society Distinguished Visitor
Director, A.K.Choudhury School of Information Technology
University of Calcutta
IEEE Computer Society Distinguished Speaker Lecture
Organised By: Department of ECE IIIT Delhi
23rd February, 2022
Embedded and IoT Research Lab@AKCSIT, CU
(Researchers on IoT & Edge Computing)
Piyali Ganguly
TCS RSP Fellow, AKCSIT-CU
Area: IoT and Blockchain Security
Dr. Krishnendu Guha
Postdoc. Fellow U. Florida
Area: Cloud Computing &
Embedded Security
Samik Basu
Guest Faculty for SMDP-C2SD
Programme, CU
Area: EDA & Edge Computing
Dr. Swagata Mandal
Assistant Professor
Jalpaiguri Government Engineering
College
Area: ML & Fault Tolerant Computing
MD. Tausif Mallick
SRF WB. DST, AKCSIT-CU
Area: ML & Image Processing
Atanu Majumdar
SRF UGC, AKCSIT-CU
Area: Energy Efficient Computing
Projects Undertaken
• Open Hardware based Communicable Digital Bio-Sensing Platform, MietY, Govt. of India
(2017-2020)
• Real time Image Processing based Machine Learning techniques for site specific insect
pest and disease management of crops, Department of Science & Technology Govt. West
Bengal (2019-2022)
• New Generation Communications and Security, Intel India Research Grant 2019-2020
• Development of Trusted Middleware Strategies in IoT Framework using Blockchain
Technology, TCS RSP Grant 2020-24
• Development of RMLA IP and ASIC prototyping” (Reconfigurable Machine Learning
Accelerator design and development for Avionics applications) in Collaboration with IIT
Hyderabad, Funded by DRDO, 2021-24
A generic architecture of IoT systems
4
Wei Emma Zhang et al., arXiv:2012.01594v1 [cs.DC]
IoT, Edge and Cloud Computing
14-Aug-22 5
Edge computing is a distributed computing concept that
integrates intelligence to edge devices, also called edge nodes, allowing data to
be processed and analyzed in real time near the data collection source to improve
response times and save bandwidth.
 Cloud computing is the delivery of computing services—including servers, storage,
databases, networking, software, analytics, and intelligence—over the Internet
(“the cloud”) to offer faster innovation, flexible resources, and economies of scale.
@Team Embedded, CU
What is a Service Model?
14-Aug-22 6
When a product is sold as a service, the model allows customers to
use only those resources they need at that point of time.
As a result, as a service models are perfectly fitted for scenarios with
variable demand; where there are sudden increase in customers need.
As-a-service models also enable customers to rapidly setting up and
pulling down resources and to pay per use (service) as they are going
forward rather than acquire major capital costs up-front
@Team Embedded, CU
 According to a Cisco white paper, 50 billion IoT devices will be connected to the
Internet by 2020
 Cisco estimates that nearly 850 Zettabytes (ZB) of data will be generated each year
outside the cloud by 2021
*Fog Computing and the Internet of Things: Extend the Cloud to Where the Things Are. Accessed: May 30, 2019.
[Online]. Available: https://www.cisco.com/c/dam/en_us/solutions/trends/iot/docs /computing-overview.pdf
What is Machine Learning & Deep Learning
 ML is a data driven approach focused on creating algorithms that has the ability to learn from the
data without being explicitly programmed, Deep learning is a type of machine learning in which a
model learns to perform classification tasks directly from images, text, or sound.
7
Hardware for Deep Learning Inference
06-Oct-20 RMLA@PEC 8
Edge Analytics
• A model of data analysis where
incoming data streams are analyzed
at the Edge devices.
• Web and mobile application analytics
track a variety of metrics constantly,
both on the backend and the front-
end of the application’s stack.
• Unlike traditional analytics models,
edge analytics emphasize speed and
decentralization and thus ignore
normal big data collection methods.
• The concept is relatively new and is
closely tied with the emergence of
the IoT as a viable technology for the
future.
Edge intelligence and intelligent edge
14-ऑग.-22 10
@Team Embedded, CU
Landscape of Edge DL
14-ऑग.-22 @Team VLSI, CU 11
Edge: Target Platforms
?
Performance
Flexibility
GPP
ASIC
Reconfigurable
Platforms
 Reconfigurable systems
combine the benefits of
flexibility of general
purpose processors along
with the performance
efficiency of a dedicated
hardware
 Reconfigurable systems
are increasingly being
employed in a large class
of today’s real-time
embedded systems,
critical systems, AI
systems, cloud etc.
Basic Architecture
14-Aug-22 13
Basic architecture of the edge devices on FPGA platform to
work as an IoT node
IoT-ARM Communication
Stack
@Team Embedded, CU
14
High-level component diagram
Receiver
Pre-trained
network
Network
weights,
hyperparameters
Detector
Streaming
Images
Feedbac
k *
Splitter Task
Sequencer
Merger
Hardware
bed
Evaluator
H/W –
S/W
Interface
* If the golden metrics of the system are not met, feedback sent to the pre-trained network for
potential adjustments
15
Scheme for Split-Merge Operations
Layer ‘L’ Layer ‘L + 1’
Split-Merge Engine
Input Image
/ Feature
Map
Feature
Map
Split
&
Replicate
.
.
.
.
Convolve
.
.
Activation
.
.
Pooling
Layer ‘L’ feature map
Layer ‘L+1’ feature map
16
Scheme for Hardware/Software Task Partitioning
Efficient techniques for HW/SW partitioning to be employed to minimize the
runtime/enhance the throughput and optimize the energy utilization of the whole
system for the given applications with multi-tasks
Assumptions:
 A task can be scheduled if and only if its predecessors are complete
 Performance of tasks executed on hardware are more efficient than on software
 We will investigate efficient heuristic strategies for the problems of HW/SW
partitioning and task scheduling
 Integer programming, dynamic programming , branch and bound algorithm etc.
17
Challenges in RT Scheduling in FPGAs
 The periodic real time scheduling algorithms can’t directly be employed
for reconfigurable systems due to its architectural constraints
 All timing constraints should be met while taking care of the
reconfiguration overheads and also allowing efficient resource utilization
Flexible
1D
Slotted 1D Flexible
2D
Slotted 2D
Scheduling Tasks for Reconfigurable Architectures, Lecture Presented at University of
Cambridge, May 2018
18
DPSPR (Deadline Partitioning Scheduler for
Partially Reconfigurable Systems)
Scheduling Dynamic Hard Real-Time Task Sets on Fully and Partially Reconfigurable Platforms. IEEE
Embed. Syst. Lett. 7(1): 23-26 (2015)
19
Co-scheduling Persistent Periodic and Dynamic
Aperiodic Real-Time Tasks on Reconfigurable
Platforms
Co-Scheduling Persistent Periodic and Dynamic Aperiodic Real-Time Tasks on Reconfigurable Platforms. IEEE Trans.
Multi Scale Comput. Syst. 4(1): 41-54 (2018)
Slack in ts2 After allocation of
aperiodic task
Data Structure for DPCS
20
Spatio-Temporal Scheduling of Pre-emptive
Real-Time Tasks on Partially Reconfigurable
Systems
“Spatio-Temporal Scheduling of Preemptive Real-Time Tasks on Partially Reconfigurable Systems”, ACM
Transactions on Design Automation of Electronic Systems (TODAES), 22(4): 71:1-71:26 (2017).
Figure: NSP
System
Architecture
Rourab Paul, Amlan Chakrabarti and R.Ghosh, “Multi core SSL/TLS security processor architecture and its FPGA
prototype design with automated preferential algorithm,” Elsevier Microprocessors and Microsystems - Embedded
Hardware Design, Vol. 40: pp. 124-136, 2016
NSP System Architecture
Voltage Scaling for Partitioned Systolic Array in A
Reconfigurable Platform
• Ultra low power FPGA implementation of a TPU for edge applications
• We divide the systolic-array of a TPU into different FPGA partitions, where each partition
uses different near threshold (NTC) biasing voltages to run its FPGA cores
• To overcome the timing failure caused by NTC, the higher slack paths are placed in lower
voltage partitions and lower slack paths are placed in higher voltage partitions
Voltage Scaling for Partitioned Systolic Array in Reconfigurable Platform, DAC 2021
• Edge computing can reduce processing times and improve application
performance
• The idea behind this model is to process data with lower latency necessary
for many new applications, while saving network cost
• Edge Intelligence or Edge AI is a combination of AI and Edge Computing; it
enables the deployment of machine learning algorithms to the edge device
where the data is generated
• Edge intelligence is expected to push deep learning computations from the
cloud to the edge as much as possible
• IoT workloads on edge computing architectures and demonstrated the
suitability of FPGA accelerators for edge servers
• Reconfigurable Edge Computing may be a key driver and we to address the
issues of real-time response, scalability, security and energy efficiency
Conclusion
Lecture_IIITD.pptx

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Lecture_IIITD.pptx

  • 1. IoT & Edge Computing Prof. Amlan Chakrabarti IEEE Computer Society Distinguished Visitor Director, A.K.Choudhury School of Information Technology University of Calcutta IEEE Computer Society Distinguished Speaker Lecture Organised By: Department of ECE IIIT Delhi 23rd February, 2022
  • 2. Embedded and IoT Research Lab@AKCSIT, CU (Researchers on IoT & Edge Computing) Piyali Ganguly TCS RSP Fellow, AKCSIT-CU Area: IoT and Blockchain Security Dr. Krishnendu Guha Postdoc. Fellow U. Florida Area: Cloud Computing & Embedded Security Samik Basu Guest Faculty for SMDP-C2SD Programme, CU Area: EDA & Edge Computing Dr. Swagata Mandal Assistant Professor Jalpaiguri Government Engineering College Area: ML & Fault Tolerant Computing MD. Tausif Mallick SRF WB. DST, AKCSIT-CU Area: ML & Image Processing Atanu Majumdar SRF UGC, AKCSIT-CU Area: Energy Efficient Computing
  • 3. Projects Undertaken • Open Hardware based Communicable Digital Bio-Sensing Platform, MietY, Govt. of India (2017-2020) • Real time Image Processing based Machine Learning techniques for site specific insect pest and disease management of crops, Department of Science & Technology Govt. West Bengal (2019-2022) • New Generation Communications and Security, Intel India Research Grant 2019-2020 • Development of Trusted Middleware Strategies in IoT Framework using Blockchain Technology, TCS RSP Grant 2020-24 • Development of RMLA IP and ASIC prototyping” (Reconfigurable Machine Learning Accelerator design and development for Avionics applications) in Collaboration with IIT Hyderabad, Funded by DRDO, 2021-24
  • 4. A generic architecture of IoT systems 4 Wei Emma Zhang et al., arXiv:2012.01594v1 [cs.DC]
  • 5. IoT, Edge and Cloud Computing 14-Aug-22 5 Edge computing is a distributed computing concept that integrates intelligence to edge devices, also called edge nodes, allowing data to be processed and analyzed in real time near the data collection source to improve response times and save bandwidth.  Cloud computing is the delivery of computing services—including servers, storage, databases, networking, software, analytics, and intelligence—over the Internet (“the cloud”) to offer faster innovation, flexible resources, and economies of scale. @Team Embedded, CU
  • 6. What is a Service Model? 14-Aug-22 6 When a product is sold as a service, the model allows customers to use only those resources they need at that point of time. As a result, as a service models are perfectly fitted for scenarios with variable demand; where there are sudden increase in customers need. As-a-service models also enable customers to rapidly setting up and pulling down resources and to pay per use (service) as they are going forward rather than acquire major capital costs up-front @Team Embedded, CU  According to a Cisco white paper, 50 billion IoT devices will be connected to the Internet by 2020  Cisco estimates that nearly 850 Zettabytes (ZB) of data will be generated each year outside the cloud by 2021 *Fog Computing and the Internet of Things: Extend the Cloud to Where the Things Are. Accessed: May 30, 2019. [Online]. Available: https://www.cisco.com/c/dam/en_us/solutions/trends/iot/docs /computing-overview.pdf
  • 7. What is Machine Learning & Deep Learning  ML is a data driven approach focused on creating algorithms that has the ability to learn from the data without being explicitly programmed, Deep learning is a type of machine learning in which a model learns to perform classification tasks directly from images, text, or sound. 7
  • 8. Hardware for Deep Learning Inference 06-Oct-20 RMLA@PEC 8
  • 9. Edge Analytics • A model of data analysis where incoming data streams are analyzed at the Edge devices. • Web and mobile application analytics track a variety of metrics constantly, both on the backend and the front- end of the application’s stack. • Unlike traditional analytics models, edge analytics emphasize speed and decentralization and thus ignore normal big data collection methods. • The concept is relatively new and is closely tied with the emergence of the IoT as a viable technology for the future.
  • 10. Edge intelligence and intelligent edge 14-ऑग.-22 10 @Team Embedded, CU
  • 11. Landscape of Edge DL 14-ऑग.-22 @Team VLSI, CU 11
  • 12. Edge: Target Platforms ? Performance Flexibility GPP ASIC Reconfigurable Platforms  Reconfigurable systems combine the benefits of flexibility of general purpose processors along with the performance efficiency of a dedicated hardware  Reconfigurable systems are increasingly being employed in a large class of today’s real-time embedded systems, critical systems, AI systems, cloud etc.
  • 13. Basic Architecture 14-Aug-22 13 Basic architecture of the edge devices on FPGA platform to work as an IoT node IoT-ARM Communication Stack @Team Embedded, CU
  • 14. 14 High-level component diagram Receiver Pre-trained network Network weights, hyperparameters Detector Streaming Images Feedbac k * Splitter Task Sequencer Merger Hardware bed Evaluator H/W – S/W Interface * If the golden metrics of the system are not met, feedback sent to the pre-trained network for potential adjustments
  • 15. 15 Scheme for Split-Merge Operations Layer ‘L’ Layer ‘L + 1’ Split-Merge Engine Input Image / Feature Map Feature Map Split & Replicate . . . . Convolve . . Activation . . Pooling Layer ‘L’ feature map Layer ‘L+1’ feature map
  • 16. 16 Scheme for Hardware/Software Task Partitioning Efficient techniques for HW/SW partitioning to be employed to minimize the runtime/enhance the throughput and optimize the energy utilization of the whole system for the given applications with multi-tasks Assumptions:  A task can be scheduled if and only if its predecessors are complete  Performance of tasks executed on hardware are more efficient than on software  We will investigate efficient heuristic strategies for the problems of HW/SW partitioning and task scheduling  Integer programming, dynamic programming , branch and bound algorithm etc.
  • 17. 17 Challenges in RT Scheduling in FPGAs  The periodic real time scheduling algorithms can’t directly be employed for reconfigurable systems due to its architectural constraints  All timing constraints should be met while taking care of the reconfiguration overheads and also allowing efficient resource utilization Flexible 1D Slotted 1D Flexible 2D Slotted 2D Scheduling Tasks for Reconfigurable Architectures, Lecture Presented at University of Cambridge, May 2018
  • 18. 18 DPSPR (Deadline Partitioning Scheduler for Partially Reconfigurable Systems) Scheduling Dynamic Hard Real-Time Task Sets on Fully and Partially Reconfigurable Platforms. IEEE Embed. Syst. Lett. 7(1): 23-26 (2015)
  • 19. 19 Co-scheduling Persistent Periodic and Dynamic Aperiodic Real-Time Tasks on Reconfigurable Platforms Co-Scheduling Persistent Periodic and Dynamic Aperiodic Real-Time Tasks on Reconfigurable Platforms. IEEE Trans. Multi Scale Comput. Syst. 4(1): 41-54 (2018) Slack in ts2 After allocation of aperiodic task Data Structure for DPCS
  • 20. 20 Spatio-Temporal Scheduling of Pre-emptive Real-Time Tasks on Partially Reconfigurable Systems “Spatio-Temporal Scheduling of Preemptive Real-Time Tasks on Partially Reconfigurable Systems”, ACM Transactions on Design Automation of Electronic Systems (TODAES), 22(4): 71:1-71:26 (2017).
  • 21. Figure: NSP System Architecture Rourab Paul, Amlan Chakrabarti and R.Ghosh, “Multi core SSL/TLS security processor architecture and its FPGA prototype design with automated preferential algorithm,” Elsevier Microprocessors and Microsystems - Embedded Hardware Design, Vol. 40: pp. 124-136, 2016 NSP System Architecture
  • 22. Voltage Scaling for Partitioned Systolic Array in A Reconfigurable Platform • Ultra low power FPGA implementation of a TPU for edge applications • We divide the systolic-array of a TPU into different FPGA partitions, where each partition uses different near threshold (NTC) biasing voltages to run its FPGA cores • To overcome the timing failure caused by NTC, the higher slack paths are placed in lower voltage partitions and lower slack paths are placed in higher voltage partitions Voltage Scaling for Partitioned Systolic Array in Reconfigurable Platform, DAC 2021
  • 23. • Edge computing can reduce processing times and improve application performance • The idea behind this model is to process data with lower latency necessary for many new applications, while saving network cost • Edge Intelligence or Edge AI is a combination of AI and Edge Computing; it enables the deployment of machine learning algorithms to the edge device where the data is generated • Edge intelligence is expected to push deep learning computations from the cloud to the edge as much as possible • IoT workloads on edge computing architectures and demonstrated the suitability of FPGA accelerators for edge servers • Reconfigurable Edge Computing may be a key driver and we to address the issues of real-time response, scalability, security and energy efficiency Conclusion