1. www.www.sagaxsagax..huhu
SagaxSagax,, LtdLtd..
HallerHaller u. 11-13.u. 11-13.
1096 Budapest, HUNGARY1096 Budapest, HUNGARY
Software Defined RadioSoftware Defined Radio Platform ElementsPlatform Elements
This integrated digital modulator board is the first step towards
the universal SDR platform elements contains technology
enhancements including:
•FPGA firmware update trough the serial control interface
•On-board power regulator and clock oscillator
•Universal, programmable output cross-connects
•Interleaving modulation for wideband applications
•Board stacking (mezzanine) capability to DSP board
Universal digital modulator card with Xilinx XC2S50 FPGA,
AD6622 digital up-converter, XC95144XL CPLD based cross-
connects and AD9772A interpolating DACs
Integrated digital modulator for multichannel and
phased array applications:
14-Bit
DAC
(AD9772)
14-Bit
DAC
(AD9772)
14-Bit
DAC
(AD9772)
14-Bit
DAC
(AD9772)
Cross
Connect
Switch
(CPLD)
Cross
Connect
Switch
(CPLD)
Cross
Connect
Switch
(CPLD)
Cross
Connect
Switch
(CPLD)
Digital
Transmit
Processor
(AD6622)
Digital
Transmit
Processor
(AD6622)
Digital
Transmit
Processor
(AD6622)
Digital
Transmit
Processor
(AD6622)
Programmable output cross-
connect implemented in CPLD
The modulator could be used as
mezzanine card on DSP board
PCI
HOST
Interface
PCI
BUS
FPGA
LOGIC and DSP
resource
MCU
Config
EEPROM
Control
EEPROM
PROM
JTAG
FPGA
JTAG
Dedicated
data
connection
RS-232
serial control
interface
Front-end
BUS
Control
BUS
CLK DRV
/2, /4
X2, X4SCLK
OSC
External
CLK in/out
LCLK
OSC
Sampling
CLK
Local
CLK
I2C
FPGA CFG
Clock
lines
Different
front-end
configurations
External
TRG in/out
Desktop PCI based universal AD and DA converter card
The development of universal converter desktop PCI
card family continued on this architecture
The first PCI based IO card (DCU-202) with one
input and one output channels using up to 80MHz
sampling clock and slave mode PCI interface
Technology enhancements include:
•FPGA firmware booting from EEPROM
•Using slave mode PCI interface chip
•Local bus logic implementation in FPGA
•Deep FIFO memory for samples
•External bus connection capability
•External triggering and clocking
Dynamic range performance ADC:
40MHz sampling clock, 8192points FFT
Internally generated spurious signals
are below -90dBFS
Universal digital modulator for multichannel, wideband and phased array applications