Droidcon2013 ndk cpu_architecture_optimization_weggerle_intel

Optimizing NDK projects
for multiple CPU architectures

Alexander Weggerle
Technical Consultant Engineer
Intel Software and Services Group

Agenda

• Compatibility

• Compiler options

• Code paths

• Differences between ARM and x86

• Publishing

Copyright© 2012, Intel Corporation. All rights reserved.
*Other brands and names are the property of their respective owners.

Introduction

• Performance critical apps are popular
• Games
• Real time multimedia
• Augmented reality

• Users are sensitive
• Don’t accept lags
• Fluid animations
• Minimal load time

Optimization is important


Compatibility

“I want my app to run on all architectures”

• You already done for Java & HTML

• NDK based apps usually just needs a recompilation
APP_ABI := all

Application.mk


Target compiler options

• NDK-build system Android.mk file evaluated for
each architecture

• Variable TARGET_ARCH_ABI describes actual
architecture

TARGET_ARCH_ABI ifeq ($(TARGET_ARCH_ABI),x86)
LOCAL_CFLAGS := -mtune=atom -mssse3
x86 endif

armeabi ifeq ($(TARGET_ARCH_ABI),armeabi-v7a)
LOCAL_CFLAGS := -march=armv7-a
armeabi-v7a Endif
mips Android.mk


Recommended Compiler options (x86)

• -mtune=atom
• Out of Order scheduling

• -march=atom
• movbe instruction
• Code is only guaranteed to run on Atom.
– Might not run on emulator or other CPUs

• -ansi-alias / -restrict / -no-prec-div


Multiple Code Paths

• Different reasons for multiple code paths
• Optimizing for multiple architectures
• Single Instruction Multiple Data (SIMD)
• Assembly kernels
• Memory alignment
• Instruction set support


Multiple Code Paths
Compiler macros
• Directly inside source code

• No runtime overhead

• Works with all build configurations
#ifdef __i386__
strlcat(buf, "__i386__", sizeof(buf));
#endif
#ifdef __arm__
strlcat(buf, "__arm__", sizeof(buf));
#endif
#ifdef _MIPS_ARCH
strlcat(buf, "_MIPS_ARCH", sizeof(buf));
#endif

source.c


Multiple Code Paths
Make system
• Make system will select source file depending on
architecture

• No runtime overhead

arch_x86.cpp
const char *getTarget ();

arch_arm.cpp arch.h cpufeaturestest.cpp
const char *getTarget (); const char *getTarget (); printf(“%s”, getTarget());

arch_default.cpp
const char *getTarget ();


Multiple Code Paths
Cpufeatures API
• Checks for architecture and
special CPU features

• Uses compiler macros +
runtime detection internally
• Small runtime overhead


Porting Native (C/C++) Android* Apps to x86

http://software.intel.com/en-us/articles/ndk-android-application-porting-
methodologies/

Native Apps
• Optimized NDK for Intel Atom based
devices available on
http://developer.android.com/sdk/nd
k/index.html since July’11.
• For most apps, changing the make
file and a recompile should be
sufficient to port to Intel Atom
devices.
• If ARM-specific features are used,
Intel SSE equivalents should be
added (build flag)
• Developer recompiles, re-packages
and publishes.


ARM* NEON to Intel® SSE

• Single Instruction Multiple Data (SIMD)

• Most ARM NEON functions have a 1:1 equivalent in
Intel® SSE

• Intel provides C++ header file to do the mapping
// VADD.I8 d0,d0,d0
int8x8_t vadd_s8(int8x8_t a, int8x8_t b);
#ifdef USE_MMX
#define vadd_s8 _mm_add_pi8 //MMX
#else
#define vadd_s8 _mm_add_epi8
#endif

neonvssse.h


Differences between ARM and x86
Alignment
• ARM uses aligned, x86 uses packed memory

struct TestStruct
ARM
{
int mVar1;
long long mVar2;
int mVar3;
};
x86

• Compiler parameter helps to workaround
-malign-double


Market
Fat binary
• Include all binaries into one apk
libs/armeabi
Source

ndk-build apkbuilder

libs/armeabi-
v7a …

libs/x86

• Device removes incompatible libs at installation


Market
Multiple APKs
• Support for different …
• Texture formats
• Screen sizes and densities
• Platform versions
• CPU architectures

• Saves bandwidth and space while installation


Conclusion & Call to action

• NDK provides plenty of mechanisms to
differentiate between architectures

• Recompile your NDK based app with
APP_ABI := all


Legal Disclaimer & Optimization Notice

INFORMATION IN THIS DOCUMENT IS PROVIDED “AS IS”. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS
DOCUMENT. INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR
IMPLIED WARRANTY, RELATING TO THIS INFORMATION INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY
PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

Software and workloads used in performance tests may have been optimized for performance only on
Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using
specific computer systems, components, software, operations and functions. Any change to any of
those factors may cause the results to vary. You should consult other information and performance
tests to assist you in fully evaluating your contemplated purchases, including the performance of that
product when combined with other products.

Copyright © , Intel Corporation. All rights reserved. Intel, the Intel logo, Xeon, Core, VTune, and Cilk
are trademarks of Intel Corporation in the U.S. and other countries.

Optimization Notice
Intel’s compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that
are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and
other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on
microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended
for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for
Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information
regarding the specific instruction sets covered by this notice.
Notice revision #20110804

22 Intel Confidential
17.04.2013 *Other brands and names are the property of their respective owners.

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