1. Simplify: an abstract MPSoC platform framework
for enabling fast functional/behavioral simulation
Gabriel Marchesan Almeida, Oliver Bellaver Longhi,
Michael Hübner, Fabiano Hessel and Jürgen Becker
www.kit.edu

2. Motivation
Multiprocessor Systems-on-Chips (MPSoCs): popular solution that
combines flexibility of software along with potentially significant
speedups;
They integrate few mid-range microprocessors for which applications
are usually statically mapped at design-time;
Those applications however tend to increase in complexity and
often exhibit time-changing workloads which makes mapping
decisions sub-optimal in a number of scenarios;
Offline approaches are no longer sufficient as application mapping
paradigms, because they do not allow coping with time changing
workloads;
Institut für Technik der Informationsverarbeitung (ITIV)
2 11.10.2012 Dr. Michael Hübner

3. Institut für Technik der Informationsverarbeitung (ITIV)
Reconfigurable area
Manycore
FP7 – FPT ICT – 288248
Tile Tile Tile
Tile Tile Tile
Resource Monitoring
Virtualisation Layers
& Allocation
Kernel
Virtualisation Layer
FlexTiles project (Tool-Flow Overview)
Virtual Virtual
Bitstream Code
generation generation
Tool Flow
Dr. Michael Hübner
VHDL
Synthesis Compilation
P&R
Context
Parallelisation
Application
3 11.10.2012

4. Definitions
An adaptive system is an open system that is able to fit its changing
according to changes in its environment or in parts of the system itself
ADAPTATION
ARCHITECTURE SYSTEM
LEVEL LEVEL
DYNAMIC VOLTAGE AND DYNAMIC TASK
FREQUENCY SCALING MAPPING MIGRATION
ADAPT AS FAST IMPROVE OVERALL
AS POSSIBLE PERFORMANCE
Institut für Technik der Informationsverarbeitung (ITIV)
4 11.10.2012 Dr. Michael Hübner

5. Multiprocessor System-on-Chip Architecture
R R R R R
PE PE PE PE PE
PE MIPS
R R R R R
PE PE PE PE PE
PE µ-Blaze
R R R R R
PE PE PE PE PE
PE ARM
RAM PE openRISC
Router TASKN
NoC
PROCESSOR
RAM TASK2
FREQUENCY TASK1
SCALING
RTOS
NETWORK PROCESSING
UNIT (NPU)
Institut für Technik der Informationsverarbeitung (ITIV)
5 11.10.2012 Dr. Michael Hübner

6. Simplify - FW
Version 1.0 Version 2.0
Processors: OS support:
MIPS; Round-robin scheduler;
µ-Blaze; Semaphores;
ARM7; Mutexes;
openRISC; Multi-task;
Interconnect: Communication API for applications;
Bus; Web framework:
No OS Support; New design;
Mono task – 1 application per processor; Improved Performance;
Code optimization;
No communication API for applications;
Web framework:
Architecture Modeling;
Processing Element Configuration;
Application Description;
Application Compilation and Execution;
Execution Reports;
Automatic Generation of OVP* Platforms;
* OVP (Open Virtual Platform)
Institut für Technik der Informationsverarbeitung (ITIV)
6 11.10.2012 Dr. Michael Hübner

7. Simplify - FW
http://simplify.itiv.kit.edu/simplify/wordpress/pub/simplify-FW.swf
Institut für Technik der Informationsverarbeitung (ITIV)
7 11.10.2012 Dr. Michael Hübner

8. Experiments
OVPsim Performance for Different Applications
Institut für Technik der Informationsverarbeitung (ITIV)
8 11.10.2012 Dr. Michael Hübner

9. Experiments
Scalability of OVPsim Inside Simplify Framework
N CORES MIPS PER CORE SIM. TIME (s) SIM. INSTR.
4 210.60 4.62 3,892,315,516
8 107.40 9.07 7,792,631,032
16 53.60 18.14 15,585,262,071
32 27.00 36.04 31,170,524,129
64 13.50 72.08 62,341,048,257
Institut für Technik der Informationsverarbeitung (ITIV)
9 11.10.2012 Dr. Michael Hübner

10. Conclusions
Simplify - FW is an OVP front-end which enables:
Easy modeling of MPSoCs architectures;
Fast functional/behavioral simulation;
On-line design, simulation, and debug;
Off-line simulation and debug;
Embedded Operating System debugging;
Functional test of embedded applications;
Give it and try:
http://simplify.itiv.kit.edu
Institut für Technik der Informationsverarbeitung (ITIV)
10 11.10.2012 Dr. Michael Hübner

11. Thank you for your attention!
gabriel.almeida@kit.edu
Give it and try!
http://simplify.itiv.kit.edu
Institut für Technik der Informationsverarbeitung (ITIV)
11 11.10.2012 Dr. Michael Hübner