1. Operational Analytics on Informix:
Architecture and Performance evaluation
Jantz Tran Intel – Database Performance
Keshava Murthy IBM Informix Development
2. Agenda
• Operational analytics
– What is it? Requiremens & challenges.
• Operational analytics with Informix
– Complete lifecycle discussion.
• Intel® Technology & Roadmap
– Scaling on Xeon® E7 Platform
• Performance work and analysis for Informix on
Intel
3. • Operational analytics
– Focus on excellence in operations
– Operations of most organizations are complex & multi-
faceted
• Supply chain, production processes, people, partners, etc
• HR, Sales, IT, etc
• More than Efficiency, operational excellence
needs effective, smarter processes
• Customized experience, repeatable at scale
What is Operational analytics?
4. Challenges in Operational Excellence
• Respond quickly to shifts in reality
• React to competition quickly
• Continuously lower the cost
• IT Challenge:
– handle volume and response times a modern business
requires
– or use people to provide flexibility to respond to
developing situation
• False choice
– System should handle volume, velocity & be flexible
6. “Most discussions of decision making assume only
senior executives make decisions or that only
senior executives’ decisions mater.
This is a dangerous mistake”
-- Peter Drucker
7. • What to change?
• What to change to?
• How to cause the change?
9. Business Analytics
• Traditionally, business analytics is on customer
opportunity and risk management
• Quickly detect shifts in reality
• Make reaction part of the routine operations.
10. The Changing World of BI Analytics
• Advanced Analytics
– Improved analytic tools and techniques for statistical and predictive
analytics
– New tools for exploring and visualizing new varieties of data
– Operational intelligence with embedded BI services and BI
automation
• Data Management
– Analytic relational database systems that offer improved
price/performance and libraries of analytic functions
– In-memory computing for high performance
– Non-relational systems such as Hadoop for handling new types of
data
– Stream processing/CEP systems for analyzing in-motion data
15. • Data Warehouse query Performance without Perspiration
• Consistent query performance without tuning efforts.
• More questions, faster answers, better data driven decisions & business insights
• SKECHERS: Acceleration from 60x to 1400x – average acceleration of 450x
Motivation
16. Informix Database Server
Informix warehouse Accelerator
BI Applications
Step 1. Install, configure,
start Informix
Step 2. Install, configure,
start Accelerator
Step 3. Connect Studio to
Informix & add accelerator
Step 4. Design, validate,
Deploy Data mart
Step 5. Load data to
accelerator
Ready for Queries
IBM Smart Analytics
Studio
Step 1
Step 2
Step 3
Step 4
Step 5
Ready
Informix Ultimate Warehouse edition
17. 17
Informix Primary
Informix warehouse Accelerator
BI Applications
Step 1. Install, configure,
start Informix
Step 2. Install, configure,
start Accelerator
Step 3. Connect Studio to
Informix & add accelerator
Step 4. Design, validate,
Deploy Data mart from
Primary, SDS, HDR, RSS
Step 5. Add IWA to sqlhosts
Load data to
Accelerator from any node.
Ready for Queries
IBM Smart Analytics
Studio
Step 1
Step 3
Step 4
Step 5
Ready
Informix Warehouse Accelerator – 11.70.FC5. MACH11 SupportInformix Warehouse Accelerator – 11.70.FC5. MACH11 Support
Informix
SDS1
Informix
SDS2
Informix
HDR
Secondary
Informix
RSS
Step 2
18. Design DM by
workload analysis or
manually
Deployed datamart
Datamart
Deleted
Datamart in USE
Datamart Disabled
Partition based refresh
Trickle feed refresh
Deploy
Load
Drop
Disable
Enable Drop
Typically,
300 GB/hr
10 GB under 3 mins
Online operation
Stages & Options for data loading to IWA
19. Scaling in Westmere: Data Warehouse Setup.
• TPC-DS Schema;
web_sales
• Mart Data size: 1
terabytes
• web_sales, 4.1 billion
rows
– Fact with 34 partitions
• Dimensions: 13, non
partitioned.
4.1 billion
73,049 66
22
86,400
20
7,20015 million
66
30 million
1.9 million
1,800
360,000
3600
25. 25
INTEL/IWA: Breakthrough technologies for
performance
1
2
3
4
5
6
7 1
2
3
4
5
6
7
1. Large memory support
64-bit computing; System X with MAX5 supports up
to 6TB on a single SMP box; Up to 640GB on each
node of blade center. IWA: Compress large dataset
and keep it in memory; totally avoid IO.
7. Multi-core, multi-node environment
Nehalem has 8 cores and Westmere 10 cores. This trend is
expected to continue. IWA: Parallelize the scan, join, group
operations. Keep copies of dimensions to avoid cross-node
synchronization.
4. Virtualization Performance
Lower overhead: Core micro-architecture
enhancements, EPT, VPID, and End-to-End
HW assist IWA: Helps informix and IWA to
seemlessly run and perform in virtualized
environment.
5. Hyperthreading
2x logical processors; increases processor
throughput and overall performance of threaded
software. IWA: Does not exploit this since the
software is written to avoid pipeline flushing.
3. Frequency Partitioning
IWA: Enabler for the effective parallel access
of the compressed data for scanning.
Horizontal and Vertical Partition Elimination.
2. Large on-chip Cache
L1 cache 64KB per core, L2 cache is 256KB per
core and L3 cache is about 4-12 MB.
Additional Translation lookaside buffer (TLB).
IWA: New algorithms to avoid pipeline
flushing and cache hash tables in L2/L3 cache
6. Single Instruction Multiple Data
Specialized instructions for manipulating
128-bit data simultaneously. IWA:
Compresses the data into deep columnar
fashion optimized to exploit SIMD. Used in
parallel predicate evaluation in scans.
26. Tick-Tock Development Model:Tick-Tock Development Model:
Sustained Microprocessor LeadershipSustained Microprocessor Leadership
Intel®
Core™
Microarchitecture
Intel®
Core™
Microarchitecture
TOCK
New
Micro-
architecture
MeromMerom
65nm65nm
TICK
PenrynPenryn
New
Process
Technology
45nm45nm
Intel® Microarchitecture
Codename Nehalem
Intel® Microarchitecture
Codename Nehalem
TOCK
New
Micro-
architecture
NehalemNehalem
45nm45nm
TICK
WestmereWestmere
32nm32nm
New
Process
Technology
Intel® Microarchitecture
Codename Sandy
Bridge
Intel® Microarchitecture
Codename Sandy
Bridge
TOCK
SandySandy
BridgeBridge32nm32nm
New
Micro-
architecture
TICK
IvyIvy
BridgeBridge22nm22nm
New
Process
Technology
Intel® Microarchitecture
Codename Haswell
Intel® Microarchitecture
Codename Haswell
TOCK
HaswellHaswell
22nm22nm
New
Micro-
architecture
TICK
FutureFuture
14nm14nm
New
Process
Technology
27. Mainstream
Enterprise
Best combination of
performance, power efficiency,
and cost
High Performance Computing &
Workstations
Bandwidth-optimized for high
performance analytics & visualization
Small
Business
Economical and more
dependable vs. desktop
Increasing capability
Cloud Computing
Efficient, secure, and open platforms for
Internet datacenters and IAAS
Entry Servers and
Workstations
More features and performance than
traditional desktop systems
Enterprise Server
Versatility for infrastructure apps (up to 4S)
Scalable
Enterprise
Top-of-the-line performance,
scalability, and reliability
Cloud Computing
Highest virtualization density and advanced
reliability for private cloud
Mission Critical
Performance and reliability for the most
business critical workloads with outstanding
economics
High Performance Computing
Greater scaling and memory capacity
27
Intel®
Xeon®
Processor Family for Business
28. Intel®
Xeon®
Processor
E7-8800/4800/2800 Product Families
Building on Xeon®
7500 Leadership Capabilities
• More performance within same
max CPU TDP as Xeon 7500
• Lower partial active & idle power
via Intel Intelligent Power
Technology2
• Support for Low Voltage-DIMMs3
• Reduced power memory buffers4
More Efficient
• Supports 32GB DDR3 DIMMs (2TB per 4-
socket system)1
More Expandable
More Security & RAS
• 10 cores / 20 threads
• 30MB of last level cache
More Performance
E7-4800 E7-4800
E7-4800 E7-4800
SECURITY
• Intel®
Advanced Encryption
Standard-New Instructions
• Intel®
Trusted Execution
Technology (TXT)
RELIABILITY, AVAILABILITY, SERVICEABILITY
• Enhanced DRAM Double Device Data Correction
• Fine Grained Memory Mirroring
1. Up to 64 slots per standard 4 socket system x 32GB/DIMM = 2TB
2. Uses similar core and package C6 power states enabled on Intel Xeon 5500/5600 series processors. Requires OS support.
3. Savings dependent on workload and configuration.
4. Memory buffer power savings of up to 1.3W active and 3W idle per buffer per Intel estimates. Slightly more savings when used with LV DIMMs
Delivers more Performance, Expandability and RASDelivers more Performance, Expandability and RAS
while improving Energy Efficiencywhile improving Energy Efficiency
Delivers more Performance, Expandability and RASDelivers more Performance, Expandability and RAS
while improving Energy Efficiencywhile improving Energy Efficiency
29. 29
Intel® Xeon® 7500/E7 8 Socket Configuration
4+4 (8S)
Up to 10 cores and 2.4 Ghz
per CPU
Support 8 socket mode by
combining 2 systems via
external QPI links
Memory Configuration
4TB in 8 socket server
6TB in 8 socket + MAX5
Continued 1066MHz
support
IBM® System
x3850 X5
30. 30
• Machine Check Architecture (MCA)
recovery (MCA-R)
• Machine Check Architecture (MCA)
recovery (MCA-R)
Memory
• Inter-socket Memory Mirroring
• Intel®
Scalable Memory
Interconnect (Intel® SMI) Lane
Failover
• Intel®
SMI Clock Fail Over
• Intel®
SMI Packet Retry
• Memory Address Parity
• Failed DIMM Isolation
• Memory Board Hot Add/Remove
• Dynamic Memory Migration*
• OS Memory On-lining *
• Recovery from Single DRAM
Device Failure (SDDC) plus
random bit error
• Memory Thermal Throttling
• Demand and Patrol scrubbing
• Fail Over from Single DRAM
Device Failure (SDDC)
• Enhanced DRAM Double Device
Data Correction
• Fine Grained Memory Mirroring
• Memory DIMM and Rank Sparing
• Intra-socket Memory Mirroring
• Mirrored Memory Board Hot
Add/Remove
• Inter-socket Memory Mirroring
• Intel®
Scalable Memory
Interconnect (Intel® SMI) Lane
Failover
• Intel®
SMI Clock Fail Over
• Intel®
SMI Packet Retry
• Memory Address Parity
• Failed DIMM Isolation
• Memory Board Hot Add/Remove
• Dynamic Memory Migration*
• OS Memory On-lining *
• Recovery from Single DRAM
Device Failure (SDDC) plus
random bit error
• Memory Thermal Throttling
• Demand and Patrol scrubbing
• Fail Over from Single DRAM
Device Failure (SDDC)
• Enhanced DRAM Double Device
Data Correction
• Fine Grained Memory Mirroring
• Memory DIMM and Rank Sparing
• Intra-socket Memory Mirroring
• Mirrored Memory Board Hot
Add/Remove
Advanced Reliability Starts With Silicon
Intel® Xeon® processor E7 family RAS Capabilities
I/O Hub
• Physical IOH Hot Add
• OS IOH On-lining*
• PCI-E Hot Plug
• Physical IOH Hot Add
• OS IOH On-lining*
• PCI-E Hot Plug
CPU/Socket
• Machine Check Architecture
(MCA) recovery (MCA-R)
• Corrected Machine Check
Interrupt (CMCI)
• Corrupt Data Containment Mode
• Viral Mode
• OS Assisted Processor Socket
Migration*
• OS CPU on-lining *
• CPU Board Hot Add at QPI
• Electronically Isolated (Static)
Partitioning
• Single Core Disable for Fault
Resilient Boot
• Machine Check Architecture
(MCA) recovery (MCA-R)
• Corrected Machine Check
Interrupt (CMCI)
• Corrupt Data Containment Mode
• Viral Mode
• OS Assisted Processor Socket
Migration*
• OS CPU on-lining *
• CPU Board Hot Add at QPI
• Electronically Isolated (Static)
Partitioning
• Single Core Disable for Fault
Resilient Boot
Intel®
QuickPath Interconnect
• Intel QPI Packet Retry
• Intel QPI Protocol Protection via
CRC (8bit or 16bit rolling)
• QPI Clock Fail Over
• QPI Self-Healing
• Intel QPI Packet Retry
• Intel QPI Protocol Protection via
CRC (8bit or 16bit rolling)
• QPI Clock Fail Over
• QPI Self-Healing
Advanced reliability features work to maintain data integrityAdvanced reliability features work to maintain data integrityAdvanced reliability features work to maintain data integrityAdvanced reliability features work to maintain data integrity
31. 2012 2013/Future
Roadmap
2S Efficient
Performance
Intel® Xeon® processor E5-2600 product family
2 sockets, up to 8C/16T per sockets, up to 20MB shared cache, “Sandy Bridge” microarchitecture
Future Intel®
Micro-
architecture
codename
Ivy Bridge
4S Efficient
Performance
Intel® Xeon® processor E5-4600 product family
4 sockets, up to 8C/16T per sockets, up to 20MB shared cache, “Sandy Bridge” microarchitecture
31
Expandable
Intel®
Xeon®
processor E7-8800/4800/2800
product families
2-8 sockets, up to 10C/20T per socket, up to 30MB shared cache, “Westmere” microarchitecture
34. “Real-world” basis for TPC-E
Network
Network
Database
Services
Application
And
Business Logic
Services
Presentation
Services
Workstation
Laptop
Hand-held
Cell phone
Examples of
User Interfaces
Stock Market
Exchange
Example of
External Business
Modeled Business
Legend
Customer
Sponsor Provided
Stock Market
Network
Network
Database
Services
Application
And
Business Logic
Services
Presentation
Services
Workstation
Laptop
Hand-held
Cell phone
Examples of
User Interfaces
Stock Market
Exchange
Example of
External Business
Modeled Business
Network
Network
Database
Services
Application
And
Business Logic
Services
Presentation
Services
Workstation
Laptop
Hand-held
Cell phone
Examples of
User Interfaces
Stock Market
Exchange
Example of
External Business
Modeled Business
Legend
Customer
Sponsor Provided
Stock Market
LegendLegend
Customer
Sponsor Provided
Stock Market
Customer
Sponsor Provided
Stock Market
37. OLAP queries
SELECT T0.c0 AS ct_dtskey,
T0.c1 AS ct_amt,
T0.c1 AS c3,
T0.c2 AS c4,
Min(T0.c3)
OVER (
PARTITION BY T0.c0) AS ct_amt2
FROM (SELECT DISTINCT cash_transaction.ct_dts AS C0,
Sum(cash_transaction.ct_amt)
OVER (
PARTITION BY cash_transaction.ct_dts) AS C1,
COUNT(cash_transaction.ct_amt)
OVER (
PARTITION BY cash_transaction.ct_dts) AS C2,
Stddev(cash_transaction.ct_amt)
OVER (
PARTITION BY cash_transaction.ct_dts) AS C3
FROM cash_transaction cash_transaction
WHERE DATE(ct_dts) BETWEEN DATE('2005-01-04') AND DATE('2005-01-05')
AND ct_name LIKE 'Stop-Loss%') T0;
38. Intel® Xeon® E7-8870:
• Hardware setup
– Intel® Xeon® E7-8870 processor – 4 socket (40C/80T) and
8 socket (80C/160T) configurations
• 2.4 GHz, 30MB last level shared cache
– 10 TB storage
– 2 TB RAM
• Software Setup
– Informix and Informix Warehouse Accelerator: v11.70.FC7
and Informix 12.10
– Both Informix and IWA on the same machine.
39. Data Setup
• Data Loading
– 300 GB of starting data set
– Data size is about nnn GB including indexes.
• TPCE is heavily indexed for performance
– As we run the OLTP workload, the data size increases.
40. IDS 12.10 on Intel Westmere: Multi user scaling
0
500
1000
1500
2000
2500
3000
3500
4000
4500
1 2 4 8 16 32 50
Concurrent User Count
QueryTime(seconds)
4s-NoHT 4s+HT 8sNoHT 8s+HT
41. IDS 12.10 on Intel Westmere: Multi user scaling
0
500
1000
1500
2000
2500
3000
3500
4000
4500
1 2 4 8 16 32 50
Concurrent User Count
NumberofQueriesperhour
4sNoHT 4s+HT 8sNoHT 8s+HT
47. IBM Informix* Database
Scale-up Optimized for Intel Architecture
Baseline
Intel Xeon
processor E7-4870
Informix* v11.7
Up to 45%
Intel®
Xeon®
processor E7-8870
Informix* v11.7
Informix* v11.7
1.45x
Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as
SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those
factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated
purchases, including the performance of that product when combined with other products.
*Other brands and names are the property of their respective owners
48. IBM Informix* Database
Scale-up Optimized for Intel Architecture
Informix* v12.1
1.6x
Up to 60%
Intel®
Xeon®
processor E7-8870
Informix* v12.1
Intel Xeon
processor E7-4870
Informix* v12.1
Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as
SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those
factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated
purchases, including the performance of that product when combined with other products.
*Other brands and names are the property of their respective owners
49. IBM Informix* Database
Scale-up Optimized for Intel Architecture
Baseline
Intel Xeon
processor E7-4870
Informix* v11.7
Up to 550%
Intel Xeon
processor E7-8870
Informix* v12.1
Intel®
Xeon®
processor E7-8870
Informix* v11.7
Up to 540%
Intel Xeon
processor E7-4870
Informix* v12.1
Informix* v11.7 Informix* v12.1
Up to 5.4x
Up to 5.5x
Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as
SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those
factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated
purchases, including the performance of that product when combined with other products.
*Other brands and names are the property of their respective owners
52. Informix Publications
Bulletin of the Technical Committee on Data Engineering: March 2012
Vol. 35 No. 1
Real Time Business Intelligence. September 2, 2011 - Seattle, United States
IBM Data management Magazine: Supercharging
the
data wharehouse while keeping the costs down.
2012 Bloor Report: IBM Informix in hybrid workload
environments
2012 Ovum Analyst report: Informix Accelerates Analytic Integration
into OLTP
DBTA Article: Empowering Business Analysts with Faster Insights
http://youtu.be/xJd8M-fbMI0
53. Jantz Tran Intel jantz.c.tran@intel.com
Keshava Murthy IBM rkeshav@us.ibm.com
55. Intel - Legal Disclaimers Performance
• Performance tests and ratings are measured using specific computer systems and/or components and reflect the
approximate performance of Intel products as measured by those tests. Any difference in system hardware or
software design or configuration may affect actual performance. Buyers should consult other sources of information
to evaluate the performance of systems or components they are considering purchasing. For more information on
performance tests and on the performance of Intel products, Go to:
http://www.intel.com/performance/resources/benchmark_limitations.htm.
• Intel does not control or audit the design or implementation of third party benchmarks or Web sites referenced in this
document. Intel encourages all of its customers to visit the referenced Web sites or others where similar
performance benchmarks are reported and confirm whether the referenced benchmarks are accurate and reflect
performance of systems available for purchase.
• Relative performance is calculated by assigning a baseline value of 1.0 to one benchmark result, and then dividing
the actual benchmark result for the baseline platform into each of the specific benchmark results of each of the other
platforms, and assigning them a relative performance number that correlates with the performance improvements
reported.
• INFORMATION IN THIS DOCUMENT IS PROVIDED “AS IS”. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS
DOCUMENT. INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR
IMPLIED WARRANTY, RELATING TO THIS INFORMATION INCLUDING LIABILITY OR WARRANTIES RELATING
TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT,
COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
• Performance tests and ratings are measured using specific computer systems and/or components and reflect the
approximate performance of Intel products as measured by those tests. Any difference in system hardware or
software design or configuration may affect actual performance. Buyers should consult other sources of information
to evaluate the performance of systems or components they are considering purchasing. For more information on
performance tests and on the performance of Intel products, reference www.intel.com/software/products.
56. IBM’s statements regarding its plans, directions, and intent are subject to change or
withdrawal without notice at IBM’s sole discretion.
Information regarding potential future products is intended to outline our general
product direction and it should not be relied on in making a purchasing decision.
The information mentioned regarding potential future products is not a commitment,
promise, or legal obligation to deliver any material, code or functionality. Information
about potential future products may not be incorporated into any contract. The
development, release, and timing of any future features or functionality described for
our products remains at our sole discretion.
Please Note:
Performance is based on measurements and projections using standard IBM
benchmarks in a controlled environment. The actual throughput or performance that
any user will experience will vary depending upon many factors, including
considerations such as the amount of multiprogramming in the user's job stream, the
I/O configuration, the storage configuration, and the workload processed. Therefore,
no assurance can be given that an individual user will achieve results similar to those
stated here.
57. 04/23/13 57
Availability. References in this presentation to IBM products, programs, or services
do not imply that they will be available in all countries in which IBM operates.
The workshops, sessions and materials have been prepared by IBM or the session
speakers and reflect their own views. They are provided for informational purposes
only, and are neither intended to, nor shall have the effect of being, legal or other
guidance or advice to any participant. While efforts were made to verify the
completeness and accuracy of the information contained in this presentation, it is
provided AS-IS without warranty of any kind, express or implied. IBM shall not be
responsible for any damages arising out of the use of, or otherwise related to, this
presentation or any other materials. Nothing contained in this presentation is intended
to, nor shall have the effect of, creating any warranties or representations from IBM or
its suppliers or licensors, or altering the terms and conditions of the applicable license
agreement governing the use of IBM software.
Acknowledgements and
Disclaimers:
59. Do you have a great presentation topic that
you’d like to share?
•We’re looking for dynamic, innovative and thought-provoking
sessions
•Whether your proposal aims at sharpening skills, sharing best
practices, or presenting new ideas and groundbreaking concepts, all
proposals are welcome
•Visit the conference website to learn more
The Call for Speakers closes April 30! Hurry to submit your session!
60. Sign Up! Informix Usability Sandbox!
Help shape the future of Informix.
Influence Informix usability and functionality.
Share your experiences and feedback.
Usability Sandbox sessions in Santa Fe 3
April 22-24th, between 9am and 5pm
Sign-up at the IBM Information Table or find Justin McDavid.
*The first 20 participants will get a free IBM t-shirt!
61. Informix RFE (Request For Enhancement) Process
As Simple as 1, 2, 3
1. Submit from the IM RFE site – simply complete the RFE form and click Submit when ready
Many fields will be auto-filled as a convenience for you
Note that fields with the ‘key’ field e.g. Company Name and Business Justification will be
kept private for confidentiality purposes
Provide as much detail as possible in the Description, Use Case, and Business
Justification fields to help the IBM team understand your requirement
2. View via Watchlist
Lists all the RFEs that you’re interested in
Simple to add an RFE via Search
3. Subscribe to email notifications
Specify ‘Opting in for email notifications’
Notified when any change occurs to any RFE on your watch list
YouTube: http://www.ibm.com/developerworks/rfe/execute?use_case=tutorials#tut2YouTube: http://www.ibm.com/developerworks/rfe/execute?use_case=tutorials#tut2
Give it a shot! http://www.ibm.com/developerworks/rfe/
Notas del editor
Slide Purpose: Show full systems and use as chance to highlight the Energy Efficiency enhancements in Intel® Xeon® processor E7 family The Xeon E7 family is designed and built upon Intel’s 32nm Nehalem micro-architecture, which allows us to deliver 25% more cores and cache providing more performance within same maximum TDP as the Xeon 7500 series. It also supports 16 DIMMs per socket, which equates to 2TB of memory for the 4-socket E7-4800 product family – allowing for increased expandability. The Xeon E7 family features energy efficiency technologies including the Intel® Intelligent Power Technology (IPT) which is a shared technology from Intel’s Efficient Performance product line. IPT reduces partial active and idle power in the CPU and memory. Xeon E7 also supports lower power memory as well as memory buffers which support both standard and LV-DIMMs. The Xeon processor E7 family not only includes all of the reliability, availability and serviceability (RAS) features of the previous generation such as machine check architecture-recovery but also includes additional memory error correction features such as Enhanced DRAM Double Device Data Correction (DDDC) and Fine Grained Memory Mirroring. DDDC is an improved memory RAS feature which allows for a 2nd memory error & replacement of DIMMs w/o crashing . Fine Grained Memory Mirroring provides protection against uncorrectable memory errors that would otherwise result in a platform failure and allows for more flexible memory mirroring configurations (allows memory mirroring of just a critical portion of memory, leaving the rest of memory un-mirrored). This enables more cost-effective mirroring by mirroring just the critical portion of memory versus the entire memory space. New security features such as Intel® Advanced Encryption Standard New Instructions (AES-NI) and Intel® Trusted Execution Technology (TXT) are also supported. These advanced security features within the Xeon processor E7 family work to maintain data integrity, accelerate encrypted transactions, and maximize business continuity.
Intel Confidential
The advantage of working together is multiplied when both hardware and software is improved. On 11.7, TPCE schema. 268 GB.database Operational analytics querie: hand written report queries and cognos generated queries for reports & widgets Ran with 1, 2, 4, 8, 16, 32 and 50 user configuration. All the queries ran on Informix and IWA.
The advantage of working together is multiplied when both hardware and software is improved. On 11.7, TPCE schema. 268 GB.database Operational analytics querie: hand written report queries and cognos generated queries for reports & widgets Ran with 1, 2, 4, 8, 16, 32, and 50 user configuration. All the queries ran on Informix and IWA. Used more complex queries (like OLAP window functions) since we supppot it on IWA for 12.10.
The advantage of working together is multiplied when both hardware and software is improved. On 11.7, TPCE schema. 268 GB.database Operational analytics queries: hand written report queries and cognos generated queries for reports & widgets that can be run on both Informix 11.7 and 12.1. Some of the report run just on 11.7 Informix only and will run on Informix + IWA on 12.10. There are additional hash join and other performance improvement. Hence, in a multi-user environment, the CPU utilization on 12.1 is better resuling in > 500% improvement. That are supported by both 11.70 and 12.1. Ran with 1, 2, 4, 8, 16, 32, and 50 user configuration. All the queries ran on Informix and IWA.
The slide shows both scalability and performance of OLTP and OLAP of Informix (with IWA) in mixed workload environment. --- In this case, we ran TPCE (non-audited) workload (OLTP) concurrent to OLAP workload mentioned in previous slides on Informix 12.10. Observations on mixed workload: OLTP workload performance decreased minimally as we increased the OLAP performance (from 0 OLAP user to 1,2,3,8,16 and 32 OLAP user) OLAP performance scaled well when running by itself or mixed workload environment and performance.
YouTube tutorial for RFE submit, view, and send out notification http://www.ibm.com/developerworks/rfe/execute?use_case=tutorials#tut2 Note: Transcript for this video http://www.ibm.com/developerworks/podcasts/demos/special-RFE-process-2/cm-int-special-RFE-process-2.html What is Different from the Current Requirements System? Requirements submitter interacts directly with Product Management No need to involve Customer Support or Sales rep Requirements go to back-end system already being used by Product Management & Development No separate tracking system that is not “part of the process” Improved ability to monitor and manage requirements Watch lists, “me too”, groups, voting Crisply defined Service Level Agreements Compliance to SLAs will be monitored monthly by Informix team Consistent requirements system for IBM Software Group products