Personal Information
Organización/Lugar de trabajo
Hyderabad Area, India India
Ocupación
Senior Design Engineer
Sector
Telecom / Mobile
Acerca de
• Designed and implemented support for dynamic power and frequency variation support in the Crest Factor Reduction (PC-CFR) Radio core.
• Productization work involving release formalities, C model development and test framework development for multiple PC-CFR releases
• Developed FPGA IP for the I.4 OTN encoder. Designed, synthesized and timing optimized the RS and BCH encoders for the 10Gbps standard. A novel architecture was used for the RS encoder so that it could meet the design requirements. A patent has been applied for the same. The design is now being used successfully by multiple customers. This, along with the decoder counterpart was also productized in Vivado 2013.1 re...
Documentos
(5)Personal Information
Organización/Lugar de trabajo
Hyderabad Area, India India
Ocupación
Senior Design Engineer
Sector
Telecom / Mobile
Acerca de
• Designed and implemented support for dynamic power and frequency variation support in the Crest Factor Reduction (PC-CFR) Radio core.
• Productization work involving release formalities, C model development and test framework development for multiple PC-CFR releases
• Developed FPGA IP for the I.4 OTN encoder. Designed, synthesized and timing optimized the RS and BCH encoders for the 10Gbps standard. A novel architecture was used for the RS encoder so that it could meet the design requirements. A patent has been applied for the same. The design is now being used successfully by multiple customers. This, along with the decoder counterpart was also productized in Vivado 2013.1 re...