Personal Information
Organización/Lugar de trabajo
Bengaluru Area, India India
Ocupación
Staff Engineer
Sector
Electronics / Computer Hardware
Acerca de
--Gone through training on scan synthesis flow, scan implementation, scan rule violation report generations and corresponding fixes for all violation.
--Gone through coverage improvement by different technique.
--Lockup latch implementation for different clock domain.
--Testpoint analysis implementation and flow.
- Knowledge in fault modeling Stuck-at, Transition, Path Delay, IDDQ, and other advanced DFT models.
- Knowledge in JTAG, MBIST, Scan Insertion, ATPG, Fault Simulation and at-speed testing.
- Experience with industry ATPG tools Synopsys Tetramax, Cadence Encounter Test and Mentor ...
Etiquetas
dft
scan design
scan pattern generation
testing
coverage
systems
spyglassdft
rtl
extension los
atspeed
atpg
Ver más
Presentaciones
(5)Personal Information
Organización/Lugar de trabajo
Bengaluru Area, India India
Ocupación
Staff Engineer
Sector
Electronics / Computer Hardware
Acerca de
--Gone through training on scan synthesis flow, scan implementation, scan rule violation report generations and corresponding fixes for all violation.
--Gone through coverage improvement by different technique.
--Lockup latch implementation for different clock domain.
--Testpoint analysis implementation and flow.
- Knowledge in fault modeling Stuck-at, Transition, Path Delay, IDDQ, and other advanced DFT models.
- Knowledge in JTAG, MBIST, Scan Insertion, ATPG, Fault Simulation and at-speed testing.
- Experience with industry ATPG tools Synopsys Tetramax, Cadence Encounter Test and Mentor ...
Etiquetas
dft
scan design
scan pattern generation
testing
coverage
systems
spyglassdft
rtl
extension los
atspeed
atpg
Ver más