1. PROCESS AND DEVICE
SIMULATION
OF
NARROW WIDTH
EFFECT
IN
SILVACO
SUBMITTED BY:
Prashant singh

2. OUTLINE
 Introduction
 Process Simulation
 Device Simulation
 Review :
Normal Narrow Width Effect
Reverse Narrow Width Effect
 Simulation Results
 References

3. INTRODUCTION
 Process simulation of field oxide bird’s beak in ATHENA.
 Interface of the 2D structure from ATHENA to DEVEDIT3D.
 Structure editing to create 3D MOSFET.
 Interface of the 3D structure from DEVEDIT3D to ATLAS.
 Simulation of the Id / Vgs characterstics in ATLAS.
 Extraction of Vt for change in value of width.

4. PROCESS SIMULATION
 MOSFET Using LOCOS isolation technique.
 Default models used in ATHENA.

5. DEVICE SIMULATION
 MODELS Used in ATLAS
- SRH Recombination
- CVT Mobility model
- One carrier model

6. NARROW WIDTH EFFECT
 As we are shrinking down device size,
Narrow Width Effect comes into existence in device isolation
technique.
LOCOS : Normal Narrow Width Effect.
TRENCH ISOLATION TECHNIQUE : Reverse Narrow
Width Effect.

7. NORMAL NARROW WIDTH MODEL

8. REVERSE NARROW WIDTH EFFECT

9. • Athena (Silvaco) used to plot for several values
of width.
(Continued from next slide)
NARROW WIDTH EFFECT PLOTS

10. Width = 0.1um
Vth = 0.420291V

12. WIDTH = 0.3um
Vth = 0.420231 V

14. WIDTH = 0.55um
Vth = 0.367652 V

16. WIDTH = 0.8um
Vth = 0.391844V

18. WIDTH = 1.1um
Vth = 0.391484 V

20. PLOT OF Vth versus WIDTH
Vds = 0.1V
Vgs = 0.1 to 1.5 V
(RAMP Vgs With step
size 0.1V)

21. REFERENCES
 TCAD Reference Manual.
 SILVACO simulated examples.
 MOSFET modeling and BSIM3 user’s guide by Yuhan
Cheng and chenming hu.

22. THANK YOU