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Sanjivani Rural Education Society’s
Sanjivani College of Engineering, Kopargaon-423 603
(An Autonomous Institute, Affiliated to Savitribai Phule Pune University, Pune)
NACC ‘A’ Grade Accredited, ISO 9001:2015 Certified
Department of Computer Engineering
(NBA Accredited)
Dr. S. N. Gunjal
Assistant Professor
E-mail : gunjasanjay@sanjivani.org.in
Contact No: 91301 91301 Ext :145, 9503916876
Course- System Programming and Operating System
(CO312)
Machine Structure
Dr. S.N Gunjal
DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 2
● GENERAL MACHINE STRUCTURE :
All the conventional modern computers are based upon the concept of stored program computer,
the model that was proposed by John von Neumann.
Machine
Structure:
DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 3
Machine Structure:
DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 4
Instruction interpreter: A group of electronic circuits performs the intent of instruction of
fetched frommemory.
Location counter: LC otherwise called as program counter PC or instruction counter IC, isa
hardware memory device which denotes the location of thecurrent instructionbeing executed.
Instruction register:A copy of thecontent of the LC isstored in IR.
Working register: are the memory devices that serve as “scratch pad” for the instruction
interpreter.
General register:are used by programmers as storage locations and for specialfunctions.
Machine
Structure:
DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 5
Memory address register (MAR): contains the address of the memory locationthatis to read
from or stored into.
Memory buffer register (MBR): contain a copy of the content of the memorylocation whose
address is stored in MAR. The primary interface between thememoryand theCPU isthrough
memory buffer register.
Memory controller: is a hardware device whose work is to transfer the content of the MBR to the
core memory location whose address is stored in MAR.
I/O channels: may be thought of as separate computers which interprets special instructions for
inputting and outputting information from the memory.
Machine
Structure
DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 6
Command
ADD 2,176.
This instruction has three parts
⮚first the opcode i.e. ADD,
⮚second is the number of the register that contain the first operator,
⮚ third is the memory location address that contain the second operand.
Machine
Structure
⮚At first, the address from the IC is copied to the
MAR.
⮚Then Read instruction from memory.
⮚The instruction is then transferred to the IR.
⮚Then the operand of the instruction is checked and
the corresponding branch is taken, here ADD branch
is chosen.
⮚Then the memory location of the second operand is
placed in the MAR.
⮚Then Read the data from memory.
⮚Now the first operand is placed in the WR.
⮚Finally the sum of WR and MBR is calculated and
the stored in WR.
⮚The content of WR is stored to the register that
contained first operand.
⮚And then IC is incremented to point to the next
instruction..
15/06/20 DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon
Text books & Reference Books(R) :
Text Books(T):
⮚John Donovan, “System Programming”, McGraw Hill, ISBN 978-0--07-460482-3.
⮚Dhamdhere D., "Systems Programming and Operating Systems", McGraw Hill, ISBN 0 - 07 -
463579 – 4
⮚Silberschatz, Galvin, Gagne, "Operating System Principles", 9th Edition, Wiley, ISBN 978-1-118-
06333-0
Reference Books(R):
⮚Alfred V.Aho,Monica S.Lam,Ravi Sethi, Jeffrey D. Ullman, “Compilers-Principles,Techniques
and Tools”, Pearson,ISBN:978-81-317-2101-8
⮚John R. Levine, Tony Mason, Doug Brown, “Lex and Yacc”,O’Reilly & Associates,Inc,ISBN:1-
DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 9
Thank You

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Unit01_Session_03.pptx

  • 1. Sanjivani Rural Education Society’s Sanjivani College of Engineering, Kopargaon-423 603 (An Autonomous Institute, Affiliated to Savitribai Phule Pune University, Pune) NACC ‘A’ Grade Accredited, ISO 9001:2015 Certified Department of Computer Engineering (NBA Accredited) Dr. S. N. Gunjal Assistant Professor E-mail : gunjasanjay@sanjivani.org.in Contact No: 91301 91301 Ext :145, 9503916876 Course- System Programming and Operating System (CO312) Machine Structure Dr. S.N Gunjal
  • 2. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 2 ● GENERAL MACHINE STRUCTURE : All the conventional modern computers are based upon the concept of stored program computer, the model that was proposed by John von Neumann. Machine Structure:
  • 3. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 3 Machine Structure:
  • 4. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 4 Instruction interpreter: A group of electronic circuits performs the intent of instruction of fetched frommemory. Location counter: LC otherwise called as program counter PC or instruction counter IC, isa hardware memory device which denotes the location of thecurrent instructionbeing executed. Instruction register:A copy of thecontent of the LC isstored in IR. Working register: are the memory devices that serve as “scratch pad” for the instruction interpreter. General register:are used by programmers as storage locations and for specialfunctions. Machine Structure:
  • 5. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 5 Memory address register (MAR): contains the address of the memory locationthatis to read from or stored into. Memory buffer register (MBR): contain a copy of the content of the memorylocation whose address is stored in MAR. The primary interface between thememoryand theCPU isthrough memory buffer register. Memory controller: is a hardware device whose work is to transfer the content of the MBR to the core memory location whose address is stored in MAR. I/O channels: may be thought of as separate computers which interprets special instructions for inputting and outputting information from the memory. Machine Structure
  • 6. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 6 Command ADD 2,176. This instruction has three parts ⮚first the opcode i.e. ADD, ⮚second is the number of the register that contain the first operator, ⮚ third is the memory location address that contain the second operand. Machine Structure
  • 7. ⮚At first, the address from the IC is copied to the MAR. ⮚Then Read instruction from memory. ⮚The instruction is then transferred to the IR. ⮚Then the operand of the instruction is checked and the corresponding branch is taken, here ADD branch is chosen. ⮚Then the memory location of the second operand is placed in the MAR. ⮚Then Read the data from memory. ⮚Now the first operand is placed in the WR. ⮚Finally the sum of WR and MBR is calculated and the stored in WR. ⮚The content of WR is stored to the register that contained first operand. ⮚And then IC is incremented to point to the next instruction..
  • 8. 15/06/20 DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon Text books & Reference Books(R) : Text Books(T): ⮚John Donovan, “System Programming”, McGraw Hill, ISBN 978-0--07-460482-3. ⮚Dhamdhere D., "Systems Programming and Operating Systems", McGraw Hill, ISBN 0 - 07 - 463579 – 4 ⮚Silberschatz, Galvin, Gagne, "Operating System Principles", 9th Edition, Wiley, ISBN 978-1-118- 06333-0 Reference Books(R): ⮚Alfred V.Aho,Monica S.Lam,Ravi Sethi, Jeffrey D. Ullman, “Compilers-Principles,Techniques and Tools”, Pearson,ISBN:978-81-317-2101-8 ⮚John R. Levine, Tony Mason, Doug Brown, “Lex and Yacc”,O’Reilly & Associates,Inc,ISBN:1-
  • 9. DEPARTMENT OF COMPUTER ENGINEERING, Sanjivani COE, Kopargaon 9 Thank You