The document discusses memory reference instructions in a processor. It explains that bits 12-14 in the instruction register determine the memory reference instruction type, which can be AND to AC, ADD to AC, LDA, STA, BUN, BSA, or ISZ. It then describes the operation of each instruction type, including which decoder line is activated and the timing signals used to access memory and update registers.

1. MEMORY REFERNCE INSTRUCTIONS PRESENTED BY: SURBHI

3. AND TO AC D 0 T 4 : DR  M[AR] D 0 T 5 : AC  AC DR, SC  0 ADD TO AC D 1 T 4 : DR  M[AR] D 1 T 5 : AC  AC+ DR, E  COUT, SC  0

4. LDA : LOAD TO AC D 2 T 4 : DR  M[AR] D 2 T 5 : AC  DR, SC  0 STA : STORE AC D 3 T 4 : M[AR]  AC, SC  0

5. BUN : BRANCH UNCONDITIONALLY D 4 T 4 : PC  AR, SC  0 BSA: BRANCH AND SAVE RETURN ADDRESS D 5 T 4 : M[AR]  PC, AR  AR+ 1 D 5 T 5 : PC  AR, SC  0

6. 20 PC=21 AR=135 136 20 21 135 PC=136 (b) memory and pc after execution (a) Memory ,PC AND AR AT TIME T4 MEMORY MEMORY Example of BSA 0 BSA 135 Next instruction Subroutine 1 BUN 135 0 BSA 135 Next instruction Subroutine 1 BUN 135