Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. Finally, I will look at what Linux-capable "hard" RISC-V SoC's currently exist, and what is on the horizon for 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA.
Google Slides link https://tinyurl.com/y6j8lfyz
RISC-V on Edge: Porting EVE and Alpine Linux to RISC-VScyllaDB
This document discusses porting the Alpine Linux distribution and EVE operating system to RISC-V processors. It provides an overview of RISC-V and describes how Alpine Linux and EVE-OS are well-suited for edge computing workloads due to their small footprint and use of containers. The document then outlines the steps taken to port Alpine Linux and its packages to RISC-V, including getting key packages like libunwind to build and working with the Alpine community. It concludes by encouraging more development of software for the emerging RISC-V server platforms.
The document discusses the architecture of the Linux kernel. It describes the user space and kernel space components. In user space are the user applications, glibc library, and each process's virtual address space. In kernel space are the system call interface, architecture-independent kernel code, and architecture-dependent code. It then covers several kernel subsystems like process management, memory management, virtual file system, network stack, and device drivers.
LCU13: An Introduction to ARM Trusted FirmwareLinaro
Resource: LCU13
Name: An Introduction to ARM Trusted Firmware
Date: 28-10-2013
Speaker: Andrew Thoelke
Video: http://www.youtube.com/watch?v=q32BEMMxmfw
This introduces the linaro OP-TEE project in the context of the Automotive Grade Linux distribution. This TEE is today considered as a potential key element to provides some security enforcement in the scope of Software OTA for the AGL distribution.
This brief slides set was presented during AGL Face to Face Technical Meeting 25 – 27 May, Vannes, France
The document discusses Linux video drivers and frameworks. It describes the original frame buffer and console interfaces. It then summarizes the Video For Linux v2 (v4l2) framework, which defines structures like the "Video Device" and mechanisms for video buffer and control management. The v4l2 framework aims to provide a complete and integrated solution for working with video and audio devices.
LAS16-402: ARM Trusted Firmware – from Enterprise to EmbeddedLinaro
LAS16-402: ARM Trusted Firmware – from Enterprise to Embedded
Speakers:
Date: September 29, 2016
★ Session Description ★
ARM Trusted Firmware has established itself as a key part of the ARMv8-A software stack. Broadening its applicability across all segments, from embedded to enterprise, is challenging. This session discusses the latest developments, including extension into the 32-bit space.
★ Resources ★
Etherpad: pad.linaro.org/p/las16-402
Presentations & Videos: http://connect.linaro.org/resource/las16/las16-402/
★ Event Details ★
Linaro Connect Las Vegas 2016 – #LAS16
September 26-30, 2016
http://www.linaro.org
http://connect.linaro.org
The document discusses developing network device drivers for embedded Linux. It covers key topics like socket buffers, network devices, communicating with network protocols and PHYs, buffer management, and differences between Ethernet and WiFi drivers. The outline lists these topics and others like throughput and considerations. Prerequisites include C skills, Linux knowledge, and an understanding of networking and embedded driver development.
RISC-V on Edge: Porting EVE and Alpine Linux to RISC-VScyllaDB
This document discusses porting the Alpine Linux distribution and EVE operating system to RISC-V processors. It provides an overview of RISC-V and describes how Alpine Linux and EVE-OS are well-suited for edge computing workloads due to their small footprint and use of containers. The document then outlines the steps taken to port Alpine Linux and its packages to RISC-V, including getting key packages like libunwind to build and working with the Alpine community. It concludes by encouraging more development of software for the emerging RISC-V server platforms.
The document discusses the architecture of the Linux kernel. It describes the user space and kernel space components. In user space are the user applications, glibc library, and each process's virtual address space. In kernel space are the system call interface, architecture-independent kernel code, and architecture-dependent code. It then covers several kernel subsystems like process management, memory management, virtual file system, network stack, and device drivers.
LCU13: An Introduction to ARM Trusted FirmwareLinaro
Resource: LCU13
Name: An Introduction to ARM Trusted Firmware
Date: 28-10-2013
Speaker: Andrew Thoelke
Video: http://www.youtube.com/watch?v=q32BEMMxmfw
This introduces the linaro OP-TEE project in the context of the Automotive Grade Linux distribution. This TEE is today considered as a potential key element to provides some security enforcement in the scope of Software OTA for the AGL distribution.
This brief slides set was presented during AGL Face to Face Technical Meeting 25 – 27 May, Vannes, France
The document discusses Linux video drivers and frameworks. It describes the original frame buffer and console interfaces. It then summarizes the Video For Linux v2 (v4l2) framework, which defines structures like the "Video Device" and mechanisms for video buffer and control management. The v4l2 framework aims to provide a complete and integrated solution for working with video and audio devices.
LAS16-402: ARM Trusted Firmware – from Enterprise to EmbeddedLinaro
LAS16-402: ARM Trusted Firmware – from Enterprise to Embedded
Speakers:
Date: September 29, 2016
★ Session Description ★
ARM Trusted Firmware has established itself as a key part of the ARMv8-A software stack. Broadening its applicability across all segments, from embedded to enterprise, is challenging. This session discusses the latest developments, including extension into the 32-bit space.
★ Resources ★
Etherpad: pad.linaro.org/p/las16-402
Presentations & Videos: http://connect.linaro.org/resource/las16/las16-402/
★ Event Details ★
Linaro Connect Las Vegas 2016 – #LAS16
September 26-30, 2016
http://www.linaro.org
http://connect.linaro.org
The document discusses developing network device drivers for embedded Linux. It covers key topics like socket buffers, network devices, communicating with network protocols and PHYs, buffer management, and differences between Ethernet and WiFi drivers. The outline lists these topics and others like throughput and considerations. Prerequisites include C skills, Linux knowledge, and an understanding of networking and embedded driver development.
GNU Toolchain is the de facto standard of IT industrial and has been improved by comprehensive open source contributions. In this session, it is expected to cover the mechanism of compiler driver, system interaction (take GNU/Linux for example), linker, C runtime library, and the related dynamic linker. Instead of analyzing the system design, the session is use case driven and illustrated progressively.
Diving into SWUpdate: adding new platform support in 30minutes with Yocto/OE !Pierre-jean Texier
The document discusses adding new platform support for SWUpdate in 30 minutes using Yocto/OE. It provides an overview of SWUpdate and the update process. It then demonstrates how to generate a clean Yocto/OE setup for the Microchip SAMA5D27-SOM1-EK1 board using KAS. Specific steps are outlined for creating a partition scheme, machine configuration, and deployment/testing of SWUpdate on the target board.
The document discusses block drivers in Linux. It covers the need for the block layer, decoding block devices, writing a block driver, driver registration, block device operations, and request queues. Key aspects covered include registering a block device driver, implementing required functions like open and close, managing request queues and processing I/O requests to read from and write to the device. An example RAM disk driver is presented to demonstrate writing a basic block driver.
Getting started with setting up embedded platform requires audience to understand some of the key aspects of Linux. Starting with basics of Linux this presentation talks about basic commands, vi editor, shell scripting and advanced commands
Launch the First Process in Linux SystemJian-Hong Pan
The session: https://coscup.org/2022/en/session/AGCMDJ
After Linux kernel boots, it will try to launch first process “init” in User Space. Then, the system begins the featured journey of the Linux distribution.
This sharing takes Busybox as the example and shows that how does Linux kernel find the “init” which directs to the Busybox. And, what will Busybox do and how to get the console. Try to make it like a simple Linux system.
Before Linux kernel launches “init” process, the file system and storage corresponding drivers/modules must be loaded to find the “init”. Besides, to mount the root file system correctly, the kernel boot command must include the root device and file system format parameters.
On the other hand, the Busybox directed from “init” is a lightweight program, but has rich functions, just like a Swiss Army Knife. So, it is usually used on the simple environment, like embedded Linux system.
This sharing will have a demo on a virtual machine first, then on the Raspberry Pi.
Drafts:
* https://hackmd.io/@starnight/Busbox_as_the_init
* https://hackmd.io/@starnight/Build_Alpines_Root_Filesystem_Bootstrap
Relate idea: https://hackmd.io/@starnight/Systems_init_and_Containers_COMMAND_Dockerfiles_CMD
LCU13: Deep Dive into ARM Trusted Firmware
Resource: LCU13
Name: Deep Dive into ARM Trusted Firmware
Date: 31-10-2013
Speaker: Dan Handley / Charles Garcia-Tobin
This document summarizes the evolution of the RISC-V software ecosystem from 2015 to 2020. It describes how initial ports of key software in 2015, like GCC and Linux, have expanded to include upstream support in most open source software projects today. It outlines remaining priorities like completing support for specifications and filling gaps in programming language and application software support. The document concludes by encouraging continued collaboration to further mature the RISC-V software ecosystem.
This document provides an introduction to Linux drivers. It discusses the ecosystem of Linux drivers, types of Linux drivers, driver layering, related commands and configurations. It also guides the reader in creating their first Linux driver, covering basics like the module constructor, destructor, printk function and building the driver module.
U-boot provides a multistage boot process that initializes the CPU and board resources incrementally at each stage. It begins execution on the CPU in a limited environment and hands off to subsequent stages that gain access to more resources like memory and devices. U-boot supports booting an operating system image from storage like SSD or over the network and offers features like secure boot and hypervisor support.
LCU14-107: OP-TEE on ARMv8
---------------------------------------------------
Speaker: Jens Wiklander
Date: September 15, 2014
---------------------------------------------------
★ Session Summary ★
SWG is porting OP-TEE to ARMv8 using Fixed Virtual Platform. Initially OP-TEE is running secure world in aarch32 mode, but with the normal world code running in aarch64 mode. Since ARMv8 uses ARM Trusted Firmware we have patched it with an OP-TEE dispatcher to be able to communicate between secure and normal world.
---------------------------------------------------
★ Resources ★
Zerista: http://lcu14.zerista.com/event/member/137710
Google Event: https://plus.google.com/u/0/events/c0ef114n77bhgbns9vb85g9n6ak
Presentation: http://www.slideshare.net/linaroorg/lcu14-107-optee-on-ar-mv8
Video: https://www.youtube.com/watch?v=JViplz-ah9M&list=UUIVqQKxCyQLJS6xvSmfndLA
Etherpad: http://pad.linaro.org/p/lcu14-107
---------------------------------------------------
★ Event Details ★
Linaro Connect USA - #LCU14
September 15-19th, 2014
Hyatt Regency San Francisco Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
The document discusses various data structures and functions related to network packet processing in the Linux kernel socket layer. It describes the sk_buff structure that is used to pass packets between layers. It also explains the net_device structure that represents a network interface in the kernel. When a packet is received, the interrupt handler will raise a soft IRQ for processing. The packet will then traverse various protocol layers like IP and TCP to be eventually delivered to a socket and read by a userspace application.
This document provides an overview of QEMU, including its use of dynamic translation and Tiny Code Generator (TCG) to emulate target CPUs on the host system. It discusses how QEMU translates target instructions into a RISC-like intermediate representation (TCG ops), optimizes and converts them to host instructions. The document also mentions Linaro's work with QEMU and a QEMU monitor tool for debugging ARM systems emulated by QEMU.
This document provides an overview of pointers in C programming. It discusses seven rules for pointers, including that pointers are integer variables that store memory addresses, how to dereference and reference pointers, NULL pointers, and arithmetic operations on pointers. It also covers dynamic memory allocation using malloc, calloc, realloc, and free and different approaches to 2D arrays. Finally, it discusses function pointers and their uses, including as callback functions.
HKG18-402 - Build secure key management services in OP-TEELinaro
Session ID: HKG18-402
Session Name: HKG18-402 - Build secure key management services in OP-TEE
Speaker: Etienne Carriere
Track: Security
★ Session Summary ★
The session presents an initiative to build secure key management services in the OP-TEE project. Based on OP-TEE services (persistent storage, cryptography, time, etc) one could build a trusted application of store and use secure keys. An open source implementation for generic key services could be of interest. However there are many client APIs defined in the ecosystem which is a matter of concern for standardization of such services. The session will open a discussion on this and presents the current choice of the PKCS#11 Cryptoki. There can be lot of key attributes and cryptographic schemes to be supported. The session will present the current plans (starting from AES flavors) and what is currently missing in the OP-TEE (as certificate support, bootloader support). This session aims at getting feedback from the community on this topic, discuss about expected services and client APIs.
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/hkg18/hkg18-402/
Presentation: http://connect.linaro.org.s3.amazonaws.com/hkg18/presentations/hkg18-402.pdf
Video: http://connect.linaro.org.s3.amazonaws.com/hkg18/videos/hkg18-402.mp4
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2018 (HKG18)
19-23 March 2018
Regal Airport Hotel Hong Kong
---------------------------------------------------
Keyword: Security
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961
QEMU is a free and open-source hypervisor that performs hardware virtualization by emulating CPUs through dynamic binary translation and providing device models. This allows it to run unmodified guest operating systems. It can be used to create virtual machines similarly to VMWare, VirtualBox, KVM, and Xen. QEMU also supports emulating different CPU architectures and can save and restore the state of a virtual machine.
Linux on RISC-V with Open Hardware (ELC-E 2020)Drew Fustini
Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. I will highlight that OpenHW Group has adopted the PULP Ariane from ETH Zurich for its Core-V CVA64 implementation. Finally, I will look at what Linux-capable "hard" RISC-V SoC's currently exist, and what is on the horizon for 2020 and 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA.
Video and slides synchronized, mp3 and slide download available at URL http://bit.ly/2X8uz92.
Alex Bradbury gives an overview of the status and development of RISC-V as it relates to modern operating systems, highlighting major research strands, controversies, and opportunities to get involved. Filmed at qconlondon.com.
Alex Bradbury is co-founder of lowRISC CIC, aiming to bring the benefits of open source development to the hardware industry by producing a high quality, secure, and open source SoC and associated infrastructure. He is a well-known member of the LLVM community, and is code owner and primary author of the upstream RISC-V back-end.
GNU Toolchain is the de facto standard of IT industrial and has been improved by comprehensive open source contributions. In this session, it is expected to cover the mechanism of compiler driver, system interaction (take GNU/Linux for example), linker, C runtime library, and the related dynamic linker. Instead of analyzing the system design, the session is use case driven and illustrated progressively.
Diving into SWUpdate: adding new platform support in 30minutes with Yocto/OE !Pierre-jean Texier
The document discusses adding new platform support for SWUpdate in 30 minutes using Yocto/OE. It provides an overview of SWUpdate and the update process. It then demonstrates how to generate a clean Yocto/OE setup for the Microchip SAMA5D27-SOM1-EK1 board using KAS. Specific steps are outlined for creating a partition scheme, machine configuration, and deployment/testing of SWUpdate on the target board.
The document discusses block drivers in Linux. It covers the need for the block layer, decoding block devices, writing a block driver, driver registration, block device operations, and request queues. Key aspects covered include registering a block device driver, implementing required functions like open and close, managing request queues and processing I/O requests to read from and write to the device. An example RAM disk driver is presented to demonstrate writing a basic block driver.
Getting started with setting up embedded platform requires audience to understand some of the key aspects of Linux. Starting with basics of Linux this presentation talks about basic commands, vi editor, shell scripting and advanced commands
Launch the First Process in Linux SystemJian-Hong Pan
The session: https://coscup.org/2022/en/session/AGCMDJ
After Linux kernel boots, it will try to launch first process “init” in User Space. Then, the system begins the featured journey of the Linux distribution.
This sharing takes Busybox as the example and shows that how does Linux kernel find the “init” which directs to the Busybox. And, what will Busybox do and how to get the console. Try to make it like a simple Linux system.
Before Linux kernel launches “init” process, the file system and storage corresponding drivers/modules must be loaded to find the “init”. Besides, to mount the root file system correctly, the kernel boot command must include the root device and file system format parameters.
On the other hand, the Busybox directed from “init” is a lightweight program, but has rich functions, just like a Swiss Army Knife. So, it is usually used on the simple environment, like embedded Linux system.
This sharing will have a demo on a virtual machine first, then on the Raspberry Pi.
Drafts:
* https://hackmd.io/@starnight/Busbox_as_the_init
* https://hackmd.io/@starnight/Build_Alpines_Root_Filesystem_Bootstrap
Relate idea: https://hackmd.io/@starnight/Systems_init_and_Containers_COMMAND_Dockerfiles_CMD
LCU13: Deep Dive into ARM Trusted Firmware
Resource: LCU13
Name: Deep Dive into ARM Trusted Firmware
Date: 31-10-2013
Speaker: Dan Handley / Charles Garcia-Tobin
This document summarizes the evolution of the RISC-V software ecosystem from 2015 to 2020. It describes how initial ports of key software in 2015, like GCC and Linux, have expanded to include upstream support in most open source software projects today. It outlines remaining priorities like completing support for specifications and filling gaps in programming language and application software support. The document concludes by encouraging continued collaboration to further mature the RISC-V software ecosystem.
This document provides an introduction to Linux drivers. It discusses the ecosystem of Linux drivers, types of Linux drivers, driver layering, related commands and configurations. It also guides the reader in creating their first Linux driver, covering basics like the module constructor, destructor, printk function and building the driver module.
U-boot provides a multistage boot process that initializes the CPU and board resources incrementally at each stage. It begins execution on the CPU in a limited environment and hands off to subsequent stages that gain access to more resources like memory and devices. U-boot supports booting an operating system image from storage like SSD or over the network and offers features like secure boot and hypervisor support.
LCU14-107: OP-TEE on ARMv8
---------------------------------------------------
Speaker: Jens Wiklander
Date: September 15, 2014
---------------------------------------------------
★ Session Summary ★
SWG is porting OP-TEE to ARMv8 using Fixed Virtual Platform. Initially OP-TEE is running secure world in aarch32 mode, but with the normal world code running in aarch64 mode. Since ARMv8 uses ARM Trusted Firmware we have patched it with an OP-TEE dispatcher to be able to communicate between secure and normal world.
---------------------------------------------------
★ Resources ★
Zerista: http://lcu14.zerista.com/event/member/137710
Google Event: https://plus.google.com/u/0/events/c0ef114n77bhgbns9vb85g9n6ak
Presentation: http://www.slideshare.net/linaroorg/lcu14-107-optee-on-ar-mv8
Video: https://www.youtube.com/watch?v=JViplz-ah9M&list=UUIVqQKxCyQLJS6xvSmfndLA
Etherpad: http://pad.linaro.org/p/lcu14-107
---------------------------------------------------
★ Event Details ★
Linaro Connect USA - #LCU14
September 15-19th, 2014
Hyatt Regency San Francisco Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
The document discusses various data structures and functions related to network packet processing in the Linux kernel socket layer. It describes the sk_buff structure that is used to pass packets between layers. It also explains the net_device structure that represents a network interface in the kernel. When a packet is received, the interrupt handler will raise a soft IRQ for processing. The packet will then traverse various protocol layers like IP and TCP to be eventually delivered to a socket and read by a userspace application.
This document provides an overview of QEMU, including its use of dynamic translation and Tiny Code Generator (TCG) to emulate target CPUs on the host system. It discusses how QEMU translates target instructions into a RISC-like intermediate representation (TCG ops), optimizes and converts them to host instructions. The document also mentions Linaro's work with QEMU and a QEMU monitor tool for debugging ARM systems emulated by QEMU.
This document provides an overview of pointers in C programming. It discusses seven rules for pointers, including that pointers are integer variables that store memory addresses, how to dereference and reference pointers, NULL pointers, and arithmetic operations on pointers. It also covers dynamic memory allocation using malloc, calloc, realloc, and free and different approaches to 2D arrays. Finally, it discusses function pointers and their uses, including as callback functions.
HKG18-402 - Build secure key management services in OP-TEELinaro
Session ID: HKG18-402
Session Name: HKG18-402 - Build secure key management services in OP-TEE
Speaker: Etienne Carriere
Track: Security
★ Session Summary ★
The session presents an initiative to build secure key management services in the OP-TEE project. Based on OP-TEE services (persistent storage, cryptography, time, etc) one could build a trusted application of store and use secure keys. An open source implementation for generic key services could be of interest. However there are many client APIs defined in the ecosystem which is a matter of concern for standardization of such services. The session will open a discussion on this and presents the current choice of the PKCS#11 Cryptoki. There can be lot of key attributes and cryptographic schemes to be supported. The session will present the current plans (starting from AES flavors) and what is currently missing in the OP-TEE (as certificate support, bootloader support). This session aims at getting feedback from the community on this topic, discuss about expected services and client APIs.
---------------------------------------------------
★ Resources ★
Event Page: http://connect.linaro.org/resource/hkg18/hkg18-402/
Presentation: http://connect.linaro.org.s3.amazonaws.com/hkg18/presentations/hkg18-402.pdf
Video: http://connect.linaro.org.s3.amazonaws.com/hkg18/videos/hkg18-402.mp4
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2018 (HKG18)
19-23 March 2018
Regal Airport Hotel Hong Kong
---------------------------------------------------
Keyword: Security
'http://www.linaro.org'
'http://connect.linaro.org'
---------------------------------------------------
Follow us on Social Media
https://www.facebook.com/LinaroOrg
https://www.youtube.com/user/linaroorg?sub_confirmation=1
https://www.linkedin.com/company/1026961
QEMU is a free and open-source hypervisor that performs hardware virtualization by emulating CPUs through dynamic binary translation and providing device models. This allows it to run unmodified guest operating systems. It can be used to create virtual machines similarly to VMWare, VirtualBox, KVM, and Xen. QEMU also supports emulating different CPU architectures and can save and restore the state of a virtual machine.
Linux on RISC-V with Open Hardware (ELC-E 2020)Drew Fustini
Want to run Linux on open hardware? This talk will explore how the RISC-V, an open instruction set (ISA), and open source FPGA tools can be leveraged to achieve that goal. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on a RISC-V soft-core in the ECP5 FPGA on the conference badge. I will introduce Migen, LiteX and Vexriscv, and explain how they enabled us to quickly implement an SoC in the FPGA capable of running Linux. I will also explore other Linux-capable open source RISC-V implementations, and how some are being used in industry. I will highlight that OpenHW Group has adopted the PULP Ariane from ETH Zurich for its Core-V CVA64 implementation. Finally, I will look at what Linux-capable "hard" RISC-V SoC's currently exist, and what is on the horizon for 2020 and 2021. This talk is should be relevant to people who are interested in building open hardware systems capable of running Linux. It should also be useful to people who are curious about RISC-V. Software engineers may find it exciting to learn how Python can be used to for chip-level design with Migen and LiteX, and simplify building a System-on-Chip (SoC) for an FPGA.
Video and slides synchronized, mp3 and slide download available at URL http://bit.ly/2X8uz92.
Alex Bradbury gives an overview of the status and development of RISC-V as it relates to modern operating systems, highlighting major research strands, controversies, and opportunities to get involved. Filmed at qconlondon.com.
Alex Bradbury is co-founder of lowRISC CIC, aiming to bring the benefits of open source development to the hardware industry by producing a high quality, secure, and open source SoC and associated infrastructure. He is a well-known member of the LLVM community, and is code owner and primary author of the upstream RISC-V back-end.
Want to run Linux with RISC-V on Open Source Hardware? This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems.
I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix).
I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux.
In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.
Slides for my presentation on RISC-V and open source chip design at PumpingStation1 hackerspace tonight https://github.com/pdp7/talks/blob/master/nerp-riscv.pdf
Embedded Fest 2019. Wei Fu. Linux on RISC-V--Fedora and Firmware in practiceEmbeddedFest
The document discusses Fedora and firmware development for RISC-V platforms. It provides an overview of boot processes, toolchains, and images for running Fedora natively on RISC-V hardware. Key points include: the current boot flow uses OpenSBI and U-Boot firmware with EDK2; toolchain and QEMU packages are available to build Fedora via cross-compilation or natively; and Fedora images have been tested on various RISC-V boards running on QEMU or directly on hardware like the SiFive Unleashed.
How to run Linux on RISC-V (FOSS North 2020)Drew Fustini
Title:
How to run Linux on RISC-V (with open hardware and open source FPGA tools)
Abstract:
Want to run Linux with RISC-V on Open Source Hardware?
This talk will explore the current options including how open source FPGA tools can be leveraged to build open Linux-capable systems.
I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge using only open source tools thanks to Project Trellis, yosys and nextpnr. I will explain what migen and LiteX are, and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux on VexRiscv.
In conclusion, I will explore the landscape of open source chip designprojects and the Linux-capable RISC-V silicon chips on horizon for 2020, and talk about my desire to collaborate on an affordable (<$100?) OSHW Linux RISC-V board.
Berlin Embedded Linux meetup: How to Linux on RISC-VDrew Fustini
Berlin Embedded Linux meetup: How to Linux on RISC-V... with open hardware and open source FPGA tools.
I will introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the important of free software FPGA tools like yosys for synthesis, and nextpnr for place and route, and how SymbiFlow is leveraging bitstream documentation from Project IceStrom (iCE40), Project Trellis (ECP5), and Project X-Ray (Xilinix).
I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux.
In conclusion, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.
Embedded Linux Conference 2020:
Linux on RISC-V with open source hardware and open source FPGA tools
Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems.
This talk will explore Open Source Hardware projects relevant to Linux, including boards like BeagleBone, Olimex OLinuXino, the Reform laptop and more.
I will also talk about the importance of the open RISC-V instruction set and free software FPGA toolchains. I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a SoC capable of running Linux.
Finally, I will explore the landscape of open source chip design projects and the Linux-capable RISC-V silicon chips on horizon for 2020.
This document discusses Linux running on open source hardware using RISC-V processors and FPGAs. RISC-V is an open instruction set that provides an alternative to proprietary architectures like ARM. Projects are working to run Linux on low-cost RISC-V chips from SiFive and Kendryte. FPGAs can also run a Linux-capable RISC-V soft core called VexRiscv using open source tools. Several open source boards have been developed for the Lattice ECP5 FPGA featuring RISC-V support.
This document summarizes Drew Fustini's presentation about Linux on RISC-V. The key points are:
1) RISC-V is an open instruction set architecture that can be used as an alternative to proprietary ISAs like ARM and x86. It allows anyone to freely develop CPUs, SoCs and other hardware.
2) Several companies now offer RISC-V chips that run Linux, such as SiFive's HiFive Unleashed board. Open source projects are also bringing up Linux on chips like the Kendryte K210.
3) Open source FPGA tools like IceStorm, Trellis, X-Ray and SymbiFlow have made FPG
The document discusses Fedora on RISC-V, including:
1) The history and status of Fedora on RISC-V, including bootstrapping efforts and supported targets like QEMU and various RISC-V boards.
2) Details on the toolchain, QEMU, libvirt/VM tools, and development environment for building and running Fedora on RISC-V.
3) The boot flow and build process for firmware like OpenSBI and U-Boot when creating Fedora images for RISC-V platforms.
Collaborate with us to build the Open Hardware PowerPC GNU/Linux notebook. You can collaborate in many ways, even with the Donation Campaign. https://www.powerpc-notebook.org/campaigns/donation-campaign-for-pcb-design-of-the-powerpc-notebook-motherboard/
Open Source Hardware and Libre SiliconDrew Fustini
My Open Source Hardware and Libre Silicon talk for Penguicon 2017.
Open Source Hardware (OSHW) designs are made publicly available so that anyone can study, modify, distribute, make or sell designs or hardware based on that design. This talk will explore the shared values with Open Source software and the specifics of publishing a hardware project under an Open Source license.
It will include examples of Linux running on OSHW with projects like BeagleBone, CHIP, MinnowBoard and more. The role of the Open Source Hardware Association and annual Open Hardware Summit will also be discussed, along with important OSHW projects for scientific researchers.
There are exciting new developments within the last year for OSHW at the chip level. Projects like lowRISC, J-Core, OnChip and SiFive are working to produce true Open Source silicon processors. The FOSSi Foundation and LibreCores are helping to organize and promote this exciting new ecosystem.
Presented by: Elizabeth Joseph, IBM
Presented at All Things Open 2020
Abstract: Many enterprises and, as many of us learned during the COVID-19 outbreak, governments, rely on mainframes to do the bulk of their data-driven work and the modern mainframe is very good at what it does. But what if you’re looking to modernize your platform and bring in the DevOps methodologies, tooling, and practice into your organization?
Today, there is an entire product line of mainframes that exclusively run Linux (RHEL, SLES, or Ubuntu). With Linux, you get access to the vast ecosystem of open source software that’s already been ported to the mainframe architecture (s390x), with more being ported every month.
If your organization is using z/OS, the Open Mainframe Project has a series of open source projects targeted specifically at the mainframe and improving usability. Zowe, for instance, helps create a consolidated API for accessing resources and workload on your system and Feilong is a z/VM connector that allows you to manage your virtual machines with familiar open source tooling like OpenStack. There are even connectors for Jenkins that allow you to integrate CI/CD pipelines with your workloads.
In this talk I’ll explore all of this in more to show you how an automated, modern environment can thrive on today’s mainframe.
Linux on Open Source Hardware with Open Source chip design (36c3)Drew Fustini
Want to run Linux on open hardware? This talk will explore Open Source Hardware projects capable of that task, and explore how RISC-V and free software FPGA projects can be leveraged to create libre systems.
Presented at the 36th Chaos Communication Congress (36c3) in Leipzig, Germany:
https://fahrplan.events.ccc.de/congress/2019/Fahrplan/events/10549.html
Video: https://media.ccc.de/v/36c3-10549-linux_on_open_source_hardware_with_open_source_chip_design
YouTube: https://www.youtube.com/watch?v=mnOBTD9dgsg
HKG15: Opening Keynote - George Grey, Linaro CEOLinaro
Opening Keynote - George Grey, Linaro CEO
---------------------------------------------------
Speaker: George Grey
Date: February 9, 2015
---------------------------------------------------
★ Session Summary ★
Keynote Topic: Welcome to Linaro Connect and an update on the latest Linaro developments
--------------------------------------------------
★ Resources ★
Pathable: https://hkg15.pathable.com/meetings/250753
Video: https://www.youtube.com/watch?v=6aAFNCUUVj4
Etherpad:
---------------------------------------------------
★ Event Details ★
Linaro Connect Hong Kong 2015 - #HKG15
February 9-13th, 2015
Regal Airport Hotel Hong Kong Airport
---------------------------------------------------
http://www.linaro.org
http://connect.linaro.org
CPU Diversity is growing: POWER and RISC-V OpenISA are real option with FPGA, ASIC and Motherboard available next year
Which are Open Hardware Power Architecture real options? Microwatt and LibreSoc have samples of low power Open ISA Power chip. The Power Progress Community released the Prototypes of the Notebook Motherboard based on Power Architecture with Cern Open Hardware License. What happen around OpenPower Foundations with project like PowerPI and LibreBMC.
Embedded Recipes 2019 - Linux on Open Source Hardware and Libre SiliconAnne Nicolas
This talk will explore Open Source Hardware projects relevant to Linux, including boards like BeagleBone, Olimex OLinuXino, Giant board and more. Looking at the benefits and challenges of designing Open Source Hardware for a Linux system, along with BeagleBoard.org’s experience of working with community, manufacturers, and distributors to create an Open Source Hardware platform. In closing also looking at the future, Libre Silicon like RISC-V designs, and where this might take Linux.
Drew Fustini
Inria Tech Talk : RIOT, l'OS libre pour vos objets connectés #IoTStéphanie Roger
Faites communiquer vos objets connectés avec la solution RIOT !
RIOT est un nano système d'exploitation open source, l’équivalent de Linux, pour l’internet des objets. Grâce aux standards de communication qu'il implémente, il vous permettra de développer facilement et de façon pérenne et sécurisée vos applications pour vos objets communicants et embarqués (agriculture connectée, suivi et gestion de bâtiments intelligents, petits automatismes, usine du futur ...).
Inria, l'institut national de recherche dédié au numérique, qui à French Tech Central connecte les entrepreneurs au meilleur de la recherche publique française, est un des membres co-fondateurs de la communauté mondiale des développeurs RIOT.
openSUSE on ARM provides openSUSE distributions such as Tumbleweed and Leap that run on ARM architectures. The distributions are built in the Open Build Service and tested using openQA. Recent improvements include adding more ARM build power in OBS, removing snapshotting so ARM follows the same release schedule as x86, and increasing ARM test coverage in openQA. Future work includes improving the ARM wiki, enabling more builds in OBS, adding tests for ARMv7 systems in openQA, and continuing to fix bugs and package issues.
Similar a Linux on RISC-V with Open Source Hardware (Open Source Summit Japan 2020) (20)
From Make 'n Tell at xHain hackerspace in Berlin, I introduce the open RISC-V instruction set architecture (ISA) and explain how it is enabling a new generation of open source chip design. I will also discuss the importance of free software FPGA tools.
I will explain how myself and others at Hackaday Supercon teamed up to get Linux running on RISC-V core in the ECP5 FPGA badge. I will explain what LiteX is and how it enabled us to quickly build a System-on-Chip (SoC) capable of running Linux.
I finish by talking about how Fomu is a great FPGA board to get started with!
This document summarizes Drew Fustini's talk on running Linux on an FPGA badge using RISC-V and open source tools. It discusses how a team used LiteX and VexRiscv to build a SoC with a RISC-V CPU on the Hackaday Supercon badge FPGA that could boot Linux from an external SDRAM cartridge added to the badge. It also promotes open source FPGA tools like Project Trellis, LiteX, and boards like the Orange Crab and ULX3S for enabling open hardware development.
Introduction to Open Source Hardware, OSHWA and Open Hardware SummitDrew Fustini
The document provides an overview of open source hardware, including definitions of open source, examples like Arduino, required documentation for electronics projects, licenses, and resources like the Open Hardware Summit and Open Source Hardware Association. It discusses open hardware principles, certification, and the use of Linux on open hardware boards and single-board computers.
Open Source Hardware, Linux and RISC-VDrew Fustini
Open Source Hardware "Birds of a Feather” (BoF) session at Embedded Linux Conference 2018 in Portland. Topics include elements of open source hardware designs, applications in science, open source hardware that can run Linux, and recent libre silicon efforts including RISC-V architecture and SiFive.
Overview of Open Source, Free Software and Open Source Hardware (OSHW). Survey of Open Source licenses that can used for OSHW projects. Highlight OSHW projects that are democratizing scientific research equipment and enabling citizen science efforts. Review OSHW projects that have become commercial products. Discussion of different OSHW boards that can run Linux.
OSH Park is a community PCB ordering service that offers high quality, lead free boards manufactured in the USA for inexpensive prices due to shared panel costs. Customers can directly upload Autodesk EAGLE .brd files to OSH Park's website for ordering. It is recommended that customers run design rule checks on their files using OSH Park's Eagle Design Rules files prior to uploading to check for any issues.
The document introduces the BeagleBone Blue, a new single-board computer that combines the capabilities of the BeagleBone Black Wireless and Robotics Cape. It evolves from previous BeagleBone models with ARM processors and is designed for industrial applications. Key features include WiFi/Bluetooth connectivity, on-board microcontrollers, and interfaces integrated onto a single board to simplify building robotics and IoT projects.
Introduction to Open Source Hardware (OSHW) including: the philosophy, best practices, CERN Open Hardware License, Open Hardware Summit, Open Source Hardware Association (OSHWA), Open Source Hardware Certification Program, OSHW Products, Linux on OSHW, and OSHW in Science.
Google Summer of Code and BeagleBoard.orgDrew Fustini
Slides for my Maker Faire New York 2016 talk:
Google Summer of Code and BeagleBoard.org
https://drive.google.com/file/d/0B_NI2VDamOOfOU9MV2lCd2dVSjg/view?usp=sharing
Taking the BeagleBone Cookbook recipes beyond BeagleBone BlackDrew Fustini
NOTE: Slides by Jason Kridner and Mark Yoder
Source: http://event.lvl3.on24.com/event/11/07/48/2/rt/1/documents/resourceList1454015491443/cookbookbeyondblack_draft.pdf
This document discusses software defined radio (SDR) and various low-cost SDR devices that can be used for experimenting with radio signals, including RTL-SDR USB dongles, HackRF, NooElec SDR sticks, and FUNcube Dongles. It provides information on software like GNU Radio, Gqrx, rtl-sdr library, ViewRF, and OpenBTS for processing radio signals on devices like the BeagleBone Black.
Espruino - JavaScript for MicrocontrollersDrew Fustini
Espurino allows programming microcontrollers with JavaScript. It runs on an STM32 board with a Cortex M3 CPU, Flash memory, GPIO pins and other interfaces. JavaScript can be used without compiling, modified during runtime, and has widespread usage and tutorials available. The Espruino board costs $40 and can be programmed over USB or via an online IDE. Examples show blinking LEDs, controlling strings of LEDs, and using timers. Tessel is another JavaScript board aimed at internet-connected devices with built-in WiFi. Micro Python brings the Python language to microcontrollers in a lean and optimized implementation.
The Eudyptula Challenge is a series of programming exercises that teaches Linux kernel development skills. It starts with basic "Hello World" kernel modules and gets progressively more complex, with tasks like submitting patches to the mainline kernel. Over 172 people have had their patches accepted into the kernel as a result of the challenge. It requires basic C skills and patience for working with large open source projects. The challenge is modeled after the Matasano Crypto Challenge and aims to help people learn and contribute to the Linux kernel.
The 5th Annual Open Hardware Summit was held in Rome, Italy in 2014. It was organized by the Open Source Hardware Association to discuss the growing open hardware movement. Key topics included the Ada Lovelace Fellowship for women in open technology, workshops on open hardware manufacturing and licensing, and presentations from leaders in the field such as Adrian Bowyer of RepRap and Eric Pan of Seeed Studio. The Summit aimed to advance open sharing of hardware knowledge and collaboration on technology development.
Drew Fustini is a software developer and embedded systems engineer seeking a new opportunity where he can apply his expertise in Linux, software development, and embedded systems. He has over 15 years of experience developing software and working with technologies like Arduino, Raspberry Pi, BeagleBone, and Linux. His experience includes roles at element14, Subnetworx, eMvoy Search Engine, UIC, and other companies where he has developed applications, maintained infrastructure, and provided technical support.
The BeagleBone Black is a $45 open source Linux computer developed by the BeagleBoard.org community. It has a 1GHz ARM Cortex A8 processor, 512MB of RAM, and built-in networking and storage. As an open source hardware device, its schematics, board layout, and bill of materials are all publicly available. It runs various Linux distributions from a microSD card or built-in flash and can interface with sensors, motors and other devices through its GPIO pins and capes add-on boards, making it well suited for physical computing projects.
I did an overview of Embedded Linux topics (arch, SoCs, SBCs, kernel dev community, real-time, device tree, building root filesystem, etc) in 2014 for the Embedded Systems meetup at my hackerspace: http://www.meetup.com/NERP-Not-Exclusively-Raspberry-Pi/events/183068212/
Comparative analysis between traditional aquaponics and reconstructed aquapon...bijceesjournal
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Advanced control scheme of doubly fed induction generator for wind turbine us...IJECEIAES
This paper describes a speed control device for generating electrical energy on an electricity network based on the doubly fed induction generator (DFIG) used for wind power conversion systems. At first, a double-fed induction generator model was constructed. A control law is formulated to govern the flow of energy between the stator of a DFIG and the energy network using three types of controllers: proportional integral (PI), sliding mode controller (SMC) and second order sliding mode controller (SOSMC). Their different results in terms of power reference tracking, reaction to unexpected speed fluctuations, sensitivity to perturbations, and resilience against machine parameter alterations are compared. MATLAB/Simulink was used to conduct the simulations for the preceding study. Multiple simulations have shown very satisfying results, and the investigations demonstrate the efficacy and power-enhancing capabilities of the suggested control system.
Introduction- e - waste – definition - sources of e-waste– hazardous substances in e-waste - effects of e-waste on environment and human health- need for e-waste management– e-waste handling rules - waste minimization techniques for managing e-waste – recycling of e-waste - disposal treatment methods of e- waste – mechanism of extraction of precious metal from leaching solution-global Scenario of E-waste – E-waste in India- case studies.
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Climate change's impact on the planet forced the United Nations and governments to promote green energies and electric transportation. The deployments of photovoltaic (PV) and electric vehicle (EV) systems gained stronger momentum due to their numerous advantages over fossil fuel types. The advantages go beyond sustainability to reach financial support and stability. The work in this paper introduces the hybrid system between PV and EV to support industrial and commercial plants. This paper covers the theoretical framework of the proposed hybrid system including the required equation to complete the cost analysis when PV and EV are present. In addition, the proposed design diagram which sets the priorities and requirements of the system is presented. The proposed approach allows setup to advance their power stability, especially during power outages. The presented information supports researchers and plant owners to complete the necessary analysis while promoting the deployment of clean energy. The result of a case study that represents a dairy milk farmer supports the theoretical works and highlights its advanced benefits to existing plants. The short return on investment of the proposed approach supports the paper's novelty approach for the sustainable electrical system. In addition, the proposed system allows for an isolated power setup without the need for a transmission line which enhances the safety of the electrical network
CHINA’S GEO-ECONOMIC OUTREACH IN CENTRAL ASIAN COUNTRIES AND FUTURE PROSPECTjpsjournal1
The rivalry between prominent international actors for dominance over Central Asia's hydrocarbon
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geopolitical, geostrategic, and geoeconomic variables. Topics including trade, political hegemony, oil
politics, and conventional and nontraditional security are all explored and explained by the researcher.
Using Mackinder's Heartland, Spykman Rimland, and Hegemonic Stability theories, examines China's role
in Central Asia. This study adheres to the empirical epistemological method and has taken care of
objectivity. This study analyze primary and secondary research documents critically to elaborate role of
china’s geo economic outreach in central Asian countries and its future prospect. China is thriving in trade,
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Linux on RISC-V with Open Source Hardware (Open Source Summit Japan 2020)
1. Linux on RISC-V
with Open Source Hardware
Drew Fustini (@pdp7)
<drew@beagleboard.org>
Open Source Summit Japan 2020
https://tinyurl.com/y6j8lfyz
2. $ whoami
● Open Source Hardware designer at OSH Park
○ PCB manufacturing service in the USA
○ <drew@oshpark.com> | twitter: @oshpark
● Board of Directors, BeagleBoard.org Foundation
○ BeagleBone is a small open source hardware Linux computer
○ <drew@beagleboard.org>
● Board of Directors, Open Source Hardware Association (OSHWA)
○ OSHW Certification Program: https://certification.oshwa.org/
● RISC-V Ambassador for RISC-V International
○ https://riscv.org/risc-v-ambassadors/
4. Upcoming Events
● RISC-V (Virtual) Summit 2020
○ December 8th to 10th
○ https://tmt.knect365.com/risc-v-summit/
5. Upcoming Events
Hardware whose design is made publicly
available so that anyone can study,
modify, distribute, make, and sell the
design or hardware based on that design
(source: Open Source Hardware (OSHW) Statement of Principles 1.0)
7. Linux on Open Source Hardware with Open Source chip design
Chaos Communication Congress (36c3), December 2019
8. Instruction Set Architecture (ISA)
● Interface between hardware and software
○ C++ program is compiled into instructions for a microprocessor (CPU) to execute.
● How does compiler know what instructions the CPU understands?
○ This is defined by the Instruction Set Architecture
● ISA is a standard
○ a set of rules that define the tasks the processor can perform
○ proprietary ISA’s like x86 and ARM require commercial licensing
9. ● History
○ Started in 2010 by computer architecture researchers at UC Berkeley
○ Watch the Instruction Sets Want to be Free by Krste Asanovic
● Why “RISC”?
○ RISC = Reduced Instruction Set Computer
● Why “V”?
○ 5th RISC instruction set to come of out UC Berkeley
● Why is it “Free and Open”?
○ Specifications licensed as Creative Commons Attribution 4.0 International
RISC-V: a Free and Open ISA
10. ● Simple, clean-slate design
○ Far smaller than other commercial ISAs
○ Clear separation between unprivileged and privileged ISA
○ Avoids micro-architecture or technology dependent features
● Modular ISA designed for extensibility and specialization
○ Small standard base, with multiple standard extensions
○ Suitable for everything from tiny microcontrollers to supercomputers
● Stable
○ Base and standard extensions are frozen
○ Additions via optional extensions, not new versions of base ISA
What is different about RISC-V?
(source: Instruction Sets Want to be Free (Krste Asanović))
11. RISC-V Base Integer ISA
● RV32I: 32-bit
○ less than 50 instructions needed!
● RV32E: 32-bit embedded
○ reduces register count from 32 to
16 for tiny microcontrollers
● RV64I: 64-bit
● RV128I: 128-bit
○ Future-proof for nonvolatile RAM
capacity; benefits security research
(source: RISC-V Summit 2019: State of the Union)
12. RISC-V Standard Extensions
● M: integer multiply/divide
● A: atomic memory operations
● F, D, Q: floating point, double-precision, quad-precision
● G: “general purpose” ISA, equivalent to IMAFD
● C: compressed instructions conserve memory and cache like ARM Thumb
● Additions through optional extensions like Vector but not new base ISA
● Standard extensions are ratified and will be supported forever
● Linux distros like Debian and Fedora target RV64GC
(source: RISC-V Summit 2019: State of the Union)
13. (source: Hot Chips Tutorial, Part 1: RISC-V overview and ISA design, Krste Asanovic)
14. Learn more about RISC-V
● Get up-to-speed quick with
the RISC-V Reader
riscvbook.com
15. RISC-V and Industry
● RISC-V International now controls the specifications: riscv.org
○ Non-profit organization with 690+ members from 50 countries including companies,
universities and more
○ Become a member (free of cost to individuals and non-profits)
○ YouTube channel has hundreds of talks!
● Companies plan to ship billions of devices with RISC-V cores
○ Nvidia already shipping RISC-V cores for system management in its GPU products
○ Western Digital will be using RISC-V controllers in all of its storage products
16. RISC-V and Industry
● Avoid ISA licensing and royalty fees
○ including the legal costs and long delays due to complex licensing agreements
● Freedom to choose micro-architecture implementation
○ only a few companies like Apple, Samsung and Qualcomm have ARM architecture licenses
which allows them to do a custom implementation
● Freedom to leverage existing open source implementations
○ Linux-capable: Berkeley’s Rocket & BOOM, ETH Zurich’s Ariane, OpenHW CVA6, Vexriscv
● Already has a well supported software ecosystem
○ Linux, BSD, gcc, glibc, LLVM/clang, FreeRTOS, Zephyr, QEMU
○ The State of Software Development Tools for RISC-V by Khem Raj
17. RISC-V around the world
● RISC-V International based in Switzerland
○ U.S.-based RISC-V Foundation reincorporated at the beginning of 2020 as RISC-V
International in Switzerland to avoid being hampered by U.S. politics
● EU, India and Pakistan have RISC-V processor design initiatives
○ Desire for sovereign control of technology and avoid backdoors from other nations
● Strong interest from chipmakers in China
○ U.S. companies banned in 2019 from doing business with Huawei… who’s next?
○ ARM was deemed to be a UK-origin technology in 2019, so it is ok to do business with
Huawei… but how long will that last? Will the Nvidia acquisition impact that?
18. “Is RISC-V an Open Source processor?”
● RISC-V is a set of specifications under an open source license
● RISC-V implementations can be open source or proprietary
● Open specifications make open source implementations possible
○ An open ISA like RISC-V enables the open source processor implementations
19. RISC-V Privileged Architecture
● Three privilege modes
○ User (U-Mode): applications
○ Supervisor (S-Mode): OS kernel
○ Machine (M-Mode): bootloader and firmware
● Supported combinations of modes
○ M (simple embedded systems)
○ M, U (embedded systems with memory protection)
○ M, S, U (Unix-style operating systems with virtual memory)
● Hypervisors run in modified S mode (HS)
(source: Co-developing RISC-V Hypervisor Support, Anup Patel)
20. RISC-V Boot Flow
● Follows commonly used multiple boot stages model
○ ZSBL and FSBL are initial platform-specific bootloaders (SiFive FU540 SoC in this example)
○ U-Boot is the final stage bootloader that jumps into Linux kernel
○ NOTE: hart is a hardware thread of execution, which users may refer to as a “core”
(source: RISC-V software ecosystem in 2020, Atish Patra)
21. What is SBI?
● SBI stands for Supervisor Binary Interface
○ calling convention between Supervisor (S-mode OS) and
Supervisor Execution Environment (SEE)
○ allows supervisor-mode software to be written that is
portable to all RISC-V implementations
● Unix-class Platform Spec working group
○ Chaired by Al Stone
○ Now named the RISC-V Profiles and Platform Spec WG
(source: OpenSBI Deep Dive, Anup Patel)
22. What is OpenSBI?
● OpenSBI is an open source SBI implementation
○ avoid fragmentation of SBI implementations
● Layers of implementation
○ Platform specific reference firmware
○ Platform specific library
○ SBI library
● Provides run-time in M-mode
○ Typically used in boot stage following ROM/Loader
○ Provides support for reference platforms
○ Generic simple drivers included for M-mode to operate
(source: OpenSBI Deep Dive, Anup Patel)
23. UEFI Support
(source: Introduction to RISC-V Boot Flow, Atish Patra and Anup Patel)
● UEFI support for RISC-V coming in Linux 5.10 (ETA December 2020)
● U-Boot and TianoCore edk2 both have UEFI implementations for RISC-V
● Grub2 can be UEFI payload on RISC-V
24. RISC-V emulation in QEMU
● Support for RISC-V in mainline QEMU
○ QEMU can boot 32-bit and 64-bit mainline Linux kernel
○ QEMU can run OpenSBI, U-Boot and Coreboot
○ Draft versions of Hypervisor and Vector extensions supported
○ QEMU sifive_u machine can boot same binaries as the physical board
● Tutorial: Running 64- and 32-bit RISC-V Linux on QEMU
(source: OpenSBI Deep Dive, Anup Patel)
25. RISC-V in the Linux kernel
● Initial port by Palmer Dabbelt landed in Linux 4.15
○ Mailing list: linux-riscv@lists.infradead.org (archive)
● “What's missing in RISC-V Linux, and how YOU can help!”
○ Björn Töpel at Munich RISC-V meetup (jump to 43:25)
○ “A great way to learn the nitty gritty details of the Linux kernel”
○ “It’s a fun, friendly, and still pretty small community”
(source: “What's missing in RISC-V Linux, and how YOU can help!”, Björn Töpel)
26. (source: “What's missing in RISC-V Linux, and how YOU can help!”, Björn Töpel)
$ ./Documentation/features/list-arch.sh riscv | grep TODO
core/ cBPF-JIT : TODO | HAVE_CBPF_JIT # arch supports cBPF JIT optimizations
debug/ kprobes : TODO | HAVE_KPROBES # arch supports live patched kernel probe
debug/ kprobes-on-ftrace : TODO | HAVE_KPROBES_ON_FTRACE # arch supports combined kprobes and ftrace live patching
debug/ kretprobes : TODO | HAVE_KRETPROBES # arch supports kernel function-return probes
debug/ optprobes : TODO | HAVE_OPTPROBES # arch supports live patched optprobes
debug/ uprobes : TODO | ARCH_SUPPORTS_UPROBES # arch supports live patched user probes
debug/ user-ret-profiler : TODO | HAVE_USER_RETURN_NOTIFIER # arch supports user-space return from system call profiler
locking/ cmpxchg-local : TODO | HAVE_CMPXCHG_LOCAL # arch supports the this_cpu_cmpxchg() API
locking/ queued-rwlocks : TODO | ARCH_USE_QUEUED_RWLOCKS # arch supports queued rwlocks
locking/ queued-spinlocks : TODO | ARCH_USE_QUEUED_SPINLOCKS # arch supports queued spinlocks
perf/ kprobes-event : TODO | HAVE_REGS_AND_STACK_ACCESS_API # arch supports kprobes with perf events
sched/ membarrier-sync-core : TODO | ARCH_HAS_MEMBARRIER_SYNC_CORE # arch supports core serializing membarrier
sched/ numa-balancing : TODO | ARCH_SUPPORTS_NUMA_BALANCING # arch supports NUMA balancing
time/ arch-tick-broadcast : TODO | ARCH_HAS_TICK_BROADCAST # arch provides tick_broadcast()
time/ irq-time-acct : TODO | HAVE_IRQ_TIME_ACCOUNTING # arch supports precise IRQ time accounting
time/ virt-cpuacct : TODO | HAVE_VIRT_CPU_ACCOUNTING # arch supports precise virtual CPU time accounting
vm/ ELF-ASLR : TODO | ARCH_HAS_ELF_RANDOMIZE # arch randomizes the stack, heap and binary images of ELF binar
vm/ huge-vmap : TODO | HAVE_ARCH_HUGE_VMAP # arch supports the ioremap_pud_enabled() and ioremap_pmd_enable
vm/ ioremap_prot : TODO | HAVE_IOREMAP_PROT # arch has ioremap_prot()
vm/ PG_uncached : TODO | ARCH_USES_PG_UNCACHED # arch supports the PG_uncached page flag
vm/ THP : TODO | HAVE_ARCH_TRANSPARENT_HUGEPAGE # arch supports transparent hugepages
vm/ batch-unmap-tlb-flush: TODO | ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH # arch supports deferral of TLB flush until multiple pages are
unmapped
RISC-V in the Linux kernel
27. RISC-V in the Linux kernel
(source: “What's missing in RISC-V Linux, and how YOU can help!” (Björn Töpel) and linux-riscv mailing list)
● Recent work for debug, trace and security
○ eBPF JIT for RV64 (Björn Töpel) and RV32 (Luke Wilson)
○ kprobes and kretprobes will enable bpftrace and make perf more usable (Guo Ren)
○ jump-label support to reduce overhead of debug and trace features (Emil Renner)
○ KGDB and KDB support (Vincent Chen)
○ kexec and kdump support (Nick Kossifidis)
○ relocatable kernel will help KASLR implementation (Alex Ghiti)
○ syszcaller fuzzing support to discover kernel vulnerabilities
28. RISC-V in the Linux kernel
(source: “What's missing in RISC-V Linux, and how YOU can help!” (Björn Töpel) and linux-riscv mailing list)
● Recent work on hardware support
○ KVM support is waiting on ratification of Hypervisor spec (Anup Patel/Atish Patra)
○ Vector ISA support based on the draft vector extension (Greentime Hu)
○ sv48 support of 4-level page table for up to 64TB physical RAM (Alex Ghiti)
○ Unify NUMA implementation (Atish Patra, based on Greentime Hu)
○ Kendryte K210 support improvements including SPI for SD card slot (Damien Le Moal)
○ Microchip PolarFire SoC and Icicle board support (Atish Patra)
29. Linux distro: Fedora
(source: Fedora on RISC-V, Wei Fu)
● ”This project, informally called Fedora/RISC-V, aims to provide a complete
Fedora experience on the RISC-V (RV64GC)”
30. Linux distro: Fedora
(source: Fedora on RISC-V, Wei Fu)
● QEMU and libvirt/QEMU
○ Fedora Images can run on the QEMU with graphics
parameters (VGA and bochs-display).
● SiFive Unleashed board
○ Fedora GNOME Image can run on SiFive Unleashed
with Expansion Board, PCI-E graphic Card & SATA SSD
● Installation instructions
31. ● Port of Debian for the RISC-V
architecture called riscv64
○ “a port in Debian terminology means to
provide the software normally available in
the Debian archive (over 20,000 source
packages) ready to install and run”
● 95% of packages are built for RISC-V
○ The Debian port uses RV64GC as the
hardware baseline and the lp64d ABI (the
default ABI for RV64G systems).
Linux distro: Debian
32. OpenEmbedded / Yocto
● meta-riscv: general hardware-specific BSP overlay for the RISC-V
○ The core BSP part of meta-riscv should work with different OpenEmbedded/Yocto
distributions and layer stacks
○ Supports QEMU and the SiFive HiFive Unleashed board
33. BuildRoot
● RISC-V port is now supported in the upstream BuildRoot project
● “Embedded Linux from scratch in 40 minutes (on RISC-V)”
○ Tutorial by Michael Opdenacker, Bootlin
○ Hardware emulator: QEMU
○ Cross-compiling toolchain: Buildroot
○ Bootloader: BBL Berkeley Boot Loader
○ Kernel: Linux 5.4-rc7
○ Root filesystem and application: BusyBox
○ That’s easy to compile and assemble in less than 40 minutes!
34. SiFive Freedom FU540 SoC
● SiFive is a start-up founded by members of the Berkeley RISC-V team
● FU540 debuted in 2018 as the first RISC-V SoC that could run Linux
○ 4x U54 cores (up to 1.5 GHz) which
implement RV64GC to run Linux
○ 1x E51 low-power “minion” core for
system management tasks
○ 64-bit DDR4 with ECC
○ Gigabit Ethernet, ChipLink, SPI, I2C,
UART, GPIO, PWM (no USB)
35. SiFive Freedom Unleashed
● The first Linux-capable RISC-V dev board
○ And the board design is Open Source Hardware!
● High performance compared to FPGA
○ FU540 SoC clocked over 10x faster than FPGA ‘soft’ cores
● Too expensive for widespread adoption
○ Sold for $999 on CrowdSupply and no longer available
○ FU540 SoC chip is not sold separately
○ SiFive core business is designing cores, not SoC’s or boards
NOTE: ASIC is a term often used to indicate that an SoC (System-on-Chip) has a “hard” processor core
constructed by silicon fabrication instead of “soft” core on FPGA where clock speeds are much lower
37. Microchip PolarFire SoC
● Microchip designed a SoC similar
to SiFive U540 but adds a FPGA
○ 4x 667 MHz U54 cores, 1x E51 core
○ PolarFire FPGA fabric with
25k to 460k logic elements (LEs)
○ DDR3/4, LPDDR3/4
○ PCIe Gen2, USB 2.0 OTG, 2x GbE
● Full commercial product family
○ Available from distributors
○ Formerly branded as Microsemi
before Microchip acquired it
38. Microchip Icicle board
● PolarFire SoC dev board
○ $499 on CrowdSuppy
○ Pre-orders now shipping
○ Available soon from distributors
● MPFS250T-FCVG484EES
○ 600 MHz clock RISC-V cores
○ 254K logic element FPGA
● Memory
○ 2 GB LPDDR4 x 32
○ 8 GB eMMC flash and SD card
39. Kendryte K210
● 400MHz dual core RV64GC
○ 8MB SRAM but no DRAM interface
● Affordable Sipeed dev boards
○ Sipeed MAiX BiT is only $13
● Full support added in Linux 5.8
○ “RISC-V NOMMU and M-mode Linux”
○ Damien Le Moal, Christoph Hellwig
● 2 boards supported by u-boot
○ Sean Anderson
40. Kendryte K210
● Buildroot with busybox for rootfs
○ upstreaming in progress on the mailing list
○ tutorial from CNX Software
● 8MB runs out very quick!
○ MMU based on draft spec not supported by Linux
○ userspace needs shared library support
○ "RISC-V FDPIC/NOMMU toolchain/runtime support"
(Maciej W. Rozycki)
42. PicoRio
● Open source project from RIOS Lab
○ Goal is to create low-cost Linux-capable RISC-V platform
● Introduction by Zhangxi Tan
○ during RISC-V Global Summit back in September
○ Three phases of PicoRio planned
○ Samples of PicoRio 1.0 expected in Q4 2020
43. SiFive Unmatched
● Announced in October 2020
○ $665 on CrowdSupply
○ scheduled to ship in January 2021
● SiFive Freedom FU740 SoC
○ 4x U74 RV64GC application cores
○ 1x S7 RV64IMAC embedded core
44. SiFive Unmatched
● Mini-ITX PC form factor
○ 8GB DDR4 RAM
○ 4x USB 3.2 Gen 1 ports
○ Gigabit Ethernet
○ x16 PCIe Gen 3 Expansion Slot
○ M.2 connector for NVMe SSD
○ M.2 connector for WiFi/Bluetooth
45. Alibaba XuanTie 910
● T-Head is a subsidiary of Alibaba
● 16-core 2.5 GHz RISC-V processor
○ implementation of draft Vector extension
○ expected to debut in 2021
46. Sipeed board with Allwinner SoC
● Alibaba T-Head XuanTie C906
○ single-core RV64GCV processor up to 1 GHz
● $12.50 per Sipeed tweet
○ At least 256 MB RAM
○ Planned to early 2021
47. Open source FPGA toolchains
“RISC-V and FPGAs: Open Source Hardware Hacking”
Keynote at Hackday Supercon 2019 by Dr. Megan Wachs
48. Open source FPGA toolchains
● Project IceStorm for Lattice iCE40 FPGA
○ “A Free and Open Source Verilog-to-Bitstream Flow for iCE40 FPGAs”
○ Claire Wolf (oe1cxw) at 32c3
49. Open source FPGA toolchains
● Project Trellis for the more capable Lattice ECP5 FPGA
○ “Project Trellis and nextpnr FOSS FPGA flow for the Lattice ECP5”
○ David Shah @fpga_dave at FOSDEM 19
50. Open source FPGA toolchains
● Project X-Ray & SymbiFlow for much more capable Xilinix Series 7
○ “Xilinx Series 7 FPGAs Now Have a Fully Open Source Toolchain!” [almost] Tim Ansell
○ “Open Source Verilog-to-Bitstream FPGA synthesis flow, currently targeting Xilinx 7-Series,
Lattice iCE40 and Lattice ECP5 FPGAs. Think of it as the GCC of FPGAs”
56. Why design an SoC in Python?
● Python has advantages over traditional HDL like VHDL and Verilog
○ Many people already are familiar with Python than HDL (hardware description languages)
○ There are currently more software developers than hardware designers
● Migen is a Python framework that can automate chip design
○ Leverages the object-oriented, modular nature of Python
○ Produces Verilog code so it can be used with existing chip design workflows
● “Using Python for creating hardware to record FOSS conferences!”
58. LiteX
● Based on Migen, builds full SoC that can be loaded into an FPGA
59. LiteX
● “LiteX vs. Vivado: First Impressions”
● Collection of open cores for DRAM, Ethernet, PCIe, SATA and more...
60. Linux on LiteX-VexRiscv
● VexRiscv: 32-bit Linux-capable RISC-V core
○ Designed to be FPGA friendly
○ Written in Spinal HDL (based on Scala)
● Builds an SoC using VexRiscv core and LiteX modules
○ Such as LiteDRAM, LiteEth, LiteSDCard, LitePCIe
○ “This project demonstrates how high level HDLs (Spinal HDL, Migen) enable new
possibilities and complement each other. Results shown here are the results of a
productive collaboration between open-source communities”
● Supports large number of FPGA dev boards

61.
62.
63. LiteX
● upstream support for Hackaday Supercon badge:
● https://github.com/litex-hub/litex-boards/pull/31
69. ● Radiona.org ULX3S
○ 32MB SDRAM; ESP32 on board for WiFi and Bluetooth
○ Sold for $115 on CrowdSupply and Mouser
Open Source ECP5 FPGA boards
70. Open Source ECP5 FPGA boards
● OrangeCrab by Greg Davill
○ 128MB DDR RAM; Adafruit Feather form factor
○ Sold on GroupGets for $129
71. Want to learn FPGAs? Try Fomu!
● Online workshop from Tim Ansell and Sean Cross
● $50 on CrowdSupply
● Fits inside USB port!
● Learn how to use:
○ MicroPython
○ Verilog
○ LiteX
72. No hardware? Try Renode!
● Renode can simulate physical hardware systems including CPU,
peripherals, sensors, and wired or wireless network between nodes
75. Trustworthy self-hosted computer
● “A Trustworthy, Free (Libre), Linux Capable, Self-Hosting 64bit RISC-V
Computer” by Gabriel L. Somlo
○ “My goal is to build a Free/OpenSource computer from the ground up, so I may
completely trust that the entire hardware+software system's behavior is 100%
attributable to its fully available HDL (Hardware Description Language) and Software
sources”
● Talk: “Toward a Trustable, Self-Hosting Computer System”
○ Video: youtube.com/watch?v=5IhujGl_-K0