8051 timer counter
Introduction
TMOD Register
TCON Register
Modes of Operation
Counters
The microcontroller 8051 has two 16 bit Timer/ Counter registers namely Timer 0 (T0) and Timer 1 (T1) .
When used as a “Timer” the microcontroller is programmed to count the internal clock pulse.
When used as a “Counter” the microcontroller is programmed to count external pulses.
Maximum count rate is 1/24 of the oscillator frequency.
3. The microcontroller 8051 has two 16 bit Timer/
Counter registers namely Timer 0 (T0) and Timer 1
(T1) .
When used as a “Timer” the microcontroller is programmed to
count the internal clock pulse.
When used as a “Counter” the microcontroller is programmed
to count external pulses.
o Maximum count rate is 1/24 of the oscillator frequency.
4. The 8051 has 2 timers/counters:
◦ Timer/Counter 0
◦ Timer/Counter 1
Registers Used in the Timer :
◦ Timer 0 registers:
TH0, TL0
Exclusive
◦ Timer 1 registers:
TH1, TL1
◦ TMOD (Timer mode register)
Shared by both
◦ TCON (Timer control register)
5. Registers THx & TLx
They are 16 bit wide.
These registers store:
The time delay as a timer.
The number of events as a counter.
Timer 0: TH0 & TL0
Timer 0 high byte , timer 0 low byte
Timer 1: TH1 & TL1
Timer 1 high byte, timer 1 low byte
7. Timer mode register = TMOD
◦ An 8-bit register
lower 4 bits : Timer 0 Mode setting (0000 : not used)
upper 4 bits : Timer 1 Mode setting (0000 : not used)
◦ Not bit-addressable
8. GATE C/T M1 M0 GATE C/T M1 M0
Timer 1 Timer 0
(MSB) (LSB)
BIT NAME EXPLANATION OF THE FUNCTION TIMER
7 GATE1
When this bit is set the timer will only run when
INT1 (P3.3) is high. When this bit is clear the
timer will run regardless of the state of INT1.
1
6 C/T1
When this bit is set the timer will count events
on T1 (P3.5). When this bit is clear the timer
will be incremented every machine cycle.
1
5 T1M1 Timer mode bit 1
4 T1M0 Timer mode bit 1
3 GATE0
When this bit is set the timer will only run when
INT0 (P3.2) is high. When this bit is clear the
timer will run regardless of the state of INT0.
0
2 C/T0
When this bit is set the timer will count events
on T0 (P3.4). When this bit is clear the timer
will be incremented every machine cycle.
0
1 T0M1 Timer mode bit 0
0 T0M0 Timer mode bit 0
10. M0 and M1 select the timer mode for timers 0 & 1.
M1 M0 Mode Operating Mode
0 0 0 13-bit timer mode
8-bit THx + 5-bit TLx (x= 0 or 1)
0 1 1 16-bit timer mode
8-bit THx + 8-bit TLx
1 0 2 8-bit auto reload
8-bit auto reload timer/counter;
THx holds a value which is to be reloaded
into TLx each time it overflows.
1 1 3 Split timer mode
12. This is a relic mode.
◦ Included in 8051 to maintain compatibility with its
predecessor 8048.
The counters are counting up:
◦ TLx will count from 0 to 31.
◦ When TLx is incremented from 31, it will “reset”
(overflow) to 0.
◦ Now THx will be incremented.
Hence effectively only 13 bits are used.
◦ Bits 0-4 of TLx.
◦ Bits 0-7 of THx..
13. This is the most commonly used mode.
This mode operates in a fashion almost like the Mode 0,
only this time all 16 bits are used.
The counting:
◦ TLx is incremented from 0(00h) to 255(FFh).
◦ When TLx is incremented from 255, it resets to 0 and
causes THx to be incremented by 1.
◦ Hence we have a maximum count of ‘65,025’
(255*255) machine cycles.
14. ÷ 12
TR
TH TL TF
Timer
overflow
flag
C/T = 0
TF goes high when FFFF 0
XTAL
oscillator
15. When a timer is in mode 2, THx holds the "reload value"
and TLx is the timer itself.
Thus the counting proceeds as:
◦ TLx starts counting up.
◦ TLx reaches 255 and is subsequently incremented.
◦ Now instead of resetting to 0 (as in the case of modes
0 and 1), it will be reset to the value stored in THx.
17. When Timer 0 is placed in mode 3, it essentially becomes two
separate 8-bit timers.
That is to say, Timer 0 is TL0 and Timer 1 is TH0.
Both timers count from 0 to 255 and overflow back to 0
independently.
What happens to timer1?
◦ All the bits that are related to Timer 1 will now be tied to TH0.
◦ While Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1)
can be put into modes 0, 1 or 2 normally.
◦ However, you may not start or stop the real timer 1 since the bits
that do that are now linked to TH0.
◦ The real timer 1, in this case, will be incremented every machine
cycle no matter what.
18.
19. Finally, there is one more SFR that controls the two timers and
provides valuable information about them.
Timer control register: TCON
◦ Upper nibble : TIMER
◦ Lower nibble : INTERRUPTS
20. The Register bits represent the following values :
BIT NAME BIT ADDRESS EXPLANATION OF THE
FUNCTION
TIMER
7 TF1 8Fh
Timer 1 Overflow. This
bit is set by the
microcontroller when
Timer 1 overflows.
1
6 TR1 8Eh
Timer 1 Run.
When this bit is set
Timer 1 is turned on.
When this bit is clear
Timer 1 is off.
1
5 TF0 8Dh
Timer 0 Overflow. This
bit is set by the
microcontroller when
Timer 0 overflows.
0
4 TR0 8Ch
Timer 0 Run.
When this bit is set
Timer 0 is turned on.
When this bit is clear
Timer 0 is off.
0
22. As far as the use of a timer/counter as an event counter is
concerned ,everything that we have talked about in the last
section also applies to programming it as a counter ,except
the source of the frequency.
When used as a timer ,the 8051’s crystal is used as the
source of the frequency.
However ,when used as a counter ,it is a pulse outside of the
8051 that increments the TH,TL registers.
These timers can also be used as counters counting
events happening outside the 8051.
