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Nettab 2006 Tutorial 3B part 2

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M
Matteo Vit

The document describes the hardware infrastructure of the Michelangelo HPC cluster. It consists of 70 blade nodes with dual AMD Opteron processors and 8 GB RAM each, for a total of 280 cores and 560 GB RAM. Storage includes 26 TB of disk space across multiple disk arrays. The cluster uses Infiniband and Ethernet networking and employs a diskless node design for reliability and maintenance. Diagrams show the cluster spread across 3 racks connected by Infiniband, Ethernet, and Fibre Channel switches for high-performance computing applications.

Tecnología
1 de 23
HPC Infrastructures Matteo Vit NETTAB 2006 – Santa Margherita di Pula (CA) - July 10-13, 2006
HARDWARE INFRASTRUCTURE Agenda Introduction Cluster design constraints The design of Michelangelo Hardware description Design diagrams 2
HARDWARE INFRASTRUCTURE Agenda Introduction Cluster design constraints The design of Michelangelo Hardware description Design diagrams 3
HARDWARE INFRASTRUCTURE Introduction (I) 280 cores (70 blade nodes with dual AMD opteron dual core) 560 GB of RAM (8 GB per node) Infiniband and Ethernet infrastructure 26 TB of disc space Diskless nodes 4
HARDWARE INFRASTRUCTURE Introduction (II) Cluster's tasks Beowulf Grid Different OSs Linux Solaris Windows Other 5
HARDWARE INFRASTRUCTURE Agenda Introduction Cluster design constraints The design of Michelangelo Hardware description Design diagrams 6
CLUSTER DESIGN Design constraints Installation Volume Power consumption Heat dissipation Future expansion Heterogeneous Tools and libraries Add-on cards Scientific applications 7
HARDWARE INFRASTRUCTURE Agenda Introduction Cluster design constraints The design of Michelangelo Hardware description Design diagrams 8
THE DESIGN OF MICHELANGELO Blade nodes (I) Compact Redundancy Easy to service Low cable count Low power consumption 9
THE DESIGN OF MICHELANGELO Blade nodes (II) 10
THE DESIGN OF MICHELANGELO Infiniband Performance Bandwidth Latency Industry standard Reliable 11
THE DESIGN OF MICHELANGELO Diskless Reliable Easy and fast maintenance Reconfigurable Easy expansion Single point of administration 12
THE DESIGN OF MICHELANGELO Storage Area Network (SAN) Performance Reliable Industry standard Quality of Service (QoS) Future expansion Easy interface to backup systems 13
HARDWARE INFRASTRUCTURE Agenda Introduction Cluster design constraints The design of Michelangelo Hardware description Design diagrams 14
HARDWARE DESCRIPTION Blade node Gigabit NIC 4x DDR400 Sockets PCI-E Extended B/P Connector PCI-X Expansion Opteron 2xx + + + + + + + IDE + + Port + + + + Combo + I/O Port Service Processor IPMI Controller KVM Controller ATI RageXL VGA Controller 15
HARDWARE DESCRIPTION Blade chassis 6+1 2100w Redundant Power 3+1 System Fan Tray AC 100~240V Inlets Two Gigabit LAN Bays One Fast Ethernet Bay One KVM One Service Processor 16
HARDWARE DESCRIPTION APELink board Field Programmable Gate Array (FPGA) 6 optional channels 6.4 Gb/s Reconfigurable hardware Offload processing 17
HARDWARE INFRASTRUCTURE Agenda Introduction Cluster design constraints The design of Michelangelo Hardware description Design diagrams 18
DESIGN DIAGRAMS OF MICHELANGELO Overview 3 racks 10 blade chassis 70 blades 42x500GB disc array 14x400GB disc array Infiniband switch Fast-ethernet switch Gbit ethernet switch Fiber channel switch KVM switch over IP 19
DESIGN DIAGRAMS OF MICHELANGELO Connectivity KVMoIP Fibre Channel, GFS 70+2 Infiniband 10Gb/s MPI, (GFS, NFS) 20
DESIGN DIAGRAMS OF MICHELANGELO Photos from installation (I) 21
DESIGN DIAGRAMS OF MICHELANGELO Photos from installation (II) 22
DESIGN DIAGRAMS OF MICHELANGELO Photos from installation (III) 23

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