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Hybrid Memory Cube
A game changer for applications ranging from high performance computing to consumer technologieslike
tablets and graphics cards that value a combination of form factor, energy and bandwidth.
Bill Kohnen
Bill Kohnen Sept 2013
Memory Wall Problem
• Memory bandwidth has become a bottleneck
to system performance for:
– high-performance computing,
– high-end servers,
– graphics, and
– mid-level servers.
Bill Kohnen Sept 2013
HMC is the solution: By placing intelligent memory on the same substrate as the
processing unit, each part of the system can do what it's designed to do far more
optimally than any previous technology.
Definition
A hybrid memory cube (HMC) is a single package
containing multiple memory die and one logic
die, all stacked together using through-silicon via
(TSV) technology.
Bill Kohnen Sept 2013
HMC Comparison to DDR 3
• 15 X performance
• 70% Less Energy
• 90% less space than RDIMMs
Bill Kohnen Sept 2013
DDR4 represents an evolutionary standard, HMC is a revolutionary technology
Flavors of 3D
Bill Kohnen Sept 2013
Logic
Memory Cell
Conventional
2D
3D Vertical
Memory Cell
Logic
Memory Cell
Memory Cell
Memory Cell
3D Chip Stacking
Logic Memory Cell
Wafer
3D Chip Packaging
Thinned 2D Wafer
Thinned 2D Wafer
Thinned 2D Wafer
Logic
Logic
Logic
Memory Cell
Memory Cell
Memory Cell
I
n
t
e
r
c
o
n
n
e
c
t
Wire bond TSV TSV (Fast) Wire Bond
More Complex TSV
Specifically How do HMCs Deliver
Better Performance ?
• Shorter pathways
– Removes the logic transistors from each DRAM die and places
them all in one central location, at the base of the stack.
– One logic circuit that drives multiple memory dies. This
centralized logic allows for higher and more efficient data rates
• Removes the logic transistors from each DRAM die and
places them all in one central location, at the base of the
stack.
• Near Memory – Mounted near processor
• Modular – Scalable even Far memory
Bill Kohnen Sept 2013
Current Status
• Micron has started shipping samples of its
2GB chip built with four 4Gb
• 4GB samples for March
• High Volume later in 2014
• Micron, Samsung and SK Hynix now handle
the Fab, Assembly and Test Process now
Internally.
– With high volume Subcons will develop capabiltiy
Bill Kohnen Sept 2013
Economics
• When Suppliers talk about total Cost of
Ownership reduction it translates to “the
initial cost is higher than current options”
• However, in this case there are real cost
benefits
– Smaller footprints for more capability
– Reduced power consumption (70%) is a tangible
benefit to customers
Bill Kohnen Sept 2013
Action: Smart Designers and Buyers will gain a competitive advantage by
incorporating HMCs into design and product requirements now.
More Information
Bill Kohnen Sept 2013
http://hybridmemorycube.org/technology.html

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Hybrid Memory Cubes offer Smart Designers and Buyers a Competitive Advantage

  • 1. Hybrid Memory Cube A game changer for applications ranging from high performance computing to consumer technologieslike tablets and graphics cards that value a combination of form factor, energy and bandwidth. Bill Kohnen Bill Kohnen Sept 2013
  • 2. Memory Wall Problem • Memory bandwidth has become a bottleneck to system performance for: – high-performance computing, – high-end servers, – graphics, and – mid-level servers. Bill Kohnen Sept 2013 HMC is the solution: By placing intelligent memory on the same substrate as the processing unit, each part of the system can do what it's designed to do far more optimally than any previous technology.
  • 3. Definition A hybrid memory cube (HMC) is a single package containing multiple memory die and one logic die, all stacked together using through-silicon via (TSV) technology. Bill Kohnen Sept 2013
  • 4. HMC Comparison to DDR 3 • 15 X performance • 70% Less Energy • 90% less space than RDIMMs Bill Kohnen Sept 2013 DDR4 represents an evolutionary standard, HMC is a revolutionary technology
  • 5. Flavors of 3D Bill Kohnen Sept 2013 Logic Memory Cell Conventional 2D 3D Vertical Memory Cell Logic Memory Cell Memory Cell Memory Cell 3D Chip Stacking Logic Memory Cell Wafer 3D Chip Packaging Thinned 2D Wafer Thinned 2D Wafer Thinned 2D Wafer Logic Logic Logic Memory Cell Memory Cell Memory Cell I n t e r c o n n e c t Wire bond TSV TSV (Fast) Wire Bond More Complex TSV
  • 6. Specifically How do HMCs Deliver Better Performance ? • Shorter pathways – Removes the logic transistors from each DRAM die and places them all in one central location, at the base of the stack. – One logic circuit that drives multiple memory dies. This centralized logic allows for higher and more efficient data rates • Removes the logic transistors from each DRAM die and places them all in one central location, at the base of the stack. • Near Memory – Mounted near processor • Modular – Scalable even Far memory Bill Kohnen Sept 2013
  • 7. Current Status • Micron has started shipping samples of its 2GB chip built with four 4Gb • 4GB samples for March • High Volume later in 2014 • Micron, Samsung and SK Hynix now handle the Fab, Assembly and Test Process now Internally. – With high volume Subcons will develop capabiltiy Bill Kohnen Sept 2013
  • 8. Economics • When Suppliers talk about total Cost of Ownership reduction it translates to “the initial cost is higher than current options” • However, in this case there are real cost benefits – Smaller footprints for more capability – Reduced power consumption (70%) is a tangible benefit to customers Bill Kohnen Sept 2013 Action: Smart Designers and Buyers will gain a competitive advantage by incorporating HMCs into design and product requirements now.
  • 9. More Information Bill Kohnen Sept 2013 http://hybridmemorycube.org/technology.html