UIC Thesis Corbetta

A Flexible Tile-Based Communication Infrastructure for Partial Reconfigurable Architectures BY Simone Corbetta [email_address] Thesis committee: Shantanu Dutt (chair), Donatella Sciuto, Ashfaq Ahmad Khokhar UIC Thesis Defense: May, 8th 2008

Aims ,[object Object],[object Object],[object Object],[object Object]

Rationale and Innovation ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

Outline ,[object Object],[object Object],[object Object],[object Object],[object Object]

What’s next ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

Communication-centric design ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

Communication infrastructure and dynamic features ,[object Object],[object Object],[object Object],[object Object],[object Object]

Point-to-point links ,[object Object],(a) ad-hoc connection (b) regular topology (complete graph) Scalability is affected, due to high resource requirements; reusability is low, interfaces are application-dependent Simplicity; ensures high performance, and low latency; no overhead Drawbacks Advantages

Bus-based systems ,[object Object],[object Object],... Arbiter (a) single bus ... ... Bridge (b) multiple buses Bottleneck; level of contention increases, concurrent accesses are serialized; single point-of-failure Simplicity; reusability, commercial standards Drawbacks Advantages

Crossbar switch ,[object Object],Line 1 Line 2 Programmable interconnect point Resource requirements, in terms of programmable components True parallellism, physically different concurrent communication links can be established Drawbacks Advantages

Network-on-Chip ,[object Object],[object Object],[object Object],[object Object],Computational overhead; high resource requirements Flexibility; scalability; reusability; reliability, no single point-of-failure Drawbacks Advantages

What’s next ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

Field Programmable Gate Arrays ,[object Object],[object Object],[object Object],Image taken from “ Bebop to the Boolean Boogie: an Unconventional Guide to Electronics Fundamentals, Components and Processes ” by Clive Maxfield [Everyday Practical Electronics]

Reconfiguration and Reconfigurability ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

What’s next ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

XPipes (1/2) ,[object Object],[object Object],[object Object],[object Object],[object Object],DATA-LINK LAYER NETWORK LAYER TRANSPORT LAYER physical link

XPipes (2/2) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

DyNoC (1/2) ,[object Object],[object Object],[object Object],[object Object],DyNoC Rule

DyNoC (2/2) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

CoNoChi (1/2) ,[object Object],[object Object]

CoNoChi (2/2) ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

Qualitative Comparison No clear distinction Computation and communication Supported Not supported Not supported Dynamic Reconfiguration Flexibility thanks to dynamic reconfiguration No flexibility No flexibility Flexibility Relies on run-time choices Static mesh Relies upon synthesis-time choices Connectivity CoNoChi DyNoC XPipes

A light-weight approach ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],COMPUTATIONAL LAYER COMMUNICATION LAYER VS

Packet-switched communication ,[object Object],[object Object],[object Object],Contains communication-related information (route update, communication tail, replies…) Control Contains data of the current communication request Data Contains preliminary information on the current communication session, useful for the recipient Header

Session-oriented communication ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

Routing mechanisms (1/2) ,[object Object],[object Object],[object Object],initiator-based destination-based VS Switch-related overhead is greater, due to routing table read process Update of the information is complex; overhead increases CONS PROS Flexibilty and transparency on the communication details Switch design has low complexity; switch-related overhead is low Destination-based Initiator-based

Routing mechanisms (2/2) ,[object Object],ESEE SEE/ E/// EE// ////

Target architecture ,[object Object],[object Object],[object Object],Static Reconfigurable FPGA Bus-macro TILE columns rows

Experimental Results ,[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object]

Switch Resource Requirements ,[object Object]

Master NI Resource Requirements ,[object Object],[object Object],XC3S200 XC2VP7 XC4VFX12 27-bits packet 32-bits packet

Slave NI Resource Requirements ,[object Object],[object Object],27-bits packets case

Virtex-II Pro Case Study (1/3)

Virtex-II Pro Case Study (2/3)

Virtex-II Pro Case Study (3/3) ,[object Object],Resource requirements 618/1215 = 50.8% 846/1520 = 55.5% Half clock cycles required Latency IMPROVEMENT ! ,[object Object],[object Object]

Concluding Remarks (1/2) ,[object Object],Communication protocol and Network Interface designs Layered approach Tile-based implementation and tile dimensioning Device independent design Switch-design; communication protocol complexity Resource-aware design Dynamic routing; dynamic topology Reliability Dynamic switch insertion; dynamic switch deletion; dynamic topology; dynamic routing mechanism; support of dynamic reconfiguration Flexibility and adaptability

Concluding Remarks (2/2) ,[object Object],[object Object],[object Object],[object Object],[object Object],“ A Light-Weight Network-on-Chip Architecture for Dynamically Reconfigurable Systems ”. Corbetta, S.; Rana, V.; Santambrogio. M. D. Proceedings of the 8th edition of the International Symposium on Systems, Architectures, Modeling and Simulation (IEEE Conference Session), July 2008.

[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],[object Object],General Information

Questions ,[object Object],[object Object]

UIC Thesis Corbetta

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