2. Introduction :
• ADCs have become essential elements used for several applications. However, the test of
these devices represents an ongoing hard challenge due to the increasing test complexity of the
high-performance converter as well as the stringent needs concerning the test time to be spent,
the accuracy to be satisfied, and the issues related to the costs and the area occupation.
• BIST “Built-in-Self-Test” technique is one of the ways that is used to overcome these
challenges, and thus it encourages the researchers to find suitable solutions. After an
illustration of the challenges with the ADC-BIST and the related work carried out or proposed
to overcome current problems.
6. ADC Testing :
ADC has a set of parameters that determine analog-to-signal digital
conversion accuracy. The most common ADC accuracy parameters are:
1. Integral nonlinearity (INL).
2. Differential nonlinearity (DNL).
3. Offset error, Gain error.
4. Total unadjusted error (TUE).
5. Etc.
The particular parameters may be more or less critical depending on the
application area
Comparison of On-Chip ADC-Testing Techniques IEEE 2017, CONFERENCE
10. Proposed Work
To achieve On Chip (O.C) Analog to Digital Converter Built in Self-Test characterized of Low cost,
occupied small area and flexible techniques, it can be modified to suit any new variables or for the
purpose of development, the main goal of this work is ADC BIST-O.C with three techniques as listed
below:
1. Intelligent O.C.S_ADC_BIST based on
a)Machine learning
b)Deep Learning
c) Fuzzy Logic, Fuzzy Cognitive Map ‘FCM’.
2. Modified Histogram based O.CS ADC_BIST
12. Conclusion :
BIST proposed that mainly using two ways to calibrate the ADC functions are. First, it
completely simulates ADC with its test circuit with MATLAB only. Second, implement complete
BIST system O.C. test issue achieved by using different techniques such as illustrated in the
survey.
Previous articles focused on, how to enhance the system reliability, reduce the test
cost and time.