Presented by Gernot Pammer at OPAL-RT RT15 User Group event in Berkeley on May 13-14, 2015

1. Page 1
WORLDWIDE
AUSTRIAN
POWER
HIL &
Power Amplifier
Requirements on Power Amplifiers and HIL
Real-Time Processors to successfully
implement P-HIL Test Benches

2. Page 2
PI
HIL
Processing
Delay
tPR
ADC
Delay
tPR
Transport
Delay
tTR
Or ionLink
+
-
S ig na l
S ou r ce
Pow er
A m p lif ier
P-HIL Simplified Model
Analogue
Output
Signal
Input
Signal

3. Page 3
COMPISO Digital Amplifier
Pow er
A m p lif ier
10 kHz
-2 dB
10 kHz
-40°

4. Page 4
Orion Link / RT – Link
• tTR = 4µs
• Including:
• HIL Coding
• Transport
• Power Amplifier decoding
Transport
Delay
tTR
Or ionLink
4µs

5. Page 5
PI
HIL
Processing
Delay
tPR
ADC
Delay
tPR
+
-
S ig na l
S ou r ce
OP4510
• Processing Model CPU
• 20µs Processing Cycle Time
• Processing Model FPGA
• 4µs Processing Cycle Time
• COMPISO Digital Amplifier has 250.000kHz sampling frequency
• 250.000kHz  4µs cycle time
2µs
4µs  FPGA
20µs  CPU

6. Page 6
PI
PI Regulator

7. Page 7
SAMPLING RATES
SIGNAL SOURCE VS
AMPLIFIER

8. Page 8
HIL
Transport
Delay
tTR
Or ionLink
+
-
S ig na l
S ou r ce
Pow er
A m p lif ier
Sampling: Signal Source vs Amplifier
Analogue
Output
Signal
Sampling: 4µs .. 250kHz
Sampling: 4µs .. 250kHz  FGPA
20µs .. 50kHz  CPU
40µs .. 25kHz
80µs .. 12,5 kHz
Input
Signal
Sine Wave
50 Hz
1 kHz
2 kHz

9. Page 9
Sine Wave 50 Hz
Set Point: 4µs .. 250kHz
Amplifier Anlogue Output
Sine Wave 50 Hz

10. Page 10
Sine Wave 50 Hz
Set Point: 80µs .. 12,5 kHz
Amplifier Anlogue Output
Sine Wave 50 Hz

11. Page 11
Sine Wave 1 kHz
Set Point: 4µs .. 250 kHz  FPGA
Amplifier Anlogue Output
Sine Wave 1 kHz

12. Page 12
Sine Wave 1 kHz
Set Point: 20µs .. 50 kHz  CPU
Amplifier Anlogue Output
Sine Wave 1 kHz

13. Page 13
Sine Wave 1 kHz
Set Point: 40µs .. 25 kHz
Amplifier Anlogue Output
Sine Wave 1 kHz

14. Page 14
Sine Wave 1 kHz
Set Point: 80µs .. 12,5 kHz
Amplifier Anlogue Output
Sine Wave 1 kHz

15. Page 15
Sine Wave 2 kHz
Set Point: 4µs .. 250 kHz  FPGA
Amplifier Anlogue Output
Sine Wave 2 kHz

16. Page 16
Sine Wave 2 kHz
Set Point: 20µs .. 50 kHz  CPU
Amplifier Anlogue Output
Sine Wave 2 kHz

17. Page 17
Sine Wave 2 kHz
Set Point: 40µs .. 25 kHz
Amplifier Anlogue Output
Sine Wave 2 kHz

18. Page 18
Sine Wave 2 kHz
Set Point: 80µs .. 12,5 kHz
Amplifier Anlogue Output
Sine Wave 2 kHz

19. Page 19
Summary: Sampling: Signal Source vs Amplifier
• 50 Hz Signals
• Slow CPU Models (>80µs / 12,5 kHz)
• 1 kHz Signal (20th Harmonic)
• Slow CPU Models (>40 µs / 25kHz)
• CPU Model (20 µs / 50 kHz)
• FPGA Model (4 µs / 250 kHz)
• 2 kHz Signal and higher frequencies
• Slow CPU Models (>40 µs / 25 kHz)
• CPU Model (20 µs / 50 kHz)
• FPGA Model (4 µs / 250 kHz)

20. Page 20
DELAY (DEAD TIME)
VS
PHASE SHIFT

21. Page 21
HIL
Delays
tDEAD
Or ionLink
+
-
S ig na l
S ou r ce
Pow er
A m p lif ier
Delay vs phase shift
Analogue
Output
Signal
Sampling: 4µs .. 250kHz
Input
Signal
5µs .. 80µs

22. Page 22
Delay vs phase shift – Phase Graph

23. Page 23
OPEN LOOP
TRANSFER FUNCTION

24. Page 24
PI
HIL
Processing
Delay
tPR
ADC
Delay
tPR
Transport
Delay
tTR
Or ionLink
+
-
S ig na l
S ou r ce
Pow er
A m p lif ier
Open Loop
Loop Feedback
Sampling: 4µs .. 250kHz
Input
Signal
1µs .. 74µs 4µs
2µs

25. Page 25
Open Loop – Transfer Function

26. Page 26
CLOSED LOOP
SYSTEM STABILITY

27. Page 27
PI
HIL
Processing
Delay
tPR
ADC
Delay
tPR
Transport
Delay
tTR
Or ionLink
+
-
S ig na l
S ou r ce
Pow er
A m p lif ier
Closed Loop P-HIL
Sampling: 4µs .. 250kHz
Input
Signal
1µs .. 74µs 4µs
2µs

28. Page 28
Closed Loop – Transfer Function

29. Page 29
WORLDWIDE
AUSTRIAN
POWER
Thank you…
…for your
Attention
G. Pammer Sept. 2014

30. Page 30
PI
HIL
Processing
Delay
tPR
ADC
Delay
tPR
Transport
Delay
tTR
Or ionLink
+
-
S ig na l
S ou r ce
Pow er
A m p lif ier
Sampling: Signal Source vs Amplifier
Analogue
Output
Signal
Sampling: 4µs .. 250kHz
Sampling: 4µs .. 250kHz  FGPA
20µs .. 50kHz  CPU
40µs .. 25kHz
80µs .. 12,5 kHz
Input
Signal
Sine Wave
50 Hz
1 kHz
2 kHz
4µs
2µs
4µs  FPGA
20µs  CPU

31. Page 31
PI
HIL
Processing
Delay
tPR
ADC
Delay
tPR
Transport
Delay
tTR
Or ionLink
+
-
S ig na l
S ou r ce
Pow er
A m p lif ier
Sampling: Signal Source vs Amplifier
Analogue
Output
Signal
Sampling: 4µs .. 250kHz
Sampling: 4µs .. 250kHz  FGPA
20µs .. 50kHz  CPU
40µs .. 25kHz
80µs .. 12,5 kHz
Input
Signal
Sine Wave
50 Hz
1 kHz
2 kHz
4µs
2µs
4µs  FPGA
20µs  CPU